Merge tag 'drm-intel-next-2013-07-12' of git://people.freedesktop.org/~danvet/drm...

 Highlights:
- follow-up refactoring after the shared dpll rework that landed in 3.11
- oddball prep cleanups from Ben for ppgtt
- encoder->get_config state tracking infrastructure from Jesse
- used by the experimental fastboot support from Jesse (disabled by
  default)
- make the error state file official and add it to our sysfs interface
  (Mika)
- drm_mm prep changes from Ben, prepares to embedd the drm_mm_node (which
  will be used by the vma rework later on)
- interrupt handling rework, follow up cleanups to the VECS enabling, hpd
  storm handling and fifo underrun reporting.
- Big pile of smaller cleanups, code improvements and related stuff.

* tag 'drm-intel-next-2013-07-12' of git://people.freedesktop.org/~danvet/drm-intel: (72 commits)
  drm/i915: clear DPLL reg when disabling i9xx dplls
  drm/i915: Fix up cpt pixel multiplier enable sequence
  drm/i915: clean up vlv ->pre_pll_enable and pll enable sequence
  drm/i915: move error state to own compilation unit
  drm/i915: Don't attempt to read an unitialized stack value
  drm/i915: Use for_each_pipe() when possible
  drm/i915: don't enable PM_VEBOX_CS_ERROR_INTERRUPT
  drm/i915: unify ring irq refcounts (again)
  drm/i915: kill dev_priv->rps.lock
  drm/i915: queue work outside spinlock in hsw_pm_irq_handler
  drm/i915: streamline hsw_pm_irq_handler
  drm/i915: irq handlers don't need interrupt-safe spinlocks
  drm/i915: kill lpt pch transcoder->crtc mapping code for fifo underruns
  drm/i915: improve GEN7_ERR_INT clearing for fifo underrun reporting
  drm/i915: improve SERR_INT clearing for fifo underrun reporting
  drm/i915: extract ibx_display_interrupt_update
  drm/i915: remove unused members from drm_i915_private
  drm/i915: don't frob mm.suspended when not using ums
  drm/i915: Fix VLV DP RBR/HDMI/DAC PLL LPF coefficients
  drm/i915: WARN if the bios reserved range is bigger than stolen size
  ...

Conflicts:
	drivers/gpu/drm/i915/i915_gem.c

diff --cc drivers/gpu/drm/drm_mm.c
Simple merge

diff --cc drivers/gpu/drm/i915/i915_drv.c
Simple merge

diff --cc drivers/gpu/drm/i915/i915_drv.h
Simple merge

diff --cc drivers/gpu/drm/i915/i915_gem.c
index 97afd26,20b10a0..46bf7e3
--- 1/drivers/gpu/drm/i915/i915_gem.c
--- 2/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@@ -2666,27 -2673,12 +2665,27 @@@ static void i965_write_fence_reg(struc
                fence_pitch_shift = I965_FENCE_PITCH_SHIFT;
        }
  
 +      fence_reg += reg * 8;
 +
 +      /* To w/a incoherency with non-atomic 64-bit register updates,
 +       * we split the 64-bit update into two 32-bit writes. In order
 +       * for a partial fence not to be evaluated between writes, we
 +       * precede the update with write to turn off the fence register,
 +       * and only enable the fence as the last step.
 +       *
 +       * For extra levels of paranoia, we make sure each step lands
 +       * before applying the next step.
 +       */
 +      I915_WRITE(fence_reg, 0);
 +      POSTING_READ(fence_reg);
 +
        if (obj) {
-               u32 size = obj->gtt_space->size;
+               u32 size = i915_gem_obj_ggtt_size(obj);
 +              uint64_t val;
  
-               val = (uint64_t)((obj->gtt_offset + size - 4096) &
+               val = (uint64_t)((i915_gem_obj_ggtt_offset(obj) + size - 4096) &
                                 0xfffff000) << 32;
-               val |= obj->gtt_offset & 0xfffff000;
+               val |= i915_gem_obj_ggtt_offset(obj) & 0xfffff000;
                val |= (uint64_t)((obj->stride / 128) - 1) << fence_pitch_shift;
                if (obj->tiling_mode == I915_TILING_Y)
                        val |= 1 << I965_FENCE_TILING_Y_SHIFT;
@@@ -3992,11 -4008,8 +3980,6 @@@ i915_gem_idle(struct drm_device *dev
        if (!drm_core_check_feature(dev, DRIVER_MODESET))
                i915_gem_evict_everything(dev);
  
-       /* Hack!  Don't let anybody do execbuf while we don't control the chip.
-        * We need to replace this with a semaphore, or something.
-        * And not confound mm.suspended!
-        */
-       dev_priv->mm.suspended = 1;
 -      i915_gem_reset_fences(dev);
 -
        del_timer_sync(&dev_priv->gpu_error.hangcheck_timer);
  
        i915_kernel_lost_context(dev);

diff --cc drivers/gpu/drm/i915/i915_gem_stolen.c
index 982d473,76c3b86..5c1a535
--- 1/drivers/gpu/drm/i915/i915_gem_stolen.c
--- 2/drivers/gpu/drm/i915/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
@@@ -147,10 -164,10 +164,10 @@@ int i915_gem_stolen_setup_compression(s
  {
        struct drm_i915_private *dev_priv = dev->dev_private;
  
 -      if (dev_priv->mm.stolen_base == 0)
 +      if (!drm_mm_initialized(&dev_priv->mm.stolen))
                return -ENODEV;
  
-       if (size < dev_priv->cfb_size)
+       if (size < dev_priv->fbc.size)
                return 0;
  
        /* Release any current block */
@@@ -333,8 -350,9 +353,9 @@@ i915_gem_object_create_stolen_for_preal
        struct drm_i915_private *dev_priv = dev->dev_private;
        struct drm_i915_gem_object *obj;
        struct drm_mm_node *stolen;
+       int ret;
  
 -      if (dev_priv->mm.stolen_base == 0)
 +      if (!drm_mm_initialized(&dev_priv->mm.stolen))
                return NULL;
  
        DRM_DEBUG_KMS("creating preallocated stolen object: stolen_offset=%x, gtt_offset=%x, size=%x\n",

diff --cc drivers/gpu/drm/i915/intel_dp.c
Simple merge

diff --cc drivers/gpu/drm/i915/intel_lvds.c
Simple merge

diff --cc drivers/gpu/drm/i915/intel_pm.c
Simple merge

diff --cc drivers/gpu/drm/i915/intel_ringbuffer.c
Simple merge

diff --cc include/drm/drm_mm.h
Simple merge