+2022-06-14 H.J. Lu <hjl.tools@gmail.com>
+
+ Backported from master:
+ 2022-06-13 H.J. Lu <hjl.tools@gmail.com>
+
+ * common/config/i386/cpuinfo.h (get_available_features): Require
+ AVX for F16C and VAES.
+
+2022-06-14 Philipp Tomsich <philipp.tomsich@vrull.eu>
+
+ Backported from master:
+ 2022-06-02 Philipp Tomsich <philipp.tomsich@vrull.eu>
+
+ * config/riscv/riscv.cc (riscv_build_integer_1): Rewrite value as
+ (-1 << 31) for the single-bit case, when operating on (1 << 31)
+ in SImode.
+ * config/riscv/riscv.h (SINGLE_BIT_MASK_OPERAND): Allow for
+ any single-bit value, moving the special case for (1 << 31) to
+ riscv_build_integer_1 (in riscv.c).
+
2022-06-08 Max Filippov <jcmvbkbc@gmail.com>
Backported from master:
+2022-06-14 Jonathan Wakely <jwakely@redhat.com>
+
+ Backported from master:
+ 2022-06-13 Jonathan Wakely <jwakely@redhat.com>
+
+ * include/std/atomic (__atomic_val_t): Use __type_identity_t
+ instead of atomic<T>::value_type, as per LWG 3220.
+ * testsuite/29_atomics/atomic/lwg3220.cc: New test.
+
+2022-06-14 Mark Mentovai <mark@mentovai.com>
+
+ Backported from master:
+ 2022-06-13 Mark Mentovai <mark@mentovai.com>
+
+ * include/experimental/bits/fs_path.h (__detail::__null_terminated):
+ Rename to __nul_terminated to avoid colliding with a macro in
+ Apple's SDK.
+
2022-06-08 Jonathan Wakely <jwakely@redhat.com>
Backported from master: