Machine Operands
----------------
-There are seventeen different kinds of machine operands, and all of them can be
+There are eighteen different kinds of machine operands, and all of them can be\r
serialized.
Immediate Operands
EH_LABEL <mcsymbol Ltmp1>
+Debug Instruction Reference Operands\r
+^^^^^^^^^^^^^^^^^\r
+\r
+A debug instruction reference operand is a pair of indices, referring to an\r
+instruction and an operand within that instruction respectively; see\r
+:ref:`Instruction referencing locations <instruction-referencing-locations>`.\r
+\r
+The example below uses a reference to Instruction 1, Operand 0:\r
+\r
+.. code-block:: text\r
+\r
+ DBG_INSTR_REF !123, !DIExpression(), dbg-instr-ref(1, 0), debug-location !456\r
+\r
CFIIndex Operands
^^^^^^^^^^^^^^^^^
All additional qualifiers for the variable location should be made through the
expression metadata.
+.. _instruction-referencing-locations:\r
+\r
Instruction referencing locations
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
.. code-block:: text
$rbp = MOV64ri 0, debug-instr-number 1, debug-location !12
- DBG_INSTR_REF 1, 0, !123, !DIExpression(), debug-location !456
+ DBG_INSTR_REF !123, !DIExpression(), dbg-instr-ref(1, 0), debug-location !456\r
Instruction numbers are directly attached to machine instructions with an
optional ``debug-instr-number`` attachment, before the optional
``debug-location`` attachment. The value defined in ``$rbp`` in the code
above would be identified by the pair ``<1, 0>``.
-The first two operands of the ``DBG_INSTR_REF`` above record the instruction
+The 3rd operand of the ``DBG_INSTR_REF`` above records the instruction\r
and operand number ``<1, 0>``, identifying the value defined by the ``MOV64ri``.
-The additional operands to ``DBG_INSTR_REF`` are identical to ``DBG_VALUE``,
+The first two operands to ``DBG_INSTR_REF`` are identical to ``DBG_VALUE_LIST``,\r
and the ``DBG_INSTR_REF`` s position records where the variable takes on the
designated value in the same way.
/// Returns a range over all operands that are used to determine the variable
/// location for this DBG_VALUE instruction.
iterator_range<mop_iterator> debug_operands() {
- assert(isDebugValue() && "Must be a debug value instruction.");
- return isDebugValueList()
- ? make_range(operands_begin() + 2, operands_end())
- : make_range(operands_begin(), operands_begin() + 1);
+ assert((isDebugValueLike()) && "Must be a debug value instruction.");
+ return isNonListDebugValue()
+ ? make_range(operands_begin(), operands_begin() + 1)
+ : make_range(operands_begin() + 2, operands_end());
}
/// \copydoc debug_operands()
iterator_range<const_mop_iterator> debug_operands() const {
- assert(isDebugValue() && "Must be a debug value instruction.");
- return isDebugValueList()
- ? make_range(operands_begin() + 2, operands_end())
- : make_range(operands_begin(), operands_begin() + 1);
+ assert((isDebugValueLike()) && "Must be a debug value instruction.");
+ return isNonListDebugValue()
+ ? make_range(operands_begin(), operands_begin() + 1)
+ : make_range(operands_begin() + 2, operands_end());
}
/// Returns a range over all explicit operands that are register definitions.
/// Implicit definition are not included!
}
bool isDebugLabel() const { return getOpcode() == TargetOpcode::DBG_LABEL; }
bool isDebugRef() const { return getOpcode() == TargetOpcode::DBG_INSTR_REF; }
+ bool isDebugValueLike() const { return isDebugValue() || isDebugRef(); }
bool isDebugPHI() const { return getOpcode() == TargetOpcode::DBG_PHI; }
bool isDebugInstr() const {
return isDebugValue() || isDebugLabel() || isDebugRef() || isDebugPHI();
const MachineInstrBuilder &addMetadata(const MDNode *MD) const {
MI->addOperand(*MF, MachineOperand::CreateMetadata(MD));
- assert((MI->isDebugValue() ? static_cast<bool>(MI->getDebugVariable())
- : true) &&
+ assert((MI->isDebugValueLike() ? static_cast<bool>(MI->getDebugVariable())
+ : true) &&
"first MDNode argument of a DBG_VALUE not a variable");
assert((MI->isDebugLabel() ? static_cast<bool>(MI->getDebugLabel())
: true) &&
Register Reg, const MDNode *Variable,
const MDNode *Expr);
-/// This version of the builder builds a DBG_VALUE intrinsic
-/// for a MachineOperand.
-MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL,
- const MCInstrDesc &MCID, bool IsIndirect,
- const MachineOperand &MO, const MDNode *Variable,
- const MDNode *Expr);
-
/// This version of the builder builds a DBG_VALUE or DBG_VALUE_LIST intrinsic
/// for a MachineOperand.
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL,
Register Reg, const MDNode *Variable,
const MDNode *Expr);
-/// This version of the builder builds a DBG_VALUE intrinsic
-/// for a machine operand and inserts it at position I.
-MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
- MachineBasicBlock::iterator I, const DebugLoc &DL,
- const MCInstrDesc &MCID, bool IsIndirect,
- MachineOperand &MO, const MDNode *Variable,
- const MDNode *Expr);
-
-/// This version of the builder builds a DBG_VALUE or DBG_VALUE_LIST intrinsic
-/// for a machine operand and inserts it at position I.
+/// This version of the builder builds a DBG_VALUE, DBG_INSTR_REF, or
+/// DBG_VALUE_LIST intrinsic for a machine operand and inserts it at position I.
MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
MachineBasicBlock::iterator I, const DebugLoc &DL,
const MCInstrDesc &MCID, bool IsIndirect,
MO_IntrinsicID, ///< Intrinsic ID for ISel
MO_Predicate, ///< Generic predicate for ISel
MO_ShuffleMask, ///< Other IR Constant for ISel (shuffle masks)
- MO_Last = MO_ShuffleMask
+ MO_DbgInstrRef, ///< Integer indices referring to an instruction+operand
+ MO_Last = MO_DbgInstrRef
};
private:
MachineOperand *Next;
} Reg;
+ struct { // For MO_DbgInstrRef.
+ unsigned InstrIdx;
+ unsigned OpIdx;
+ } InstrRef;
+
/// OffsetedInfo - This struct contains the offset and an object identifier.
/// this represent the object as with an optional offset from it.
struct {
/// isMetadata - Tests if this is a MO_Metadata operand.
bool isMetadata() const { return OpKind == MO_Metadata; }
bool isMCSymbol() const { return OpKind == MO_MCSymbol; }
+ bool isDbgInstrRef() const { return OpKind == MO_DbgInstrRef; }
bool isCFIIndex() const { return OpKind == MO_CFIIndex; }
bool isIntrinsicID() const { return OpKind == MO_IntrinsicID; }
bool isPredicate() const { return OpKind == MO_Predicate; }
return Contents.Sym;
}
+ unsigned getInstrRefInstrIndex() const {
+ assert(isDbgInstrRef() && "Wrong MachineOperand accessor");
+ return Contents.InstrRef.InstrIdx;
+ }
+
+ unsigned getInstrRefOpIndex() const {
+ assert(isDbgInstrRef() && "Wrong MachineOperand accessor");
+ return Contents.InstrRef.OpIdx;
+ }
+
unsigned getCFIIndex() const {
assert(isCFIIndex() && "Wrong MachineOperand accessor");
return Contents.CFIIndex;
Contents.MD = MD;
}
+ void setInstrRefInstrIndex(unsigned InstrIdx) {
+ assert(isDbgInstrRef() && "Wrong MachineOperand mutator");
+ Contents.InstrRef.InstrIdx = InstrIdx;
+ }
+ void setInstrRefOpIndex(unsigned OpIdx) {
+ assert(isDbgInstrRef() && "Wrong MachineOperand mutator");
+ Contents.InstrRef.OpIdx = OpIdx;
+ }
+
void setMBB(MachineBasicBlock *MBB) {
assert(isMBB() && "Wrong MachineOperand mutator");
Contents.MBB = MBB;
void ChangeToTargetIndex(unsigned Idx, int64_t Offset,
unsigned TargetFlags = 0);
+ /// Replace this operand with an Instruction Reference.
+ void ChangeToDbgInstrRef(unsigned InstrIdx, unsigned OpIdx,
+ unsigned TargetFlags = 0);
+
/// ChangeToRegister - Replace this operand with a new register operand of
/// the specified value. If an operand is known to be an register already,
/// the setReg method should be used.
return Op;
}
+ static MachineOperand CreateDbgInstrRef(unsigned InstrIdx, unsigned OpIdx) {
+ MachineOperand Op(MachineOperand::MO_DbgInstrRef);
+ Op.Contents.InstrRef.InstrIdx = InstrIdx;
+ Op.Contents.InstrRef.OpIdx = OpIdx;
+ return Op;
+ }
+
static MachineOperand CreateCFIIndex(unsigned CFIIndex) {
MachineOperand Op(MachineOperand::MO_CFIIndex);
Op.Contents.CFIIndex = CFIIndex;
if (!VTracker && !TTracker)
return false;
- unsigned InstNo = MI.getOperand(0).getImm();
- unsigned OpNo = MI.getOperand(1).getImm();
+ unsigned InstNo = MI.getDebugOperand(0).getInstrRefInstrIndex();
+ unsigned OpNo = MI.getDebugOperand(0).getInstrRefOpIndex();
const DILocalVariable *Var = MI.getDebugVariable();
const DIExpression *Expr = MI.getDebugExpression();
/// \param MI A previously unprocessed debug instruction to analyze for
/// fragment usage.
void InstrRefBasedLDV::accumulateFragmentMap(MachineInstr &MI) {
- assert(MI.isDebugValue() || MI.isDebugRef());
+ assert(MI.isDebugValueLike());
DebugVariable MIVar(MI.getDebugVariable(), MI.getDebugExpression(),
MI.getDebugLoc()->getInlinedAt());
FragmentInfo ThisFragment = MIVar.getFragmentOrDefault();
process(MI, nullptr, nullptr);
// Also accumulate fragment map.
- if (MI.isDebugValue() || MI.isDebugRef())
+ if (MI.isDebugValueLike())
accumulateFragmentMap(MI);
// Create a map from the instruction number (if present) to the
void defVar(const MachineInstr &MI, const DbgValueProperties &Properties,
const SmallVectorImpl<DbgOpID> &DebugOps) {
- assert(MI.isDebugValue() || MI.isDebugRef());
+ assert(MI.isDebugValueLike());
DebugVariable Var(MI.getDebugVariable(), MI.getDebugExpression(),
MI.getDebugLoc()->getInlinedAt());
DbgValue Rec = (DebugOps.size() > 0)
MachineBasicBlock::iterator LDVImpl::handleDebugInstr(MachineInstr &MI,
SlotIndex Idx) {
- assert(MI.isDebugValue() || MI.isDebugRef() || MI.isDebugPHI());
+ assert(MI.isDebugValueLike() || MI.isDebugPHI());
// In instruction referencing mode, there should be no DBG_VALUE instructions
// that refer to virtual registers. They might still refer to constants.
- if (MI.isDebugValue())
- assert(!MI.getOperand(0).isReg() || !MI.getOperand(0).getReg().isVirtual());
+ if (MI.isDebugValueLike())
+ assert(none_of(MI.debug_operands(),
+ [](const MachineOperand &MO) {
+ return MO.isReg() && MO.getReg().isVirtual();
+ }) &&
+ "MIs should not refer to Virtual Registers in InstrRef mode.");
// Unlink the instruction, store it in the debug instructions collection.
auto NextInst = std::next(MI.getIterator());
.Case("nofpexcept", MIToken::kw_nofpexcept)
.Case("debug-location", MIToken::kw_debug_location)
.Case("debug-instr-number", MIToken::kw_debug_instr_number)
+ .Case("dbg-instr-ref", MIToken::kw_dbg_instr_ref)
.Case("same_value", MIToken::kw_cfi_same_value)
.Case("offset", MIToken::kw_cfi_offset)
.Case("rel_offset", MIToken::kw_cfi_rel_offset)
kw_nofpexcept,
kw_debug_location,
kw_debug_instr_number,
+ kw_dbg_instr_ref,
kw_cfi_same_value,
kw_cfi_offset,
kw_cfi_rel_offset,
bool parsePredicateOperand(MachineOperand &Dest);
bool parseShuffleMaskOperand(MachineOperand &Dest);
bool parseTargetIndexOperand(MachineOperand &Dest);
+ bool parseDbgInstrRefOperand(MachineOperand &Dest);
bool parseCustomRegisterMaskOperand(MachineOperand &Dest);
bool parseLiveoutRegisterMaskOperand(MachineOperand &Dest);
bool parseMachineOperand(const unsigned OpCode, const unsigned OpIdx,
return false;
}
+bool MIParser::parseDbgInstrRefOperand(MachineOperand &Dest) {
+ assert(Token.is(MIToken::kw_dbg_instr_ref));
+
+ lex();
+ if (expectAndConsume(MIToken::lparen))
+ return error("expected syntax dbg-instr-ref(<unsigned>, <unsigned>)");
+
+ if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isNegative())
+ return error("expected unsigned integer for instruction index");
+ uint64_t InstrIdx = Token.integerValue().getZExtValue();
+ assert(InstrIdx <= std::numeric_limits<unsigned>::max() &&
+ "Instruction reference's instruction index is too large");
+ lex();
+
+ if (expectAndConsume(MIToken::comma))
+ return error("expected syntax dbg-instr-ref(<unsigned>, <unsigned>)");
+
+ if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isNegative())
+ return error("expected unsigned integer for operand index");
+ uint64_t OpIdx = Token.integerValue().getZExtValue();
+ assert(OpIdx <= std::numeric_limits<unsigned>::max() &&
+ "Instruction reference's operand index is too large");
+ lex();
+
+ if (expectAndConsume(MIToken::rparen))
+ return error("expected syntax dbg-instr-ref(<unsigned>, <unsigned>)");
+
+ Dest = MachineOperand::CreateDbgInstrRef(InstrIdx, OpIdx);
+ return false;
+}
+
bool MIParser::parseTargetIndexOperand(MachineOperand &Dest) {
assert(Token.is(MIToken::kw_target_index));
lex();
return parsePredicateOperand(Dest);
case MIToken::kw_shufflemask:
return parseShuffleMaskOperand(Dest);
+ case MIToken::kw_dbg_instr_ref:
+ return parseDbgInstrRefOperand(Dest);
case MIToken::Error:
return true;
case MIToken::Identifier:
case MachineOperand::MO_IntrinsicID:
case MachineOperand::MO_Predicate:
case MachineOperand::MO_BlockAddress:
+ case MachineOperand::MO_DbgInstrRef:
case MachineOperand::MO_ShuffleMask: {
unsigned TiedOperandIdx = 0;
if (ShouldPrintRegisterTies && Op.isReg() && Op.isTied() && !Op.isDef())
case MachineOperand::MO_Metadata:
case MachineOperand::MO_MCSymbol:
case MachineOperand::MO_ShuffleMask:
+ case MachineOperand::MO_DbgInstrRef:
return 0;
}
llvm_unreachable("Unexpected MachineOperandType.");
auto *TII = getSubtarget().getInstrInfo();
auto MakeUndefDbgValue = [&](MachineInstr &MI) {
- const MCInstrDesc &RefII = TII->get(TargetOpcode::DBG_VALUE);
+ const MCInstrDesc &RefII = TII->get(TargetOpcode::DBG_VALUE_LIST);
MI.setDesc(RefII);
- MI.getOperand(0).setReg(0);
- MI.getOperand(1).ChangeToRegister(0, false);
+ MI.getDebugOperand(0).setReg(0);
};
DenseMap<Register, DebugInstrOperandPair> ArgDbgPHIs;
for (auto &MBB : *this) {
for (auto &MI : MBB) {
- if (!MI.isDebugRef() || !MI.getOperand(0).isReg())
+ if (!MI.isDebugRef() || !MI.getDebugOperand(0).isReg())
continue;
- Register Reg = MI.getOperand(0).getReg();
+ Register Reg = MI.getDebugOperand(0).getReg();
// Some vregs can be deleted as redundant in the meantime. Mark those
// as DBG_VALUE $noreg. Additionally, some normal instructions are
// for why this is important.
if (DefMI.isCopyLike() || TII->isCopyInstr(DefMI)) {
auto Result = salvageCopySSA(DefMI, ArgDbgPHIs);
- MI.getOperand(0).ChangeToImmediate(Result.first);
- MI.getOperand(1).setImm(Result.second);
+ MI.getDebugOperand(0).ChangeToDbgInstrRef(Result.first, Result.second);
} else {
// Otherwise, identify the operand number that the VReg refers to.
unsigned OperandIdx = 0;
// Morph this instr ref to point at the given instruction and operand.
unsigned ID = DefMI.getDebugInstrNum();
- MI.getOperand(0).ChangeToImmediate(ID);
- MI.getOperand(1).setImm(OperandIdx);
+ MI.getDebugOperand(0).ChangeToDbgInstrRef(ID, OperandIdx);
}
}
}
}
bool MachineInstr::isEquivalentDbgInstr(const MachineInstr &Other) const {
- if (!isDebugValue() || !Other.isDebugValue())
+ if (!isDebugValueLike() || !Other.isDebugValueLike())
return false;
if (getDebugLoc() != Other.getDebugLoc())
return false;
}
const MachineOperand &MachineInstr::getDebugVariableOp() const {
- assert((isDebugValue() || isDebugRef()) && "not a DBG_VALUE*");
- unsigned VariableOp = isDebugValueList() ? 0 : 2;
+ assert((isDebugValueLike()) && "not a DBG_VALUE*");
+ unsigned VariableOp = isNonListDebugValue() ? 2 : 0;
return getOperand(VariableOp);
}
MachineOperand &MachineInstr::getDebugVariableOp() {
- assert((isDebugValue() || isDebugRef()) && "not a DBG_VALUE*");
- unsigned VariableOp = isDebugValueList() ? 0 : 2;
+ assert((isDebugValueLike()) && "not a DBG_VALUE*");
+ unsigned VariableOp = isNonListDebugValue() ? 2 : 0;
return getOperand(VariableOp);
}
}
const MachineOperand &MachineInstr::getDebugExpressionOp() const {
- assert((isDebugValue() || isDebugRef()) && "not a DBG_VALUE*");
- unsigned ExpressionOp = isDebugValueList() ? 1 : 3;
+ assert((isDebugValueLike()) && "not a DBG_VALUE*");
+ unsigned ExpressionOp = isNonListDebugValue() ? 3 : 1;
return getOperand(ExpressionOp);
}
MachineOperand &MachineInstr::getDebugExpressionOp() {
- assert((isDebugValue() || isDebugRef()) && "not a DBG_VALUE*");
- unsigned ExpressionOp = isDebugValueList() ? 1 : 3;
+ assert((isDebugValueLike()) && "not a DBG_VALUE*");
+ unsigned ExpressionOp = isNonListDebugValue() ? 3 : 1;
return getOperand(ExpressionOp);
}
MachineInstrBuilder llvm::BuildMI(MachineFunction &MF, const DebugLoc &DL,
const MCInstrDesc &MCID, bool IsIndirect,
- const MachineOperand &MO,
+ ArrayRef<MachineOperand> DebugOps,
const MDNode *Variable, const MDNode *Expr) {
assert(isa<DILocalVariable>(Variable) && "not a variable");
assert(cast<DIExpression>(Expr)->isValid() && "not an expression");
assert(cast<DILocalVariable>(Variable)->isValidLocationForIntrinsic(DL) &&
"Expected inlined-at fields to agree");
- if (MO.isReg())
- return BuildMI(MF, DL, MCID, IsIndirect, MO.getReg(), Variable, Expr);
-
- auto MIB = BuildMI(MF, DL, MCID).add(MO);
- if (IsIndirect)
- MIB.addImm(0U);
- else
- MIB.addReg(0U);
- return MIB.addMetadata(Variable).addMetadata(Expr);
-}
-
-MachineInstrBuilder llvm::BuildMI(MachineFunction &MF, const DebugLoc &DL,
- const MCInstrDesc &MCID, bool IsIndirect,
- ArrayRef<MachineOperand> MOs,
- const MDNode *Variable, const MDNode *Expr) {
- assert(isa<DILocalVariable>(Variable) && "not a variable");
- assert(cast<DIExpression>(Expr)->isValid() && "not an expression");
- assert(cast<DILocalVariable>(Variable)->isValidLocationForIntrinsic(DL) &&
- "Expected inlined-at fields to agree");
- if (MCID.Opcode == TargetOpcode::DBG_VALUE)
- return BuildMI(MF, DL, MCID, IsIndirect, MOs[0], Variable, Expr);
+ if (MCID.Opcode == TargetOpcode::DBG_VALUE) {
+ assert(DebugOps.size() == 1 &&
+ "DBG_VALUE must contain exactly one debug operand");
+ MachineOperand DebugOp = DebugOps[0];
+ if (DebugOp.isReg())
+ return BuildMI(MF, DL, MCID, IsIndirect, DebugOp.getReg(), Variable,
+ Expr);
+
+ auto MIB = BuildMI(MF, DL, MCID).add(DebugOp);
+ if (IsIndirect)
+ MIB.addImm(0U);
+ else
+ MIB.addReg(0U);
+ return MIB.addMetadata(Variable).addMetadata(Expr);
+ }
auto MIB = BuildMI(MF, DL, MCID);
MIB.addMetadata(Variable).addMetadata(Expr);
- for (const MachineOperand &MO : MOs)
- if (MO.isReg())
- MIB.addReg(MO.getReg());
+ for (const MachineOperand &DebugOp : DebugOps)
+ if (DebugOp.isReg())
+ MIB.addReg(DebugOp.getReg());
else
- MIB.add(MO);
+ MIB.add(DebugOp);
return MIB;
}
MachineInstrBuilder llvm::BuildMI(MachineBasicBlock &BB,
MachineBasicBlock::iterator I,
const DebugLoc &DL, const MCInstrDesc &MCID,
- bool IsIndirect, MachineOperand &MO,
- const MDNode *Variable, const MDNode *Expr) {
- MachineFunction &MF = *BB.getParent();
- MachineInstr *MI = BuildMI(MF, DL, MCID, IsIndirect, MO, Variable, Expr);
- BB.insert(I, MI);
- return MachineInstrBuilder(MF, *MI);
-}
-
-MachineInstrBuilder llvm::BuildMI(MachineBasicBlock &BB,
- MachineBasicBlock::iterator I,
- const DebugLoc &DL, const MCInstrDesc &MCID,
- bool IsIndirect, ArrayRef<MachineOperand> MOs,
+ bool IsIndirect,
+ ArrayRef<MachineOperand> DebugOps,
const MDNode *Variable, const MDNode *Expr) {
MachineFunction &MF = *BB.getParent();
- MachineInstr *MI = BuildMI(MF, DL, MCID, IsIndirect, MOs, Variable, Expr);
+ MachineInstr *MI =
+ BuildMI(MF, DL, MCID, IsIndirect, DebugOps, Variable, Expr);
BB.insert(I, MI);
return MachineInstrBuilder(MF, *MI);
}
MachineBasicBlock::iterator I,
const MachineInstr &Orig,
int FrameIndex, Register SpillReg) {
+ assert(!Orig.isDebugRef() &&
+ "DBG_INSTR_REF should not reference a virtual register.");
const DIExpression *Expr = computeExprForSpill(Orig, SpillReg);
MachineInstrBuilder NewMI =
BuildMI(BB, I, Orig.getDebugLoc(), Orig.getDesc());
setTargetFlags(TargetFlags);
}
+void MachineOperand::ChangeToDbgInstrRef(unsigned InstrIdx, unsigned OpIdx,
+ unsigned TargetFlags) {
+ assert((!isReg() || !isTied()) &&
+ "Cannot change a tied operand into a DbgInstrRef");
+
+ removeRegFromUses();
+
+ OpKind = MO_DbgInstrRef;
+ setInstrRefInstrIndex(InstrIdx);
+ setInstrRefOpIndex(OpIdx);
+ setTargetFlags(TargetFlags);
+}
+
/// ChangeToRegister - Replace this operand with a new register operand of
/// the specified value. If an operand is known to be an register already,
/// the setReg method should be used.
}
case MachineOperand::MO_MCSymbol:
return getMCSymbol() == Other.getMCSymbol();
+ case MachineOperand::MO_DbgInstrRef:
+ return getInstrRefInstrIndex() == Other.getInstrRefInstrIndex() &&
+ getInstrRefOpIndex() == Other.getInstrRefOpIndex();
case MachineOperand::MO_CFIIndex:
return getCFIIndex() == Other.getCFIIndex();
case MachineOperand::MO_Metadata:
return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getMetadata());
case MachineOperand::MO_MCSymbol:
return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getMCSymbol());
+ case MachineOperand::MO_DbgInstrRef:
+ return hash_combine(MO.getType(), MO.getTargetFlags(),
+ MO.getInstrRefInstrIndex(), MO.getInstrRefOpIndex());
case MachineOperand::MO_CFIIndex:
return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getCFIIndex());
case MachineOperand::MO_IntrinsicID:
case MachineOperand::MO_MCSymbol:
printSymbol(OS, *getMCSymbol());
break;
+ case MachineOperand::MO_DbgInstrRef: {
+ OS << "dbg-instr-ref(" << getInstrRefInstrIndex() << ", "
+ << getInstrRefOpIndex() << ')';
+ break;
+ }
case MachineOperand::MO_CFIIndex: {
if (const MachineFunction *MF = getMFIfAvailable(*this))
printCFI(OS, MF->getFrameInstructions()[getCFIIndex()], TRI);
// We must sink this DBG_VALUE if its operand is sunk. To avoid searching
// for DBG_VALUEs later, record them when they're encountered.
- if (MI.isDebugValue()) {
+ if (MI.isDebugValue() && !MI.isDebugRef()) {
SmallDenseMap<MCRegister, SmallVector<unsigned, 2>, 4> MIUnits;
bool IsValid = true;
for (MachineOperand &MO : MI.debug_operands()) {
case MachineOperand::MO_Predicate:
return stable_hash_combine(MO.getType(), MO.getTargetFlags(),
MO.getPredicate());
+ case MachineOperand::MO_DbgInstrRef:
+ return stable_hash_combine(MO.getType(), MO.getInstrRefInstrIndex(),
+ MO.getInstrRefOpIndex());
}
llvm_unreachable("Invalid machine operand type");
}
if (Op) {
assert(DI->getVariable()->isValidLocationForIntrinsic(MIMD.getDL()) &&
"Expected inlined-at fields to agree");
- // A dbg.declare describes the address of a source variable, so lower it
- // into an indirect DBG_VALUE.
- auto Builder =
- BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD.getDL(),
- TII.get(TargetOpcode::DBG_VALUE), /*IsIndirect*/ true, *Op,
- DI->getVariable(), DI->getExpression());
-
- // If using instruction referencing, mutate this into a DBG_INSTR_REF,
- // to be later patched up by finalizeDebugInstrRefs. Tack a deref onto
- // the expression, we don't have an "indirect" flag in DBG_INSTR_REF.
if (UseInstrRefDebugInfo && Op->isReg()) {
- Builder->setDesc(TII.get(TargetOpcode::DBG_INSTR_REF));
- Builder->getOperand(1).ChangeToImmediate(0);
+ // If using instruction referencing, produce this as a DBG_INSTR_REF,
+ // to be later patched up by finalizeDebugInstrRefs. Tack a deref onto
+ // the expression, we don't have an "indirect" flag in DBG_INSTR_REF.
auto *NewExpr =
DIExpression::prepend(DI->getExpression(), DIExpression::DerefBefore);
- Builder->getOperand(3).setMetadata(NewExpr);
+ BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD.getDL(),
+ TII.get(TargetOpcode::DBG_INSTR_REF), /*IsIndirect*/ false, *Op,
+ DI->getVariable(), NewExpr);
+ } else {
+ // A dbg.declare describes the address of a source variable, so lower it
+ // into an indirect DBG_VALUE.
+ BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD.getDL(),
+ TII.get(TargetOpcode::DBG_VALUE), /*IsIndirect*/ true, *Op,
+ DI->getVariable(), DI->getExpression());
}
} else {
// We can't yet handle anything else here because it would require
.addMetadata(DI->getExpression());
} else if (Register Reg = lookUpRegForValue(V)) {
// FIXME: This does not handle register-indirect values at offset 0.
- bool IsIndirect = false;
- auto Builder =
- BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD.getDL(), II,
- IsIndirect, Reg, DI->getVariable(), DI->getExpression());
-
- // If using instruction referencing, mutate this into a DBG_INSTR_REF,
- // to be later patched up by finalizeDebugInstrRefs.
- if (UseInstrRefDebugInfo) {
- Builder->setDesc(TII.get(TargetOpcode::DBG_INSTR_REF));
- Builder->getOperand(1).ChangeToImmediate(0);
+ if (!UseInstrRefDebugInfo) {
+ bool IsIndirect = false;
+ BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD.getDL(), II, IsIndirect,
+ Reg, DI->getVariable(), DI->getExpression());
+ } else {
+ // If using instruction referencing, produce this as a DBG_INSTR_REF,
+ // to be later patched up by finalizeDebugInstrRefs.
+ SmallVector<MachineOperand, 1> MOs({MachineOperand::CreateReg(
+ /* Reg */ Reg, /* isDef */ false, /* isImp */ false,
+ /* isKill */ false, /* isDead */ false,
+ /* isUndef */ false, /* isEarlyClobber */ false,
+ /* SubReg */ 0, /* isDebug */ true)});
+ BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD.getDL(),
+ TII.get(TargetOpcode::DBG_INSTR_REF), /*IsIndirect*/ false, MOs,
+ DI->getVariable(), DI->getExpression());
}
} else {
// We don't know how to handle other cases, so we drop.
// i.e., point the instruction at the vreg, and patch it up later in
// MachineFunction::finalizeDebugInstrRefs.
auto EmitHalfDoneInstrRef = [&](unsigned VReg) -> MachineInstr * {
- auto MIB = BuildMI(*MF, DL, RefII);
- MIB.addReg(VReg);
- MIB.addImm(0);
- MIB.addMetadata(Var);
- MIB.addMetadata(Expr);
- return MIB;
+ SmallVector<MachineOperand, 1> MOs({MachineOperand::CreateReg(
+ /* Reg */ VReg, /* isDef */ false, /* isImp */ false,
+ /* isKill */ false, /* isDead */ false,
+ /* isUndef */ false, /* isEarlyClobber */ false,
+ /* SubReg */ 0, /* isDebug */ true)});
+ return BuildMI(*MF, DL, RefII, false, MOs, Var, Expr);
};
// Try to find both the defined register and the instruction defining it.
if (DefMI->isCopyLike() || TII->isCopyInstr(*DefMI))
return EmitHalfDoneInstrRef(VReg);
- auto MIB = BuildMI(*MF, DL, RefII);
-
// Find the operand number which defines the specified VReg.
unsigned OperandIdx = 0;
for (const auto &MO : DefMI->operands()) {
// Make the DBG_INSTR_REF refer to that instruction, and that operand.
unsigned InstrNum = DefMI->getDebugInstrNum();
- MIB.addImm(InstrNum);
- MIB.addImm(OperandIdx);
- MIB.addMetadata(Var);
- MIB.addMetadata(Expr);
- return &*MIB;
+ SmallVector<MachineOperand, 1> MOs(
+ {MachineOperand::CreateDbgInstrRef(InstrNum, OperandIdx)});
+ return BuildMI(*MF, DL, RefII, false, MOs, Var, Expr);
}
MachineInstr *InstrEmitter::EmitDbgNoLocation(SDDbgValue *SD) {
// For VRegs, in instruction referencing mode, create a DBG_INSTR_REF
// pointing at the VReg, which will be patched up later.
auto &Inst = TII->get(TargetOpcode::DBG_INSTR_REF);
- auto MIB = BuildMI(MF, DL, Inst);
- MIB.addReg(Reg);
- MIB.addImm(0);
- MIB.addMetadata(Variable);
+ SmallVector<MachineOperand, 1> MOs({MachineOperand::CreateReg(
+ /* Reg */ Reg, /* isDef */ false, /* isImp */ false,
+ /* isKill */ false, /* isDead */ false,
+ /* isUndef */ false, /* isEarlyClobber */ false,
+ /* SubReg */ 0, /* isDebug */ true)});
+
auto *NewDIExpr = FragExpr;
// We don't have an "Indirect" field in DBG_INSTR_REF, fold that into
// the DIExpression.
if (Indirect)
NewDIExpr = DIExpression::prepend(FragExpr, DIExpression::DerefBefore);
- MIB.addMetadata(NewDIExpr);
- return MIB;
+ return BuildMI(MF, DL, Inst, false, MOs, Variable, NewDIExpr);
} else {
// Create a completely standard DBG_VALUE.
auto &Inst = TII->get(TargetOpcode::DBG_VALUE);
MachineInstr *MI = FuncInfo->ArgDbgValues[e - i - 1];
assert(MI->getOpcode() != TargetOpcode::DBG_VALUE_LIST &&
"Function parameters should not be described by DBG_VALUE_LIST.");
- bool hasFI = MI->getOperand(0).isFI();
+ bool hasFI = MI->getDebugOperand(0).isFI();
Register Reg =
- hasFI ? TRI.getFrameRegister(*MF) : MI->getOperand(0).getReg();
+ hasFI ? TRI.getFrameRegister(*MF) : MI->getDebugOperand(0).getReg();
if (Register::isPhysicalRegister(Reg))
EntryMBB->insert(EntryMBB->begin(), MI);
else {
DebugLoc DL = MI->getDebugLoc();
bool IsIndirect = MI->isIndirectDebugValue();
if (IsIndirect)
- assert(MI->getOperand(1).getImm() == 0 &&
+ assert(MI->getDebugOffset().getImm() == 0 &&
"DBG_VALUE with nonzero offset");
assert(cast<DILocalVariable>(Variable)->isValidLocationForIntrinsic(DL) &&
"Expected inlined-at fields to agree");
case MachineOperand::MO_Metadata:
case MachineOperand::MO_MCSymbol:
return true;
+ case MachineOperand::MO_DbgInstrRef:
case MachineOperand::MO_CFIIndex:
return false;
case MachineOperand::MO_IntrinsicID:
%0:gr16_abcd = MOV16ri 1, debug-instr-number 1, debug-location !9
bb.1:
- DBG_INSTR_REF 2, 0, !7, !DIExpression(), debug-location !9
+ DBG_INSTR_REF !7, !DIExpression(), dbg-instr-ref(2, 0), debug-location !9\r
%1:gr16 = COPY %0, debug-location !9
%2:gr16 = COPY %0
$rcx = CMOV64rr killed $rcx, killed $rdx, 5, implicit killed $eflags
$rcx = OR64rr killed $rcx, killed $rsi, implicit-def dead $eflags
$rdx = MOVSX64rm32 $rbx, 1, $noreg, 0, $noreg :: (load (s32), align 8)
- DBG_INSTR_REF 1, 0, !46, !17, debug-location !48
- DBG_INSTR_REF 2, 0, !39, !17, debug-location !44
+ DBG_INSTR_REF !46, !17, dbg-instr-ref(1, 0), debug-location !48\r
+ DBG_INSTR_REF !39, !17, dbg-instr-ref(2, 0), debug-location !44\r
TEST32mr killed $rcx, 4, killed $rdx, 0, $noreg, killed $eax, implicit-def $eflags :: (load (s32))
JCC_1 %bb.2, 5, implicit $eflags
JMP_1 %bb.3
; crash, and we don't just drop the information.
; CHECK: DBG_PHI $xzr, 1
-; CHECK: DBG_INSTR_REF 1, 0
+; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)\r
define i64 @test() !dbg !7 {
%foo = add i64 0, 0
; CHECK-LABEL: bb.1.entry:
; CHECK: $r0 = COPY %0
; CHECK-NEXT: $r1 = COPY %1
-; CHECK-NEXT: DBG_INSTR_REF 1, 0
+; CHECK-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)\r
; CHECK-NEXT: TCRETURNdi &__divsi3, 0, csr_ios, implicit $sp, implicit $r0, implicit $r1
declare i1 @ext()
bb.0.entry:
DBG_PHI $fp0, 3
- DBG_INSTR_REF 3, 0, !17, !DIExpression(), debug-location !30
+ DBG_INSTR_REF !17, !DIExpression(), dbg-instr-ref(3, 0), debug-location !30\r
$eax = MOV32ri 0
RET 0, debug-location !36
#
# CHECK-LABEL: name: foo
# CHECK: DBG_PHI $edi
-# CHECK-NEXT: DBG_INSTR_REF 2, 0
+# CHECK-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)\r
# CHECK-NEXT: DBG_VALUE $dil
--- |
; ModuleID = 'out.ll'
liveins: $edi
DBG_PHI $edi, 1
- DBG_INSTR_REF 2, 0, !12, !DIExpression(), debug-location !13
+ DBG_INSTR_REF !12, !DIExpression(), dbg-instr-ref(2, 0), debug-location !13\r
renamable $rax = MOV64rm $rip, 1, $noreg, target-flags(x86-gotpcrel) @someglobal, $noreg, debug-location !13 :: (load (s64) from got)
MOV8mr killed renamable $rax, 1, $noreg, 0, $noreg, renamable $dil, debug-location !13 :: (store (s8) into @someglobal)
RET64 debug-location !13
DBG_PHI $rbx, 1
$rax = COPY $rbx
$rbx = MOV64ri 0
- DBG_INSTR_REF 1, 0, !12, !DIExpression(), debug-location !13
+ DBG_INSTR_REF !12, !DIExpression(), dbg-instr-ref(1, 0), debug-location !13\r
; This sequence should mark the contents of rbx on block entry as being the
; value for the variable at this DBG_INSTR_REF. We've force it to be in
; CHECK: DBG_PHI $rbx, 1
; CHECK-NEXT: $rax = COPY $rbx
; CHECK-NEXT: $rbx = MOV64ri 0
- ; CHECK-NEXT: DBG_INSTR_REF 1, 0
+ ; CHECK-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)\r
; CHECK-NEXT: DBG_VALUE $rax, $noreg
$rbx = COPY $rax
MOV64mr $rsp, 1, $noreg, 16, $noreg, $rax :: (store 8 into %stack.0)
;; This should resolve to the loaded register.
- DBG_INSTR_REF 1, 0, !12, !DIExpression(), debug-location !13
- ; CHECK: DBG_INSTR_REF 1, 0,
+ DBG_INSTR_REF !12, !DIExpression(), dbg-instr-ref(1, 0), debug-location !13\r
+ ; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)\r
; CHECK-NEXT: DBG_VALUE $rcx
;; And if we say it's a smaller size, we should be able to pick out smaller
MOV64mr $rsp, 1, $noreg, 16, $noreg, $rax :: (store 8 into %stack.0)
;; This should pick out the 32 bit value.
- DBG_INSTR_REF 2, 0, !12, !DIExpression(), debug-location !13
- ; CHECK: DBG_INSTR_REF 2, 0,
+ DBG_INSTR_REF !12, !DIExpression(), dbg-instr-ref(2, 0), debug-location !13\r
+ ; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)\r
; CHECK-NEXT: DBG_VALUE $ecx
;; Try all the other subregs.
$rcx = MOV64rm $rsp, 1, $noreg, 8, $noreg :: (load 8 from %stack.0)
MOV64mr $rsp, 1, $noreg, 16, $noreg, $rax :: (store 8 into %stack.0)
- DBG_INSTR_REF 3, 0, !12, !DIExpression(), debug-location !13
- ; CHECK: DBG_INSTR_REF 3, 0,
+ DBG_INSTR_REF !12, !DIExpression(), dbg-instr-ref(3, 0), debug-location !13\r
+ ; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(3, 0)\r
; CHECK-NEXT: DBG_VALUE $cx
DBG_PHI %stack.0, 4, 8
$rcx = MOV64rm $rsp, 1, $noreg, 8, $noreg :: (load 8 from %stack.0)
MOV64mr $rsp, 1, $noreg, 16, $noreg, $rax :: (store 8 into %stack.0)
- DBG_INSTR_REF 4, 0, !12, !DIExpression(), debug-location !13
- ; CHECK: DBG_INSTR_REF 4, 0,
+ DBG_INSTR_REF !12, !DIExpression(), dbg-instr-ref(4, 0), debug-location !13\r
+ ; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(4, 0)\r
; CHECK-NEXT: DBG_VALUE $cl
;; We can't, at this time, describe subregister fields with nonzero offset.
bb.3.if.end:
liveins: $rbx, $r14
- DBG_INSTR_REF 1, 0, !14, !DIExpression(), debug-location !13
- DBG_INSTR_REF 2, 0, !12, !DIExpression(), debug-location !13
- DBG_INSTR_REF 3, 0, !12, !DIExpression(), debug-location !13
+ DBG_INSTR_REF !14, !DIExpression(), dbg-instr-ref(1, 0), debug-location !13\r
+ DBG_INSTR_REF !12, !DIExpression(), dbg-instr-ref(2, 0), debug-location !13\r
+ DBG_INSTR_REF !12, !DIExpression(), dbg-instr-ref(3, 0), debug-location !13\r
; Value number 1 is live-through the above control flow from the two
; DBG_PHIs:
- ; CHECK: DBG_INSTR_REF 1, 0
+ ; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)\r
; CHECK-NEXT: DBG_VALUE $r14
;
; While value number 2 has different defs that merge on entry to bb.3.
; These are both in $rbx though, and we should find its location:
- ; CHECK: DBG_INSTR_REF 2, 0
+ ; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)\r
; CHECK-NEXT: DBG_VALUE $rbx
;
; Value number 3 cannot be resolved because $rax is clobbered in bb.2,
; meaning the merged value in bb.3 is incorrect. It should produce a
; DBG_VALUE $noreg.
- ; CHECK: DBG_INSTR_REF 3, 0
+ ; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(3, 0)\r
; CHECK-NEXT: DBG_VALUE $noreg
renamable $rbx = ADD64rr killed renamable $rbx, killed renamable $r14, implicit-def $eflags, debug-location !28
- DBG_INSTR_REF 2, 0, !12, !DIExpression(), debug-location !13
+ DBG_INSTR_REF !12, !DIExpression(), dbg-instr-ref(2, 0), debug-location !13\r
; After clobbering rbx, the variable location should not be available.
- ; CHECK: DBG_INSTR_REF 2, 0
+ ; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)\r
; CHECK-NEXT: DBG_VALUE $noreg
$rdi = MOV64rr $rbx, debug-location !29
bb.4:
liveins: $rbx, $r14
- DBG_INSTR_REF 1, 0, !14, !DIExpression(), debug-location !13
- DBG_INSTR_REF 2, 0, !12, !DIExpression(), debug-location !13
- DBG_INSTR_REF 3, 0, !12, !DIExpression(), debug-location !13
+ DBG_INSTR_REF !14, !DIExpression(), dbg-instr-ref(1, 0), debug-location !13\r
+ DBG_INSTR_REF !12, !DIExpression(), dbg-instr-ref(2, 0), debug-location !13\r
+ DBG_INSTR_REF !12, !DIExpression(), dbg-instr-ref(3, 0), debug-location !13\r
; Value number 1 is live-through the above control flow from the two
; DBG_PHIs:
- ; CHECK: DBG_INSTR_REF 1, 0
+ ; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)\r
; CHECK-NEXT: DBG_VALUE $r14
;
; While value number 2 has different defs that merge on entry to bb.3.
; These are both in $rbx though, and we should find its location:
- ; CHECK: DBG_INSTR_REF 2, 0
+ ; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)\r
; CHECK-NEXT: DBG_VALUE $rbx
;
; Value number 3 cannot be resolved because $rax is clobbered in bb.2,
; meaning the merged value in bb.3 is incorrect. It should produce a
; DBG_VALUE $noreg.
- ; CHECK: DBG_INSTR_REF 3, 0
+ ; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(3, 0)\r
; CHECK-NEXT: DBG_VALUE $noreg
renamable $rbx = ADD64rr killed renamable $rbx, killed renamable $r14, implicit-def $eflags, debug-location !28
- DBG_INSTR_REF 2, 0, !12, !DIExpression(), debug-location !13
+ DBG_INSTR_REF !12, !DIExpression(), dbg-instr-ref(2, 0), debug-location !13\r
; After clobbering rbx, the variable location should not be available.
- ; CHECK: DBG_INSTR_REF 2, 0
+ ; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)\r
; CHECK-NEXT: DBG_VALUE $noreg
$rdi = MOV64rr $rbx, debug-location !29
;; the size of the value on the stack makes it through to the expression.
$al = MOV8ri 0, debug-instr-number 1, debug-location !7
- DBG_INSTR_REF 1, 0, !8, !DIExpression(DW_OP_LLVM_convert, 8, DW_ATE_signed, DW_OP_LLVM_convert, 32, DW_ATE_signed, DW_OP_stack_value), debug-location !7
+ DBG_INSTR_REF !8, !DIExpression(DW_OP_LLVM_convert, 8, DW_ATE_signed, DW_OP_LLVM_convert, 32, DW_ATE_signed, DW_OP_stack_value), dbg-instr-ref(1, 0), debug-location !7\r
; CHECK: DBG_VALUE $al, $noreg, ![[VARNUM]],
; CHECK-SAME: !DIExpression(DW_OP_LLVM_convert, 8, DW_ATE_signed,
; CHECK-SAME : DW_OP_LLVM_convert, 32, DW_ATE_signed, DW_OP_stack_value)
;; Try again, but with the value originating on the stack, to ensure that
;; we can find its size. It should be deref_size 1 again.
INC8m $rsp, 1, $noreg, 4, $noreg, implicit-def dead $eflags, debug-instr-number 2, debug-location !7 :: (store (s8) into %stack.0)
- DBG_INSTR_REF 2, 1000000, !8, !DIExpression(DW_OP_LLVM_convert, 8, DW_ATE_signed, DW_OP_LLVM_convert, 32, DW_ATE_signed, DW_OP_stack_value), debug-location !7
+ DBG_INSTR_REF !8, !DIExpression(DW_OP_LLVM_convert, 8, DW_ATE_signed, DW_OP_LLVM_convert, 32, DW_ATE_signed, DW_OP_stack_value), dbg-instr-ref(2, 1000000), debug-location !7\r
; CHECK: DBG_VALUE $rsp, $noreg, ![[VARNUM]],
; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus,
; CHECK-SAME: DW_OP_deref_size, 1, DW_OP_LLVM_convert, 8, DW_ATE_signed,
MOV32mr $rsp, 1, $noreg, -8, $noreg, renamable $eax :: (store 4 into %stack.0)
$eax = MOV32ri 0, debug-location !7
- DBG_INSTR_REF 7, 0, !8, !DIExpression(), debug-location !7
+ DBG_INSTR_REF !8, !DIExpression(), dbg-instr-ref(7, 0), debug-location !7\r
; CHECK: DBG_VALUE $rsp, $noreg, ![[VARNUM]],
; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 1, DW_OP_stack_value)
;; And for when the DBG_PHI specifies a stack size...
DBG_PHI %stack.0, 8, 16
- DBG_INSTR_REF 8, 0, !8, !DIExpression(), debug-location !7
+ DBG_INSTR_REF !8, !DIExpression(), dbg-instr-ref(8, 0), debug-location !7\r
; CHECK: DBG_VALUE $rsp, $noreg, ![[VARNUM]],
; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 2, DW_OP_stack_value)
$rax = MOV64ri 0, debug-instr-number 10, debug-location !7
MOV64mr $rsp, 1, $noreg, -8, $noreg, renamable $rax :: (store 8 into %stack.0)
$rax = MOV64ri 0, debug-location !7
- DBG_INSTR_REF 10, 0, !8, !DIExpression(), debug-location !7
+ DBG_INSTR_REF !8, !DIExpression(), dbg-instr-ref(10, 0), debug-location !7\r
; CHECK: DBG_VALUE $rsp, $noreg, ![[VARNUM]],
; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 8, DW_OP_stack_value),
$eax = MOV32ri 0, debug-location !7
$eax = MOV32ri 0, debug-instr-number 11, debug-location !7
MOV32mr $rsp, 1, $noreg, -8, $noreg, renamable $eax :: (store 4 into %stack.0)
$rax = MOV64ri 0, debug-location !7
- DBG_INSTR_REF 11, 0, !8, !DIExpression(), debug-location !7
+ DBG_INSTR_REF !8, !DIExpression(), dbg-instr-ref(11, 0), debug-location !7\r
; CHECK: DBG_VALUE $rsp, 0, ![[VARNUM]],
; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus),
$eax = MOV32ri 0, debug-location !7
$al = MOV8ri 0, debug-instr-number 12, debug-location !7
MOV8mr $rsp, 1, $noreg, -8, $noreg, renamable $al :: (store 1 into %stack.0)
$rax = MOV64ri 0, debug-location !7
- DBG_INSTR_REF 12, 0, !8, !DIExpression(), debug-location !7
+ DBG_INSTR_REF !8, !DIExpression(), dbg-instr-ref(12, 0), debug-location !7\r
; CHECK: DBG_VALUE $rsp, $noreg, ![[VARNUM]],
; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 1, DW_OP_stack_value),
$eax = MOV32ri 0, debug-location !7
$rax = MOV64ri 0, debug-instr-number 13, debug-location !7
MOV64mr $rsp, 1, $noreg, -8, $noreg, renamable $rax :: (store 8 into %stack.0)
$rax = MOV64ri 0, debug-location !7
- DBG_INSTR_REF 13, 0, !10, !DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !7
+ DBG_INSTR_REF !10, !DIExpression(DW_OP_LLVM_fragment, 0, 32), dbg-instr-ref(13, 0), debug-location !7\r
; CHECK: DBG_VALUE $rsp, $noreg, ![[VARNUM2]],
; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 8, DW_OP_stack_value, DW_OP_LLVM_fragment, 0, 32),
$eax = MOV32ri 0, debug-location !7
$eax = MOV32ri 0, debug-instr-number 14, debug-location !7
MOV32mr $rsp, 1, $noreg, -8, $noreg, renamable $eax :: (store 4 into %stack.0)
$rax = MOV64ri 0, debug-location !7
- DBG_INSTR_REF 14, 0, !10, !DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !7
+ DBG_INSTR_REF !10, !DIExpression(DW_OP_LLVM_fragment, 0, 32), dbg-instr-ref(14, 0), debug-location !7\r
; CHECK: DBG_VALUE $rsp, 0, ![[VARNUM2]],
; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_LLVM_fragment, 0, 32),
$eax = MOV32ri 0, debug-location !7
$al = MOV8ri 0, debug-instr-number 15, debug-location !7
MOV8mr $rsp, 1, $noreg, -8, $noreg, renamable $al :: (store 1 into %stack.0)
$rax = MOV64ri 0, debug-location !7
- DBG_INSTR_REF 15, 0, !10, !DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !7
+ DBG_INSTR_REF !10, !DIExpression(DW_OP_LLVM_fragment, 0, 32), dbg-instr-ref(15, 0), debug-location !7\r
; CHECK: DBG_VALUE $rsp, $noreg, ![[VARNUM2]],
; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 1, DW_OP_stack_value, DW_OP_LLVM_fragment, 0, 32),
$eax = MOV32ri 0, debug-location !7
$rax = MOV64ri 0, debug-instr-number 16, debug-location !7
MOV64mr $rsp, 1, $noreg, -8, $noreg, renamable $rax :: (store 8 into %stack.0)
$rax = MOV64ri 0, debug-location !7
- DBG_INSTR_REF 16, 0, !8, !DIExpression(DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value), debug-location !7
+ DBG_INSTR_REF !8, !DIExpression(DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value), dbg-instr-ref(16, 0), debug-location !7\r
; CHECK: DBG_VALUE $rsp, $noreg, ![[VARNUM]],
; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 8, DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value),
$eax = MOV32ri 0, debug-location !7
$eax = MOV32ri 0, debug-instr-number 17, debug-location !7
MOV32mr $rsp, 1, $noreg, -8, $noreg, renamable $eax :: (store 4 into %stack.0)
$rax = MOV64ri 0, debug-location !7
- DBG_INSTR_REF 17, 0, !8, !DIExpression(DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value), debug-location !7
+ DBG_INSTR_REF !8, !DIExpression(DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value), dbg-instr-ref(17, 0), debug-location !7\r
; CHECK: DBG_VALUE $rsp, $noreg, ![[VARNUM]],
; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref, DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value),
$eax = MOV32ri 0, debug-location !7
$al = MOV8ri 0, debug-instr-number 18, debug-location !7
MOV8mr $rsp, 1, $noreg, -8, $noreg, renamable $al :: (store 1 into %stack.0)
$rax = MOV64ri 0, debug-location !7
- DBG_INSTR_REF 18, 0, !8, !DIExpression(DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value), debug-location !7
+ DBG_INSTR_REF !8, !DIExpression(DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value), dbg-instr-ref(18, 0), debug-location !7\r
; CHECK: DBG_VALUE $rsp, $noreg, ![[VARNUM]],
; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 1, DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value),
$eax = MOV32ri 0, debug-location !7
$rax = MOV64ri 0, debug-instr-number 19, debug-location !7
MOV64mr $rsp, 1, $noreg, -8, $noreg, renamable $rax :: (store 8 into %stack.0)
$rax = MOV64ri 0, debug-location !7
- DBG_INSTR_REF 19, 0, !10, !DIExpression(DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value, DW_OP_LLVM_fragment, 0, 32), debug-location !7
+ DBG_INSTR_REF !10, !DIExpression(DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value, DW_OP_LLVM_fragment, 0, 32), dbg-instr-ref(19, 0), debug-location !7\r
; CHECK: DBG_VALUE $rsp, $noreg, ![[VARNUM2]],
; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 8, DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value, DW_OP_LLVM_fragment, 0, 32),
$eax = MOV32ri 0, debug-location !7
$eax = MOV32ri 0, debug-instr-number 20, debug-location !7
MOV32mr $rsp, 1, $noreg, -8, $noreg, renamable $eax :: (store 4 into %stack.0)
$rax = MOV64ri 0, debug-location !7
- DBG_INSTR_REF 20, 0, !10, !DIExpression(DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value, DW_OP_LLVM_fragment, 0, 32), debug-location !7
+ DBG_INSTR_REF !10, !DIExpression(DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value, DW_OP_LLVM_fragment, 0, 32), dbg-instr-ref(20, 0), debug-location !7\r
; CHECK: DBG_VALUE $rsp, $noreg, ![[VARNUM2]],
; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 4, DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value, DW_OP_LLVM_fragment, 0, 32),
$eax = MOV32ri 0, debug-location !7
$al = MOV8ri 0, debug-instr-number 21, debug-location !7
MOV8mr $rsp, 1, $noreg, -8, $noreg, renamable $al :: (store 1 into %stack.0)
$rax = MOV64ri 0, debug-location !7
- DBG_INSTR_REF 21, 0, !10, !DIExpression(DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value, DW_OP_LLVM_fragment, 0, 32), debug-location !7
+ DBG_INSTR_REF !10, !DIExpression(DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value, DW_OP_LLVM_fragment, 0, 32), dbg-instr-ref(21, 0), debug-location !7\r
; CHECK: DBG_VALUE $rsp, $noreg, ![[VARNUM2]],
; CHECK-SAME: !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref_size, 1, DW_OP_constu, 1, DW_OP_plus, DW_OP_stack_value, DW_OP_LLVM_fragment, 0, 32),
$eax = MOV32ri 0, debug-location !7
MOV64mr undef renamable $rax, 1, $noreg, 0, $noreg, killed renamable $r10, debug-location !7 :: (store 8 into `%"class.llvm::Loop"*** undef`)
MOV64mr killed renamable $rdi, 1, $noreg, 40, $noreg, killed renamable $r9, debug-location !7 :: (store 8 into %ir.24)
renamable $rax = MOV64rm killed renamable $rsi, 1, $noreg, 24, $noreg, debug-location !7 :: (load 8 from %ir.26)
- DBG_INSTR_REF 1, 0, !8, !DIExpression(DW_OP_LLVM_fragment, 64, 64), debug-location !7
+ DBG_INSTR_REF !8, !DIExpression(DW_OP_LLVM_fragment, 64, 64), dbg-instr-ref(1, 0), debug-location !7\r
renamable $rax = SUB64rr killed renamable $rax, killed renamable $r11, implicit-def dead $eflags, debug-location !7
renamable $r8 = SUB64rr killed renamable $r8, killed renamable $r14, implicit-def dead $eflags, debug-location !7
renamable $r8 = exact SAR64ri killed renamable $r8, 3, implicit-def dead $eflags, debug-location !7
; CHECK-LABE: bb.0.entry:
$rax = MOV64ri 1, debug-instr-number 1, debug-location !17
- DBG_INSTR_REF 1, 0, !16, !DIExpression(), debug-location !17
+ DBG_INSTR_REF !16, !DIExpression(), dbg-instr-ref(1, 0), debug-location !17\r
;; First check that picking out location works as usual.
- ; CHECK: DBG_INSTR_REF 1, 0
+ ; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)\r
; CHECK-NEXT: DBG_VALUE $rax
$rax = MOV64ri 1, debug-instr-number 2, debug-location !17
- DBG_INSTR_REF 2, 999, !16, !DIExpression(), debug-location !17
+ DBG_INSTR_REF !16, !DIExpression(), dbg-instr-ref(2, 999), debug-location !17\r
;; Test out of bounds operand number.
- ; CHECK: DBG_INSTR_REF 2, 999
+ ; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 999)\r
; CHECK-NEXT: DBG_VALUE $noreg
$rax = MOV64ri 1, debug-instr-number 3, debug-location !17
- DBG_INSTR_REF 3, 1, !16, !DIExpression(), debug-location !17
+ DBG_INSTR_REF !16, !DIExpression(), dbg-instr-ref(3, 1), debug-location !17\r
;; Test non-register operand
- ; CHECK: DBG_INSTR_REF 3, 1
+ ; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(3, 1)\r
; CHECK-NEXT: DBG_VALUE $noreg
;; FIXME: We should test what happens when this meta-instruction is seen
;; by livedbugvalues with an instruction number. However, right now it's
;; impossible to turn the machine-code verifier off when loading MIR?
;KILL implicit killed $eflags, debug-instr-number 4, debug-location !17
- ;DBG_INSTR_REF 4, 0, !16, !DIExpression(), debug-location !17
+ ;DBG_INSTR_REF !16, !DIExpression(), dbg-instr-ref(4, 0), debug-location !17\r
;;; Test non-def operand
- ;; check: DBG_INSTR_REF 4, 0
+ ;; check: DBG_INSTR_REF {{.+}}, dbg-instr-ref(4, 0)\r
;; check-next: DBG_VALUE $noreg
$noreg = MOV32ri 1, debug-instr-number 5, debug-location !17
- DBG_INSTR_REF 5, 0, !16, !DIExpression(), debug-location !17
+ DBG_INSTR_REF !16, !DIExpression(), dbg-instr-ref(5, 0), debug-location !17\r
;; Def of $noreg?
- ; CHECK: DBG_INSTR_REF 5, 0
+ ; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(5, 0)\r
; CHECK-NEXT: DBG_VALUE $noreg
JCC_1 %bb.1, 1, implicit $eflags
; CHECK-LABEL: bb.1:
DBG_PHI $rax, 6
- DBG_INSTR_REF 6, 1, !16, !DIExpression(), debug-location !17
+ DBG_INSTR_REF !16, !DIExpression(), dbg-instr-ref(6, 1), debug-location !17\r
;; Test out-of-bounds reference to a DBG_PHI.
- ; CHECK: DBG_INSTR_REF 6, 1
+ ; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(6, 1)\r
; CHECK-NEXT: DBG_VALUE $noreg
DBG_PHI $noreg, 7
successors: %bb.3
; CHECK-LABEL: bb.2:
DBG_PHI 1, 6
- DBG_INSTR_REF 6, 0, !16, !DIExpression(), debug-location !17
+ DBG_INSTR_REF !16, !DIExpression(), dbg-instr-ref(6, 0), debug-location !17\r
;; Test non-reg operand to DBG_PHI. It's not clear if this can ever happen
;; as the result of an optimisation, but lets test for it anyway.
- ; CHECK: DBG_INSTR_REF 6, 0
+ ; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(6, 0)\r
; CHECK-NEXT: DBG_VALUE $noreg
DBG_PHI 1, 7
bb.3:
; CHECK-LABEL: bb.3:
- DBG_INSTR_REF 7, 0, !16, !DIExpression(), debug-location !17
+ DBG_INSTR_REF !16, !DIExpression(), dbg-instr-ref(7, 0), debug-location !17\r
;; PHI resolution of illegal inputs shouldn't crash either. It should also
;; come out as a $noreg location.
- ; CHECK: DBG_INSTR_REF 7, 0
+ ; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(7, 0)\r
; CHECK-NEXT: DBG_VALUE $noreg
RET 0, debug-location !17
bb.0.entry:
$rax = MOV64ri 1, debug-instr-number 1, debug-location !17
; This debug instruction should identify the value as being in $rax.
- DBG_INSTR_REF 1, 0, !16, !DIExpression(), debug-location !17
+ DBG_INSTR_REF !16, !DIExpression(), dbg-instr-ref(1, 0), debug-location !17\r
; CHECK: DBG_VALUE $rax, $noreg
$rbx = COPY killed $rax, debug-location !17
$rax = MOV64ri 1, debug-location !17
; CHECK: DBG_VALUE $rbx, $noreg
- DBG_INSTR_REF 2, 0, !16, !DIExpression(), debug-location !17
+ DBG_INSTR_REF !16, !DIExpression(), dbg-instr-ref(2, 0), debug-location !17\r
; No instruction is labelled with the number "2". This should produce an
; empty variable location.
; CHECK: DBG_VALUE $noreg, $noreg
; CHECK-LABEL: bb.1:
bb.1:
- DBG_INSTR_REF 3, 0, !16, !DIExpression(), debug-location !17
+ DBG_INSTR_REF !16, !DIExpression(), dbg-instr-ref(3, 0), debug-location !17\r
; This refers to a value def'd in a parent block -- but it should be
; tracked into this block.
; CHECK: DBG_VALUE $rbx, $noreg
; any successor blocks.
; CHECK: DBG_VALUE $rbx, $noreg
- DBG_INSTR_REF 5, 0, !16, !DIExpression(), debug-location !17
+ DBG_INSTR_REF !16, !DIExpression(), dbg-instr-ref(5, 0), debug-location !17\r
; This is a debug use-before-def: the value appears a few instructions
; later. Any earlier value should be terminated here, _and_ we should
; emit a DBG_VALUE when the value becomes available.
; CHECK: DBG_VALUE $rcx, $noreg
$rax = MOV64ri 1, debug-location !17
- DBG_INSTR_REF 6, 0, !16, !DIExpression(), debug-location !17
+ DBG_INSTR_REF !16, !DIExpression(), dbg-instr-ref(6, 0), debug-location !17\r
; Another debug use-before-def, but across block boundaries.
; CHECK: DBG_VALUE $noreg, $noreg
JMP_1 %bb.3
$rdx = MOV64ri 1, implicit-def $eflags, debug-location !17
JCC_1 %bb.6, 4, implicit $eflags, debug-location !17
bb.5:
- DBG_INSTR_REF 7, 0, !16, !DIExpression(), debug-location !17
+ DBG_INSTR_REF !16, !DIExpression(), dbg-instr-ref(7, 0), debug-location !17\r
; CHECK: DBG_VALUE $noreg, $noreg
JMP_1 %bb.6, debug-location !17
bb.6:
; A use-before-def shouldn't pass another definition of the variable location
; or value.
bb.7:
- DBG_INSTR_REF 8, 0, !16, !DIExpression(), debug-location !17
+ DBG_INSTR_REF !16, !DIExpression(), dbg-instr-ref(8, 0), debug-location !17\r
; CHECK: DBG_VALUE $noreg, $noreg
DBG_VALUE $rax, $noreg, !16, !DIExpression(), debug-location !17
; CHECK: DBG_VALUE $rax, $noreg,
; Loops: use-before-defs should be live-through loops, assuming that nothing
; in that loop modifies the variable location.
bb.8:
- DBG_INSTR_REF 9, 0, !16, !DIExpression(), debug-location !17
+ DBG_INSTR_REF !16, !DIExpression(), dbg-instr-ref(9, 0), debug-location !17\r
; CHECK: DBG_VALUE $noreg, $noreg
JCC_1 %bb.8, 4, implicit $eflags
bb.9:
bb.10:
; live-in,
; CHECK: DBG_VALUE $rax, $noreg,
- DBG_INSTR_REF 10, 0, !16, !DIExpression(), debug-location !17
+ DBG_INSTR_REF !16, !DIExpression(), dbg-instr-ref(10, 0), debug-location !17\r
; CHECK: DBG_VALUE $noreg, $noreg
bb.11:
$rbx = MOV64ri 1, debug-location !17
bb.12:
- DBG_INSTR_REF 9, 0, !16, !DIExpression(), debug-location !17
+ DBG_INSTR_REF !16, !DIExpression(), dbg-instr-ref(9, 0), debug-location !17\r
; This still has a value in $rax,
; CHECK: DBG_VALUE $rax, $noreg
JCC_1 %bb.11, 4, implicit $eflags
$rax = MOV64ri 0
$rdi = MOV64ri 0
- DBG_INSTR_REF 1, 0, !11, !DIExpression(), debug-location !12
+ DBG_INSTR_REF !11, !DIExpression(), dbg-instr-ref(1, 0), debug-location !12\r
; CHECK: DBG_INSTR_REF
; CHECK-NEXT: DBG_VALUE $esi
RET64 $rsi, debug-location !12
liveins: $rdi, $rax
CALL64pcrel32 @ext, csr_64, implicit $rsp, implicit $ssp, implicit $edi, implicit-def $rax, debug-instr-number 4, debug-location !12
; CHECK: CALL64pcrel32
- DBG_INSTR_REF 1, 0, !11, !DIExpression(), debug-location !12
- ; CHECK-NEXT: DBG_INSTR_REF 1, 0
+ DBG_INSTR_REF !11, !DIExpression(), dbg-instr-ref(1, 0), debug-location !12\r
+ ; CHECK-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)\r
; CHECK-NEXT: DBG_VALUE $al
- DBG_INSTR_REF 5, 0, !11, !DIExpression(), debug-location !12
- ; CHECK-NEXT: DBG_INSTR_REF 5, 0
+ DBG_INSTR_REF !11, !DIExpression(), dbg-instr-ref(5, 0), debug-location !12\r
+ ; CHECK-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(5, 0)\r
; CHECK-NEXT: DBG_VALUE $ah
- DBG_INSTR_REF 8, 0, !11, !DIExpression(), debug-location !12
- ; CHECK-NEXT: DBG_INSTR_REF 8, 0
+ DBG_INSTR_REF !11, !DIExpression(), dbg-instr-ref(8, 0), debug-location !12\r
+ ; CHECK-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(8, 0)\r
; CHECK-NEXT: DBG_VALUE $ah
- DBG_INSTR_REF 13, 0, !11, !DIExpression(), debug-location !12
- ; CHECK-NEXT: DBG_INSTR_REF 13, 0
+ DBG_INSTR_REF !11, !DIExpression(), dbg-instr-ref(13, 0), debug-location !12\r
+ ; CHECK-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(13, 0)\r
; CHECK-NEXT: DBG_VALUE $noreg
MOV64mr $rsp, 1, $noreg, 16, $noreg, $rax :: (store 8 into %stack.0)
$rax = MOV64ri 0, debug-location !12
; CHECK: $rax = MOV64ri 0
; The value is now located in a spill slot, as a subregister within the
; slot, which InstrRefBasedLDV should be able to find.
- DBG_INSTR_REF 1, 0, !11, !DIExpression(), debug-location !12
- ; CHECK-NEXT: DBG_INSTR_REF 1, 0
+ DBG_INSTR_REF !11, !DIExpression(), dbg-instr-ref(1, 0), debug-location !12\r
+ ; CHECK-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)\r
; CHECK-NEXT: DBG_VALUE $rsp, 0, !{{[0-9]*}}, !DIExpression(DW_OP_constu, 8, DW_OP_minus)
- DBG_INSTR_REF 5, 0, !11, !DIExpression(), debug-location !12
+ DBG_INSTR_REF !11, !DIExpression(), dbg-instr-ref(5, 0), debug-location !12\r
; This and the next DBG_INSTR_REF refer to a value that is on the stack, but
; is located at a non-zero offset from the start of the slot -- $ah within
; $rax is 8 bits in. Today, InstrRefBasedLDV can't express this. It also
; doesn't seem likely to be profitable.
- ; CHECK-NEXT: DBG_INSTR_REF 5, 0
+ ; CHECK-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(5, 0)\r
; CHECK-NEXT: DBG_VALUE $noreg
- DBG_INSTR_REF 8, 0, !11, !DIExpression(), debug-location !12
- ; CHECK-NEXT: DBG_INSTR_REF 8, 0
+ DBG_INSTR_REF !11, !DIExpression(), dbg-instr-ref(8, 0), debug-location !12\r
+ ; CHECK-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(8, 0)\r
; CHECK-NEXT: DBG_VALUE $noreg
- DBG_INSTR_REF 13, 0, !11, !DIExpression(), debug-location !12
- ; CHECK-NEXT: DBG_INSTR_REF 13, 0
+ DBG_INSTR_REF !11, !DIExpression(), dbg-instr-ref(13, 0), debug-location !12\r
+ ; CHECK-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(13, 0)\r
; CHECK-NEXT: DBG_VALUE $noreg
$rax = MOV64rm $rsp, 1, $noreg, 8, $noreg :: (load 8 from %stack.0)
RET64 $rax, debug-location !12
CALL64r %37, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit $rsi, implicit-def $rsp, implicit-def $ssp, implicit-def $al, debug-location !13
ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !13
%13:gr32 = INC32r %6, implicit-def dead $eflags, debug-instr-number 1, debug-location !13
- DBG_INSTR_REF 1, 0, !12, !DIExpression(), debug-location !13
+ DBG_INSTR_REF !12, !DIExpression(), dbg-instr-ref(1, 0), debug-location !13\r
JMP_1 %bb.1, debug-location !13
...
%7:gr32 = nofpexcept CVTTSS2SIrr killed %1, implicit $mxcsr, debug-instr-number 1
%8:gr8 = COPY killed %7.sub_8bit
- DBG_INSTR_REF 2, 0, !6, !DIExpression(), debug-location !17
+ DBG_INSTR_REF !6, !DIExpression(), dbg-instr-ref(2, 0), debug-location !17\r
TEST8rr killed %8, %8, implicit-def $eflags
JCC_1 %bb.3, 5, implicit killed $eflags
JMP_1 %bb.2
MOV64mr $rsp, 1, $noreg, 16, $noreg, $rdi :: (store 8 into %stack.0)
$rax = MOV64ri 0, debug-location !12
INC32m $rsp, 1, $noreg, 4, $noreg, implicit-def dead $eflags, debug-instr-number 3, debug-location !DILocation(line: 0, scope: !7) :: (store (s32) into %stack.0)
- DBG_INSTR_REF 2, 0, !11, !DIExpression(), debug-location !12
- ; CHECK: DBG_INSTR_REF 2, 0
+ DBG_INSTR_REF !11, !DIExpression(), dbg-instr-ref(2, 0), debug-location !12\r
+ ; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)\r
; CHECK-NEXT: DBG_VALUE $rsp
;; Test that the old value (from the DBG_PHI) is not tracked anywhere. It
;; should not be considered as being on the stack any more.
- DBG_INSTR_REF 1, 0, !11, !DIExpression(), debug-location !12
- ; CHECK: DBG_INSTR_REF 1, 0
+ DBG_INSTR_REF !11, !DIExpression(), dbg-instr-ref(1, 0), debug-location !12\r
+ ; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)\r
; CHECK-NEXT: DBG_VALUE $noreg
INC32m $rsp, 1, $noreg, 4, $noreg, implicit-def dead $eflags, debug-location !12 :: (store (s32) into %stack.0)
;; The above INC32m should be detected as clobbering the stack location,
;; even though it isn't debug labelled.
- DBG_INSTR_REF 2, 0, !11, !DIExpression(), debug-location !12
- ; CHECK: DBG_INSTR_REF 2, 0
+ DBG_INSTR_REF !11, !DIExpression(), dbg-instr-ref(2, 0), debug-location !12\r
+ ; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)\r
; CHECK-NEXT: DBG_VALUE $noreg
;; Store another debug-labelled value to the stack,
INC32m $rsp, 1, $noreg, 4, $noreg, implicit-def dead $eflags, debug-instr-number 5, debug-location !DILocation(line: 0, scope: !7) :: (store (s32) into %stack.0)
;; Point the variable at that value.
- DBG_INSTR_REF 4, 0, !11, !DIExpression(), debug-location !12
- ; CHECK: DBG_INSTR_REF 4, 0,
+ DBG_INSTR_REF !11, !DIExpression(), dbg-instr-ref(4, 0), debug-location !12\r
+ ; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(4, 0),\r
; CHECK-NEXT: DBG_VALUE $rsp
;; Overwrite the stack: LiveDebugValues should explicitly undef the stack
;; location with DBG_VALUE $noreg, as DbgEntityHistoryCalculator doesn't
# CHECK-LABEL: bb.1.if.then.i.i.i.i.i:
# CHECK: DBG_VALUE $rbx, $noreg, ![[FIRSTVAR]],
# CHECK-SAME: !DIExpression(DW_OP_LLVM_fragment, 64, 64)
-# CHECK: DBG_INSTR_REF {{.*}} ![[FIRSTVAR]],
+# CHECK: DBG_INSTR_REF ![[FIRSTVAR]],\r
# CHECK: DBG_VALUE $rbx, $noreg, ![[FIRSTVAR]],
# CHECK-SAME: !DIExpression(DW_OP_LLVM_fragment, 64, 64)
# CHECK-LABEL: bb.2._Z17do_insert_cv_testI5_TreeEvv.exit:
# CHECK: DBG_VALUE $rbx, $noreg, ![[FIRSTVAR]],
# CHECK-SAME: !DIExpression(DW_OP_LLVM_fragment, 64, 64)
-# CHECK: DBG_INSTR_REF {{.*}} ![[FIRSTVAR]],
+# CHECK: DBG_INSTR_REF ![[FIRSTVAR]],\r
# CHECK: DBG_VALUE $rbx, $noreg, ![[FIRSTVAR]],
# CHECK-SAME: !DIExpression(DW_OP_LLVM_fragment, 64, 64)
renamable $r14d = XOR32rr undef $r14d, undef $r14d, implicit-def dead $eflags, implicit-def $r14
dead $edi = XOR32rr undef $edi, undef $edi, implicit-def dead $eflags, implicit-def $rdi
CALL64r undef renamable $rax, csr_64, implicit $rsp, implicit $ssp, implicit killed $rdi, implicit-def $rsp, implicit-def $ssp, implicit-def dead $eax, implicit-def dead $rdx
- DBG_INSTR_REF 2, 0, !13, !DIExpression(DW_OP_LLVM_fragment, 64, 64), debug-location !15
+ DBG_INSTR_REF !13, !DIExpression(DW_OP_LLVM_fragment, 64, 64), dbg-instr-ref(2, 0), debug-location !15\r
dead $edi = XOR32rr undef $edi, undef $edi, implicit-def dead $eflags, implicit-def $rdi, debug-location !15
CALL64r undef renamable $rax, csr_64, implicit $rsp, implicit $ssp, implicit killed $rdi, implicit-def $rsp, implicit-def $ssp, implicit-def dead $al, debug-location !15
TEST8rr renamable $r14b, renamable $r14b, implicit-def $eflags, implicit killed $r14
dead $edi = XOR32rr undef $edi, undef $edi, implicit-def dead $eflags, implicit-def $rdi
CALL64r undef renamable $rax, csr_64, implicit $rsp, implicit $ssp, implicit killed $rdi, implicit-def $rsp, implicit-def $ssp, implicit-def $rax, debug-instr-number 3
$rbx = MOV64rr killed $rax
- DBG_INSTR_REF 3, 7, !13, !DIExpression(DW_OP_LLVM_fragment, 64, 64), debug-location !15
+ DBG_INSTR_REF !13, !DIExpression(DW_OP_LLVM_fragment, 64, 64), dbg-instr-ref(3, 7), debug-location !15\r
bb.2._Z17do_insert_cv_testI5_TreeEvv.exit:
liveins: $rbx
DBG_PHI $rbx, 1
- DBG_INSTR_REF 1, 0, !13, !DIExpression(DW_OP_LLVM_fragment, 64, 64), debug-location !15
+ DBG_INSTR_REF !13, !DIExpression(DW_OP_LLVM_fragment, 64, 64), dbg-instr-ref(1, 0), debug-location !15\r
dead $edi = XOR32rr undef $edi, undef $edi, implicit-def dead $eflags, implicit-def $rdi, debug-location !16
$esi = XOR32rr undef $esi, undef $esi, implicit-def dead $eflags, debug-location !16
$rdx = MOV64rr killed $rbx, debug-location !16
bb.2.if.end:
%2:gr16 = PHI %11, %bb.0, %17, %bb.1, debug-instr-number 1, debug-location !13
; CHECK: DBG_PHI $bp, 1
- DBG_INSTR_REF 1, 0, !12, !DIExpression(), debug-location !13
+ DBG_INSTR_REF !12, !DIExpression(), dbg-instr-ref(1, 0), debug-location !13\r
%31:gr32 = MOVSX32rr16 %6, debug-location !13
%30:gr32 = MOVSX32rr16 killed %2, debug-location !13
%29:gr32 = ADD32rr killed %30, killed %31, implicit-def $eflags, debug-location !13
bb.2.if.end:
%2:gr64 = PHI %9, %bb.0, %10, %bb.1, debug-instr-number 1, debug-location !13
; CHECK: DBG_PHI $r14, 1
- DBG_INSTR_REF 1, 0, !12, !DIExpression(), debug-location !13
+ DBG_INSTR_REF !12, !DIExpression(), dbg-instr-ref(1, 0), debug-location !13
%2:gr64 = ADD64rr killed %2, %6, implicit-def $eflags, debug-location !13
ADJCALLSTACKDOWN64 0, 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !13
$rdi = COPY %2, debug-location !13
%64:gr32 = PHI %24, %bb.0, %44, %bb.1, debug-location !18
INLINEASM &"", 1, 12, %50, 12, %51, 12, %52, 12, %53, 12, %54, 12, %55, 12, %56, 12, %57, 12, %58, 12, %59, 12, %60, 12, %61, 12, %62, 12, %63, 12, %64
- DBG_INSTR_REF 1, 0, !14, !DIExpression(), debug-location !12
+ DBG_INSTR_REF !14, !DIExpression(), dbg-instr-ref(1, 0), debug-location !12\r
; CHECK: DBG_PHI %stack.0, 1, 16
- ; CHECK: DBG_INSTR_REF 1, 0
+ ; CHECK: DBG_INSTR_REF {{.+}} dbg-instr-ref(1, 0)\r
; CHECK: renamable $eax = MOV32rm %stack.0,
$eax = COPY killed %0, debug-location !19
RET 0, killed $eax, debug-location !19
%64:gr32 = PHI %24, %bb.0, %44, %bb.1, debug-location !18
INLINEASM &"", 1, 12, %50, 12, %51, 12, %52, 12, %53, 12, %54, 12, %55, 12, %56, 12, %57, 12, %58, 12, %59, 12, %60, 12, %61, 12, %62, 12, %63, 12, %64
- DBG_INSTR_REF 1, 0, !14, !DIExpression(), debug-location !12
+ DBG_INSTR_REF !14, !DIExpression(), dbg-instr-ref(1, 0), debug-location !12\r
; CHECK-NOT: DBG_PHI
- ; CHECK: DBG_INSTR_REF 1, 0
+ ; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)\r
; CHECK-NOT: DBG_PHI
$eax = COPY killed %0, debug-location !19
RET 0, killed $eax, debug-location !19
%63:gr32 = PHI %23, %bb.0, %43, %bb.1, debug-location !18
%64:gr32 = PHI %24, %bb.0, %44, %bb.1, debug-location !18
- DBG_INSTR_REF 1, 0, !14, !DIExpression(), debug-location !12
+ DBG_INSTR_REF !14, !DIExpression(), dbg-instr-ref(1, 0), debug-location !12\r
; CHECK: DBG_PHI %stack.1, 1, 32
; CHECK: renamable $eax = MOV32rm %stack.1,
- ; CHECK: DBG_INSTR_REF 1, 0
+ ; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)\r
$eax = COPY killed %0, debug-location !19
RET 0, killed $eax, debug-location !19
; CHECK-LABEL: bb.2.if.end:
bb.2.if.end:
%0:gr32 = PHI %1, %bb.0, %2, %bb.1, debug-instr-number 1, debug-location !18
- DBG_INSTR_REF 1, 0, !14, !DIExpression(), debug-location !12
+ DBG_INSTR_REF !14, !DIExpression(), dbg-instr-ref(1, 0), debug-location !12\r
; CHECK: DBG_PHI $ebp, 1
- ; CHECK: DBG_INSTR_REF 1, 0
+ ; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)\r
$eax = COPY killed %0, debug-location !19
; Confirm that %0 is allocated in $ebp,
; CHECK: $eax = COPY killed renamable $ebp
# in block 5.
#
# CHECK-LABEL: bb.3:
-# CHECK: DBG_INSTR_REF 7, 0
+# CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(7, 0)\r
# CHECK-NEXT: DBG_VALUE $rdx
# CHECK-NEXT: $rcx = MOV64rr $rdx
# CHECK-LABEL: bb.4:
liveins: $rcx, $rdi, $rdx, $eflags
DBG_PHI $rcx, 2
- DBG_INSTR_REF 2, 0, !18, !DIExpression(), debug-location !22
+ DBG_INSTR_REF !18, !DIExpression(), dbg-instr-ref(2, 0), debug-location !22\r
JCC_1 %bb.1, 4, implicit $eflags, debug-location !22
bb.2:
liveins: $rcx, $rdi, $eflags
$rdx = MOV64ri 0, debug-instr-number 7, debug-location !22
- DBG_INSTR_REF 7, 0, !18, !DIExpression(), debug-location !22
+ DBG_INSTR_REF !18, !DIExpression(), dbg-instr-ref(7, 0), debug-location !22\r
$rcx = MOV64rr $rdx
JMP_1 %bb.5, debug-location !22
# CHECK: DBG_VALUE $noreg
#
## Test that if there's no limit, we _do_ get some locations.
-# NOLIMIT: DBG_INSTR_REF 1, 0
+# NOLIMIT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)\r
# NOLIMIT-NEXT: DBG_VALUE $esi
#
-# NOLIMIT: DBG_INSTR_REF 5,
+# NOLIMIT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(5,\r
# NOLIMIT-NEXT: DBG_VALUE $rsp
--- |
define i8 @test(i32 %bar) local_unnamed_addr !dbg !7 {
$rax = MOV64ri 0
$rdi = MOV64ri 0
- DBG_INSTR_REF 1, 0, !11, !DIExpression(), debug-location !12
+ DBG_INSTR_REF !11, !DIExpression(), dbg-instr-ref(1, 0), debug-location !12\r
; This shouldn't find anything -- we have disabled tracking of spills.
; In addition to plain spills, spills that are folded into instructions
INC32m $rsp, 1, $noreg, 4, $noreg, implicit-def dead $eflags, debug-instr-number 5, debug-location !12 :: (store (s32) into %stack.0)
- DBG_INSTR_REF 5, 1000000, !11, !DIExpression(), debug-location !12
+ DBG_INSTR_REF !11, !DIExpression(), dbg-instr-ref(5, 1000000), debug-location !12\r
; Shouldn't be able to find the reference to instr 5's memory operand.
RET64 $rsi, debug-location !12
;AAAAAA %4:gr32 = PHI %0, %bb.11, %10, %bb.21, debug-instr-number 1
;BBBBBB %4:gr32 = PHI %0, %bb.11, %10, %bb.21
%5:gr32 = PHI undef %35:gr32, %bb.11, %9, %bb.21
- ;AAAAAA DBG_INSTR_REF 1, 0, !10, !DIExpression(), debug-location !9
+ ;AAAAAA DBG_INSTR_REF !10, !DIExpression(), dbg-instr-ref(1, 0), debug-location !9\r
;BBBBBB DBG_VALUE %4, 0, !10, !DIExpression(), debug-location !9
%39:gr8 = COPY %27.sub_8bit
TEST8rr killed %39, %39, implicit-def $eflags, debug-location !9
# CHECK-NEXT: - { srcinst: 1, srcop: 0, dstinst: 2, dstop: 0, subreg: 0 }
#
# CHECK: MOV64rr $rdi, debug-instr-number 2
-# CHECK-NEXT: DBG_INSTR_REF 1, 0
+# CHECK-NEXT: DBG_INSTR_REF dbg-instr-ref(1, 0)\r
---
name: test
tracksRegLiveness: true
bb.0:
liveins: $rdi, $rax
$rbp = MOV64rr $rdi, debug-instr-number 2
- DBG_INSTR_REF 1, 0
+ DBG_INSTR_REF dbg-instr-ref(1, 0)\r
dead $rcx = MOV64ri 0
CMP64ri8 renamable $rax, 1, implicit-def $eflags
RET64 $rax
# livedebugvars-crossbb-interval.mir.
#
# CHECK-LABEL: bb.0:
-# CHECK: DBG_INSTR_REF 1, 0
+# CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)\r
# CHECK-NEXT: JMP_1
# CHECK-LABEL: bb.1:
-# CHECK: DBG_INSTR_REF 2, 0
+# CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)\r
# CHECK-NEXT: JMP_1
# CHECK-LABEL: bb.2:
-# CHECK: DBG_INSTR_REF 3, 0
+# CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(3, 0)\r
# CHECK-NEXT: CALL64pcrel32
# CHECK-LABEL: bb.3:
-# CHECK: DBG_INSTR_REF 4, 0
+# CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(4, 0)\r
# CHECK-NEXT: JMP_1
#
#
# the DBG_INSTR_REF lands on.
#
# FASTREG-LABEL: bb.0:
-# FASTREG-DAG: DBG_INSTR_REF 1, 0
+# FASTREG-DAG: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)\r
# FASTREG-DAG: MOV64mr
# FASTREG-DAG: MOV32mr
# FASTREG-NEXT: JMP_1
# FASTREG-LABEL: bb.1:
-# FASTREG: DBG_INSTR_REF 2, 0
+# FASTREG: DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)\r
# FASTREG-NEXT: JMP_1
# FASTREG-LABEL: bb.2:
-# FASTREG: DBG_INSTR_REF 3, 0
+# FASTREG: DBG_INSTR_REF {{.+}}, dbg-instr-ref(3, 0)\r
# FASTREG-NEXT: CALL64pcrel32
# FASTREG-LABEL: bb.3:
# FASTREG-DAG: MOV32rm
-# FASTREG-DAG: DBG_INSTR_REF 4, 0
+# FASTREG-DAG: DBG_INSTR_REF {{.+}}, dbg-instr-ref(4, 0)\r
# FASTREG-DAG: MOV32mr
# FASTREG-NEXT: JMP_1
# FASTREG-LABEL: bb.4:
-# FASTREG: DBG_INSTR_REF 5, 0
+# FASTREG: DBG_INSTR_REF {{.+}}, dbg-instr-ref(5, 0)\r
# FASTREG-NEXT: RET64
--- |
%2:gr64 = COPY $rdi
%3:gr64 = COPY killed %2
%5:gr32 = COPY killed %4
- DBG_INSTR_REF 1, 0, !9, !DIExpression(), debug-location !16
+ DBG_INSTR_REF !9, !DIExpression(), dbg-instr-ref(1, 0), debug-location !16\r
JMP_1 %bb.3
bb.1:
- DBG_INSTR_REF 2, 0, !9, !DIExpression(), debug-location !16
+ DBG_INSTR_REF !9, !DIExpression(), dbg-instr-ref(2, 0), debug-location !16\r
JMP_1 %bb.4
bb.2:
ADJCALLSTACKDOWN64 0, 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !19
$edi = COPY %6, debug-location !19
$al = MOV8ri 0, debug-location !19
- DBG_INSTR_REF 3, 0, !9, !DIExpression(), debug-location !16
+ DBG_INSTR_REF !9, !DIExpression(), dbg-instr-ref(3, 0), debug-location !16\r
CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit $al, implicit $edi, implicit-def $eax, debug-location !19
ADJCALLSTACKUP64 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !19
%7:gr32 = COPY $eax, debug-location !19
bb.3:
%6:gr32 = MOV32rm %3, 1, $noreg, 0, $noreg, debug-location !17
- DBG_INSTR_REF 4, 0, !9, !DIExpression(), debug-location !16
+ DBG_INSTR_REF !9, !DIExpression(), dbg-instr-ref(4, 0), debug-location !16\r
JMP_1 %bb.2
bb.4:
$eax = COPY %5, debug-location !18
- DBG_INSTR_REF 5, 0, !9, !DIExpression(), debug-location !16
+ DBG_INSTR_REF !9, !DIExpression(), dbg-instr-ref(5, 0), debug-location !16\r
RET64 implicit $eax, debug-location !18
...
# CHECK: LEA64_32r
# CHECK-SAME: debug-instr-number 2
#
-# CHECK: DBG_INSTR_REF 1, 0
+# CHECK: DBG_INSTR_REF dbg-instr-ref(1, 0)\r
---
name: test1
alignment: 16
%0:gr32 = COPY killed $edi
%1:gr32 = SHL32ri killed %0, 5, implicit-def dead $eflags
%2:gr32 = ADD32ri8_DB killed %1, 3, implicit-def dead $eflags, debug-instr-number 1
- DBG_INSTR_REF 1, 0
+ DBG_INSTR_REF dbg-instr-ref(1, 0)\r
$eax = COPY killed %2
RET 0, killed $eax
CALLpcrel32 &_chkstk, implicit $esp, implicit $ssp, implicit $eax, implicit $esp, implicit-def dead $eax, implicit-def $esp, implicit-def dead $eflags, debug-instr-number 2, debug-location !41
$ebx = MOV32rr $esp, debug-location !41
$eax = MOV32ri 0
- DBG_INSTR_REF 2, 6, !42, !DIExpression(DW_OP_deref), debug-location !46
- ; CHECK-LABEL: DBG_INSTR_REF 2, 6
+ DBG_INSTR_REF !42, !DIExpression(DW_OP_deref), dbg-instr-ref(2, 6), debug-location !46\r
+ ; CHECK-LABEL: DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 6)\r
; CHECK: DBG_VALUE $esp
;; Variable value is $esp / $ebx, will be based on $esp initially. We'll now
; CHECK-NEXT: CALLpcrel32
; CHECK-NEXT: DBG_VALUE $ebx
- DBG_INSTR_REF 3, 6, !42, !DIExpression(DW_OP_deref), debug-location !46
- ; CHECK-NEXT: DBG_INSTR_REF 3, 6
+ DBG_INSTR_REF !42, !DIExpression(DW_OP_deref), dbg-instr-ref(3, 6), debug-location !46\r
+ ; CHECK-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(3, 6)\r
; CHECK-NEXT: DBG_VALUE $esp
$esp = ADD32ri killed $esp, 0, implicit-def dead $eflags
; CHECK-NEXT: ADD32ri
- DBG_INSTR_REF 3, 6, !42, !DIExpression(DW_OP_deref), debug-location !46
- ; CHECK-NEXT: DBG_INSTR_REF 3, 6
+ DBG_INSTR_REF !42, !DIExpression(DW_OP_deref), dbg-instr-ref(3, 6), debug-location !46\r
+ ; CHECK-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(3, 6)\r
; CHECK-NEXT: DBG_VALUE $noreg
$esp = MOV32rr $ebp, debug-location !49
%0:gr64 = MOV64rm killed %1, 1, $noreg, 0, $noreg, debug-location !7 :: (load (s64) from `i8** undef`)
%2:gr32 = COPY %0.sub_32bit, debug-location !7
%3:gr32 = SUB32rm %2, %0, 1, $noreg, 0, $noreg, implicit-def $eflags, debug-instr-number 1, debug-location !7 :: (load (s32) from %ir._M_start.i2756, align 8)
- DBG_INSTR_REF 1, 0, !8, !DIExpression(), debug-location !7
+ DBG_INSTR_REF !8, !DIExpression(), dbg-instr-ref(1, 0), debug-location !7\r
JCC_1 %bb.2, 5, implicit $eflags, debug-location !7
JMP_1 %bb.1, debug-location !7
DBG_PHI $esi, 3
DBG_PHI $edi, 2
- DBG_INSTR_REF 3, 0, !14, !DIExpression(), debug-location !16
+ DBG_INSTR_REF !14, !DIExpression(), dbg-instr-ref(3, 0), debug-location !16
CALL64pcrel32 @"?bar@@YAHXZ", csr_win64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $eax, debug-location !19
renamable $edi = nsw SUB32rr killed renamable $edi, killed renamable $eax, implicit-def dead $eflags, debug-instr-number 1, debug-location !19
renamable $eax = IMUL32rri renamable $edi, -1431655765, implicit-def dead $eflags, debug-location !21
CALL64pcrel32 @"?bar@@YAHXZ", csr_win64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $eax, debug-location !22
renamable $esi = nsw ADD32rr killed renamable $esi, killed renamable $eax, implicit-def dead $eflags, debug-instr-number 4, debug-location !22
- DBG_INSTR_REF 4, 0, !14, !DIExpression(), debug-location !16
+ DBG_INSTR_REF !14, !DIExpression(), dbg-instr-ref(4, 0), debug-location !16
JMP_1 %bb.3
bb.4 (%ir-block.16):
liveins: $esi
CALL64pcrel32 @"?bar@@YAHXZ", csr_win64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $eax, debug-location !31
- DBG_INSTR_REF 5, 0, !14, !DIExpression(), debug-location !16
+ DBG_INSTR_REF !14, !DIExpression(), dbg-instr-ref(5, 0), debug-location !16
bb.6 (%ir-block.22):
liveins: $esi
; INSTRREF: DBG_PHI $edi, 1
; INSTRREF: DBG_VALUE $edi, $noreg, [[BAZVAR]]
; INSTRREF-LABEL: bb.1.next
-; INSTRREF: DBG_INSTR_REF 1, 0, [[XYZVAR]],
+; INSTRREF: DBG_INSTR_REF [[XYZVAR]], {{.+}}, dbg-instr-ref(1, 0)\r
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; INSTRREF-NEXT: DBG_VALUE 123, $noreg, ![[LOCAL]], !DIExpression(),
; INSTRREF: CALL64pcrel32 @bar,
; INSTRREF-NEXT: ADJCALLSTACKUP64
-; INSTRREF: DBG_INSTR_REF 1, 0, ![[LOCAL]], !DIExpression(),
+; INSTRREF: DBG_INSTR_REF ![[LOCAL]], !DIExpression(), dbg-instr-ref(1, 0),\r
; INSTRREF-NOT: DBG_
; INSTRREF: TCRETURNdi64 @bar,
; INSTRREF: CALL64pcrel32 @bar,
; INSTRREF: DBG_VALUE 123, $noreg, ![[T2B]], !DIExpression(),
; INSTRREF: CALL64pcrel32 @bar,
-; INSTRREF: DBG_INSTR_REF 1, 0, ![[T2B]], !DIExpression(),
+; INSTRREF: DBG_INSTR_REF ![[T2B]], !DIExpression(), dbg-instr-ref(1, 0),\r
; INSTRREF: TCRETURNdi64 @bar,
entry:
; INSTRREF: DBG_PHI $edi, 1
; INSTRREF: DBG_VALUE $edi, $noreg, ![[T3A]], !DIExpression(),
; INSTRREF: CALL64pcrel32 @bar,
-; INSTRREF: DBG_INSTR_REF 1, 0, ![[TMP]], !DIExpression(),
+; INSTRREF: DBG_INSTR_REF ![[TMP]], !DIExpression(), dbg-instr-ref(1, 0),\r
; INSTRREF: DBG_VALUE 123, $noreg, ![[T3A]], !DIExpression(),
; INSTRREF: CALL64pcrel32 @bar,
-; INSTRREF: DBG_INSTR_REF 1, 0, ![[T3A]], !DIExpression(),
+; INSTRREF: DBG_INSTR_REF ![[T3A]], !DIExpression(), dbg-instr-ref(1, 0),\r
; INSTRREF: TCRETURNdi64 @bar,
entry:
call void @llvm.dbg.value(metadata i32 %t3a, metadata !33, metadata !DIExpression()), !dbg !35
;; of the earlier DBG_PHIs.
; INSTRREF: ADJCALLSTACKUP
; INSTRREF-NOT: DBG_
-; INSTRREF-DAG: DBG_INSTR_REF 1, 0, ![[S1]], !DIExpression(DW_OP_LLVM_fragment, 0, 64)
-; INSTRREF-DAG: DBG_INSTR_REF 2, 0, ![[S1]], !DIExpression(DW_OP_LLVM_fragment, 64, 64)
+; INSTRREF-DAG: DBG_INSTR_REF ![[S1]], !DIExpression(DW_OP_LLVM_fragment, 0, 64), dbg-instr-ref(1, 0)\r
+; INSTRREF-DAG: DBG_INSTR_REF ![[S1]], !DIExpression(DW_OP_LLVM_fragment, 64, 64), dbg-instr-ref(2, 0)\r
; And then no more DBG_ instructions before the add.
; COMMON-NOT: DBG_
; CHECK: DBG_PHI $edi, 1
-; CHECK: DBG_INSTR_REF 1, 0, ![[LOCAL]], !DIExpression(),
-; CHECK: DBG_INSTR_REF 1, 0, ![[LOCAL2]], !DIExpression(),
+; CHECK: DBG_INSTR_REF ![[LOCAL]], !DIExpression(), dbg-instr-ref(1, 0)\r
+; CHECK: DBG_INSTR_REF ![[LOCAL2]], !DIExpression(), dbg-instr-ref(1, 0)\r
declare void @bar(i32)
declare void @llvm.dbg.value(metadata, metadata, metadata)
;; NB: the original test has an additional spurious DW_OP_deref in the
;; dbg.declare's arguments, which is preserved here, translating to two derefs.
-; CHECK: DBG_INSTR_REF 1, 2, !{{[0-9]+}}, !DIExpression(DW_OP_deref, DW_OP_deref)
+; CHECK: DBG_INSTR_REF !{{[0-9]+}}, !DIExpression(DW_OP_deref, DW_OP_deref), dbg-instr-ref(1, 2)\r
source_filename = "test/DebugInfo/COFF/types-array-advanced.ll"
target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
;; The alloca instruction should be labelled, and we should refer to operand 2,
;; which happens to be a def of $esp
; DYN_LABEL: DYN_ALLOCA_32 {{.*}} debug-instr-number 1,
-; DYN_LABEL: DBG_INSTR_REF 1, 2
+; DYN_LABEL: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 2)\r
;; Once lowered, on win32 _chkstk alters the stack pointer. We should label the
;; call and it's SP operand, plus check for a value substitution.
; Just examine to see that we read something from $rsp.
; CHECK-LABEL: bb.1.if.then:
; CHECK: DBG_PHI $rsp, 1
-; CHECK: DBG_INSTR_REF 1, 0
+; CHECK: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)\r
source_filename = "tlb-9e7172.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
;; vreg that is never defined, which risks a crash. Check that we don't crash,
;; and produce an empty variable location.
-; CHECK: DBG_VALUE $noreg
+; CHECK: DBG_VALUE_LIST {{.+}}, $noreg\r
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
; INSTRREF: ADD32rr
; INSTRREF-SAME: debug-instr-number 1
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0
+; INSTRREF-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)
; INSTRREF-NEXT: ADD32rr
; INSTRREF-SAME: debug-instr-number 2
-; INSTRREF-NEXT: DBG_INSTR_REF 2, 0
+; INSTRREF-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)
; Test that fast-isel will produce DBG_INSTR_REFs too.
; FASTISEL-INSTRREF: ADD32rr
; FASTISEL-INSTRREF-SAME: debug-instr-number 1
-; FASTISEL-INSTRREF-NEXT: DBG_INSTR_REF 1, 0
+; FASTISEL-INSTRREF-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)
; FASTISEL-INSTRREF-NEXT: ADD32rr
; FASTISEL-INSTRREF-SAME: debug-instr-number 2
-; FASTISEL-INSTRREF-NEXT: DBG_INSTR_REF 2, 0
+; FASTISEL-INSTRREF-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)
@glob32 = global i32 0
@glob16 = global i16 0
;; Don't test the location of these instr-refs, only that the three non-argument
;; dbg.values become DBG_INSTR_REFs. We previously checked that these numbers
;; get substituted, with appropriate subregister qualifiers.
-; INSTRREF: DBG_INSTR_REF 2, 0
-; INSTRREF: DBG_INSTR_REF 4, 0
-; INSTRREF: DBG_INSTR_REF 6, 0
+; INSTRREF: DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)
+; INSTRREF: DBG_INSTR_REF {{.+}}, dbg-instr-ref(4, 0)
+; INSTRREF: DBG_INSTR_REF {{.+}}, dbg-instr-ref(6, 0)
;; In fast-isel, we get four DBG_INSTR_REFs (compared to three and one
;; DBG_VALUE with normal isel). We get additional substitutions as a result:
; FASTISEL-INSTRREF-NEXT: DBG_PHI $rdi, 2
; FASTISEL-INSTRREF-NEXT: DBG_PHI $rdi, 1
-; FASTISEL-INSTRREF: DBG_INSTR_REF 1, 0
-; FASTISEL-INSTRREF: DBG_INSTR_REF 3, 0
-; FASTISEL-INSTRREF: DBG_INSTR_REF 6, 0
-; FASTISEL-INSTRREF: DBG_INSTR_REF 10, 0
+; FASTISEL-INSTRREF: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)
+; FASTISEL-INSTRREF: DBG_INSTR_REF {{.+}}, dbg-instr-ref(3, 0)
+; FASTISEL-INSTRREF: DBG_INSTR_REF {{.+}}, dbg-instr-ref(6, 0)
+; FASTISEL-INSTRREF: DBG_INSTR_REF {{.+}}, dbg-instr-ref(10, 0)
define i32 @bar(i64 %bar) !dbg !20 {
entry:
; INSTRREF-NEXT: - { srcinst: 2, srcop: 0, dstinst: 1, dstop: 6, subreg: 4 }
; INSTRREF: CALL64pcrel32 target-flags(x86-plt) @xyzzy, csr_64, implicit $rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax, debug-instr-number 1
-; INSTRREF: DBG_INSTR_REF 2, 0
+; INSTRREF: DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)
;; Fast-isel produces the same arrangement, a DBG_INSTR_REF pointing back to
;; the call instruction. However: the operand numbers are different (6 for
; FASTISEL-INSTRREF-NEXT: - { srcinst: 2, srcop: 0, dstinst: 1, dstop: 4, subreg: 4 }
; FASTISEL-INSTRREF: CALL64pcrel32 target-flags(x86-plt) @xyzzy, csr_64, implicit $rsp, implicit $ssp, implicit-def $rax, debug-instr-number 1
-; FASTISEL-INSTRREF: DBG_INSTR_REF 2, 0
+; FASTISEL-INSTRREF: DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)
declare i64 @xyzzy()
; INSTRREF: DBG_PHI $rdi, 1
; INSTRREF-NEXT: DBG_VALUE $rdi, 0, ![[SOCKS]], !DIExpression(),
; INSTRREF-NEXT: %0:gr64 = COPY $rdi
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[KNEES]], !DIExpression(DW_OP_deref),
+; INSTRREF-NEXT: DBG_INSTR_REF ![[KNEES]], !DIExpression(DW_OP_deref), dbg-instr-ref(1, 0),
; In fast-isel mode, neither variable are hoisted or forwarded to a physreg.
; FASTISEL-INSTRREF-LABEL: name: qux
; FASTISEL-INSTRREF: DBG_PHI $rdi, 1
-; FASTISEL-INSTRREF: DBG_INSTR_REF 1, 0, ![[SOCKS]], !DIExpression(DW_OP_deref),
+; FASTISEL-INSTRREF: DBG_INSTR_REF ![[SOCKS]], !DIExpression(DW_OP_deref), dbg-instr-ref(1, 0),
; FASTISEL-INSTRREF-LABEL: bb.1.lala:
-; FASTISEL-INSTRREF: DBG_INSTR_REF 1, 0, ![[KNEES]], !DIExpression(DW_OP_deref),
+; FASTISEL-INSTRREF: DBG_INSTR_REF ![[KNEES]], !DIExpression(DW_OP_deref), dbg-instr-ref(1, 0),
declare i64 @cheddar(ptr %arg)
define void @qux(ptr noalias sret(i32) %agg.result) !dbg !40 {
; CHECK: $eax = MOV32rm
; INSTRREF-SAME: debug-instr-number 1
-; INSTRREF: DBG_INSTR_REF 1, 0
+; INSTRREF: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)\r
; CHECK: DBG_VALUE $eax
; CHECK: $eax = SHL32rCL killed renamable $eax,
; INSTRREF-SAME: debug-instr-number 2
-; INSTRREF: DBG_INSTR_REF 2, 0
+; INSTRREF: DBG_INSTR_REF {{.+}}, dbg-instr-ref(2, 0)\r
; CHECK: DBG_VALUE $eax
; CHECK: DBG_VALUE $rsp, 0, !{{[0-9]+}}, !DIExpression(DW_OP_constu, 4, DW_OP_minus)
; VARLOCS: DBG_VALUE $eax
; CHECK: $eax = SHL32rCL killed renamable $eax,
; INSTRREF-SAME: debug-instr-number 3
-; INSTRREF: DBG_INSTR_REF 3, 0
+; INSTRREF: DBG_INSTR_REF {{.+}}, dbg-instr-ref(3, 0)\r
; CHECK: DBG_VALUE $eax
; CHECK: RET64 $eax
; CHECK-NEXT: [[LOADR:%[0-9]+]]:gr16 = MOV16rm %0,
; INSTRREF-SAME: debug-instr-number 1
; DBGVALUE-NEXT: DBG_VALUE [[LOADR]], $noreg, ![[DBGVAR]]
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[DBGVAR]]
+; INSTRREF-NEXT: DBG_INSTR_REF ![[DBGVAR]], {{.+}}, dbg-instr-ref(1, 0)\r
; CHECK-NEXT: %{{[0-9]+}}:gr32 = IMPLICIT_DEF
%foo = phi ptr[%bees, %trueb], [%more, %falseb]
%ret = load i32, ptr %foo, !dbg !6
; CHECK-NEXT: DBG_VALUE 0, $noreg, ![[BAR1]], !DIExpression()
; CHECK-NEXT: [[REG1:%[0-9]+]]:gr64 = LEA64r
; INSTRREF-SAME: debug-instr-number 1
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[FOO1]], !DIExpression()
+; INSTRREF-NEXT: DBG_INSTR_REF ![[FOO1]], !DIExpression(), dbg-instr-ref(1, 0)\r
; DBGVALUE-NEXT: DBG_VALUE [[REG1]], $noreg, ![[FOO1]], !DIExpression()
entry1:
call void @llvm.dbg.value(metadata ptr @S, metadata !20, metadata !DIExpression()), !dbg !23
; CHECK-LABEL: bb.0.entry2
; CHECK-NEXT: [[REG2:%[0-9]+]]:gr64 = LEA64r
; INSTRREF-SAME: debug-instr-number 1
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[FOO2]], !DIExpression()
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[BAR2]], !DIExpression()
+; INSTRREF-NEXT: DBG_INSTR_REF ![[FOO2]], !DIExpression(), dbg-instr-ref(1, 0)\r
+; INSTRREF-NEXT: DBG_INSTR_REF ![[BAR2]], !DIExpression(), dbg-instr-ref(1, 0)\r
; DBGVALUE-NEXT: DBG_VALUE [[REG2]], $noreg, ![[FOO2]], !DIExpression
; DBGVALUE-NEXT: DBG_VALUE [[REG2]], $noreg, ![[BAR2]], !DIExpression
entry2:
; CHECK-LABEL: bb.0.entry3
; CHECK-NEXT: [[REG3:%[0-9]+]]:gr64 = LEA64r
; INSTRREF-SAME: debug-instr-number 1
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[BAR3]], !DIExpression()
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[FOO3]], !DIExpression()
+; INSTRREF-NEXT: DBG_INSTR_REF ![[BAR3]], !DIExpression(), dbg-instr-ref(1, 0)\r
+; INSTRREF-NEXT: DBG_INSTR_REF ![[FOO3]], !DIExpression(), dbg-instr-ref(1, 0)\r
; DBGVALUE-NEXT: DBG_VALUE [[REG3]], $noreg, ![[BAR3]], !DIExpression()
; DBGVALUE-NEXT: DBG_VALUE [[REG3]], $noreg, ![[FOO3]], !DIExpression()
entry3:
; CHECK-NEXT: DBG_VALUE 0, $noreg, ![[FOO4]], !DIExpression()
; CHECK-NEXT: [[REG4:%[0-9]+]]:gr64 = LEA64r
; INSTRREF-SAME: debug-instr-number 1
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[BAR4]], !DIExpression()
+; INSTRREF-NEXT: DBG_INSTR_REF ![[BAR4]], !DIExpression(), dbg-instr-ref(1, 0)\r
; DBGVALUE-NEXT: DBG_VALUE [[REG4]], $noreg, ![[BAR4]], !DIExpression()
entry4:
call void @llvm.dbg.value(metadata ptr @S, metadata !42, metadata !DIExpression()), !dbg !44
; CHECK-NEXT: DBG_VALUE 0, $noreg, ![[FOO5]], !DIExpression()
; CHECK-NEXT: [[REG5:%[0-9]+]]:gr64 = LEA64r
; INSTRREF-SAME: debug-instr-number 1
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[BAR5]], !DIExpression()
+; INSTRREF-NEXT: DBG_INSTR_REF ![[BAR5]], !DIExpression(), dbg-instr-ref(1, 0)\r
; DBGVALUE-NEXT: DBG_VALUE [[REG5]], $noreg, ![[BAR5]], !DIExpression()
; CHECK-NOT: DBG_{{.*}} ![[FOO5]], !DIExpression()
; CHECK: RET
; CHECK-LABEL: bb.{{.*}}.for.cond.cleanup:
; CHECK: [[REG1:%[0-9]+]]:gr32 = PHI
; INSTRREF-SAME: debug-instr-number 7
-; INSTRREF-NEXT: DBG_INSTR_REF 7, 0
+; INSTRREF-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(7, 0)\r
; DBGVALUE-NEXT: DBG_VALUE [[REG1]]
%x.0.lcssa = phi i32 [ 9, %entry ], [ %add, %for.body ]
call void @llvm.dbg.value(metadata i32 %x.0.lcssa, metadata !15, metadata !DIExpression()), !dbg !26
; INSTRREF-SAME: debug-instr-number 4
; CHECK-NEXT: [[REG4:%[0-9]+]]:gr32 = PHI
; INSTRREF-SAME: debug-instr-number 5
-; INSTRREF-NEXT: DBG_INSTR_REF 3, 0
-; INSTRREF-NEXT: DBG_INSTR_REF 4, 0
-; INSTRREF-NEXT: DBG_INSTR_REF 5, 0
+; INSTRREF-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(3, 0)\r
+; INSTRREF-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(4, 0)\r
+; INSTRREF-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(5, 0)\r
; DBGVALUE-NEXT: DBG_VALUE [[REG2]]
; DBGVALUE-NEXT: DBG_VALUE [[REG3]]
; DBGVALUE-NEXT: DBG_VALUE [[REG4]]
; CHECK-LABEL: bb.{{.*}}.for.cond.cleanup:
; CHECK: [[REG1:%[0-9]+]]:gr32 = PHI
; INSTRREF-SAME: debug-instr-number 7
-; INSTRREF-NEXT: DBG_INSTR_REF 7, 0
+; INSTRREF-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(7, 0)\r
; DBGVALUE-NEXT: DBG_VALUE [[REG1]]
%x.0.lcssa = phi i32 [ 9, %entry ], [ %add, %for.body ]
call void @llvm.dbg.value(metadata i32 %x.0.lcssa, metadata !15, metadata !DIExpression()), !dbg !26
; INSTRREF-SAME: debug-instr-number 3
; CHECK-NEXT: [[REG4:%[0-9]+]]:gr32 = PHI
; INSTRREF-SAME: debug-instr-number 6
-; INSTRREF-NEXT: DBG_INSTR_REF 3, 0, !16
+; INSTRREF-NEXT: DBG_INSTR_REF !16, {{.+}}, dbg-instr-ref(3, 0)\r
; DBGVALUE-NEXT: DBG_VALUE [[REG3]], $noreg, !16
; CHECK-NEXT: DBG_VALUE 555, $noreg, !17
; CHECK-NEXT: [[ADDREG:%[0-9]+]]:gr32 = nuw nsw ADD32rr
; INSTRREF-SAME: debug-instr-number 5
-; INSTRREF-NEXT: DBG_INSTR_REF 4, 0, !17
+; INSTRREF-NEXT: DBG_INSTR_REF !17, {{.+}}, dbg-instr-ref(4, 0)\r
; DBGVALUE-NEXT: DBG_VALUE [[REG2]], $noreg, !17
; CHECK: [[MULREG:%[0-9]+]]:gr32 = LEA64_32r
; INSTRREF-SAME: debug-instr-number 1
; CHECK-NEXT: DBG_VALUE 777, $noreg, !17
;;; XXX: The following DBG_INSTR_REF should have stayed below the INC32r
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, !16
+; INSTRREF-NEXT: DBG_INSTR_REF !16, {{.+}}, dbg-instr-ref(1, 0)\r
; DBGVALUE-NEXT: DBG_VALUE [[MULREG]], $noreg, !16
; CHECK-NEXT: [[INCREG:%[0-9]+]]:gr32 = nuw nsw INC32r
; INSTRREF-SAME: debug-instr-number 2
-; INSTRREF-NEXT: DBG_INSTR_REF 2, 0, !17
-; INSTRREF-NEXT: DBG_INSTR_REF 5, 0, !15
+; INSTRREF-NEXT: DBG_INSTR_REF !17, {{.+}}, dbg-instr-ref(2, 0)\r
+; INSTRREF-NEXT: DBG_INSTR_REF !15, {{.+}}, dbg-instr-ref(5, 0)\r
; DBGVALUE-NEXT: DBG_VALUE [[INCREG]], $noreg, !17
; DBGVALUE-NEXT: DBG_VALUE [[ADDREG]], $noreg, !15
; CHECK-NEXT: implicit-def $eflags,
-; INSTRREF-NEXT: DBG_INSTR_REF 6, 0
+; INSTRREF-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(6, 0)\r
; DBGVALUE-NEXT: DBG_VALUE [[REG4]]
%u.023 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.body ]
%y.022 = phi i32 [ 13, %for.body.lr.ph ], [ %mul, %for.body ]
; INSTRREF-SAME: debug-instr-number 9
; CHECK-NEXT: [[REG7:%[0-9]+]]:gr32 = PHI
; INSTRREF-SAME: debug-instr-number 10
-; INSTRREF-NEXT: DBG_INSTR_REF 5, 0, !19, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
-; INSTRREF-NEXT: DBG_INSTR_REF 6, 0, !19, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
-; INSTRREF-NEXT: DBG_INSTR_REF 7, 0, !18, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
-; INSTRREF-NEXT: DBG_INSTR_REF 8, 0, !18, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
-; INSTRREF-NEXT: DBG_INSTR_REF 9, 0, !17, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
-; INSTRREF-NEXT: DBG_INSTR_REF 10, 0, !17, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
+; INSTRREF-NEXT: DBG_INSTR_REF !19, !DIExpression(DW_OP_LLVM_fragment, 0, 32), dbg-instr-ref(5, 0)\r
+; INSTRREF-NEXT: DBG_INSTR_REF !19, !DIExpression(DW_OP_LLVM_fragment, 32, 32), dbg-instr-ref(6, 0)\r
+; INSTRREF-NEXT: DBG_INSTR_REF !18, !DIExpression(DW_OP_LLVM_fragment, 0, 32), dbg-instr-ref(7, 0)\r
+; INSTRREF-NEXT: DBG_INSTR_REF !18, !DIExpression(DW_OP_LLVM_fragment, 32, 32), dbg-instr-ref(8, 0)\r
+; INSTRREF-NEXT: DBG_INSTR_REF !17, !DIExpression(DW_OP_LLVM_fragment, 0, 32), dbg-instr-ref(9, 0)\r
+; INSTRREF-NEXT: DBG_INSTR_REF !17, !DIExpression(DW_OP_LLVM_fragment, 32, 32), dbg-instr-ref(10, 0)\r
; DBGVALUE-NEXT: DBG_VALUE [[REG2]], $noreg, !19, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
; DBGVALUE-NEXT: DBG_VALUE [[REG3]], $noreg, !19, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
; DBGVALUE-NEXT: DBG_VALUE [[REG4]], $noreg, !18, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
; INSTRREF-SAME: debug-instr-number 2
; CHECK-NEXT: [[REG3:%[0-9]+]]:gr32 = PHI
; INSTRREF-SAME: debug-instr-number 3
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, !13, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
-; INSTRREF-NEXT: DBG_INSTR_REF 2, 0, !13, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
-; INSTRREF-NEXT: DBG_INSTR_REF 3, 0, !13, !DIExpression(DW_OP_LLVM_fragment, 64, 16)
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, !12, !DIExpression(DW_OP_LLVM_fragment, 10, 32)
-; INSTRREF-NEXT: DBG_INSTR_REF 2, 0, !12, !DIExpression(DW_OP_LLVM_fragment, 42, 13)
+; INSTRREF-NEXT: DBG_INSTR_REF !13, !DIExpression(DW_OP_LLVM_fragment, 0, 32), dbg-instr-ref(1, 0)\r
+; INSTRREF-NEXT: DBG_INSTR_REF !13, !DIExpression(DW_OP_LLVM_fragment, 32, 32), dbg-instr-ref(2, 0)\r
+; INSTRREF-NEXT: DBG_INSTR_REF !13, !DIExpression(DW_OP_LLVM_fragment, 64, 16), dbg-instr-ref(3, 0)\r
+; INSTRREF-NEXT: DBG_INSTR_REF !12, !DIExpression(DW_OP_LLVM_fragment, 10, 32), dbg-instr-ref(1, 0)\r
+; INSTRREF-NEXT: DBG_INSTR_REF !12, !DIExpression(DW_OP_LLVM_fragment, 42, 13), dbg-instr-ref(2, 0)\r
; DBGVALUE-NEXT: DBG_VALUE [[REG1]], $noreg, !13, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
; DBGVALUE-NEXT: DBG_VALUE [[REG2]], $noreg, !13, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
; DBGVALUE-NEXT: DBG_VALUE [[REG3]], $noreg, !13, !DIExpression(DW_OP_LLVM_fragment, 64, 16)
%2 = mul i32 %0, %arg1, !dbg !26
; CHECK: IMUL32rr
call void @llvm.dbg.value(metadata i32 %1, metadata !16, metadata !DIExpression()), !dbg !27
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0
+; INSTRREF-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)\r
; DBGVALUE-NEXT: DBG_VALUE
br label %exit, !dbg !26
; CHECK-LABEL: bb.0.entry:
; INSTRREF: DBG_PHI $rdi, 1
; CHECK-LABEL: bb.1.next:
-; INSTRREF: DBG_INSTR_REF 1, 0, ![[AAAVAR]]
+; INSTRREF: DBG_INSTR_REF ![[AAAVAR]], {{.+}}, dbg-instr-ref(1, 0)\r
; DBGVALUE: DBG_VALUE %{{[0-9]+}}, $noreg, ![[AAAVAR]]
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
; CHECK: ![[MYVAR:.*]] = !DILocalVariable(name: "myVar",
; CHECK: $rax = MOV64rm
; INSTRREF-SAME: debug-instr-number 2,
-; INSTRREF-NEXT: DBG_INSTR_REF 2, 0, ![[S4]],
+; INSTRREF-NEXT: DBG_INSTR_REF ![[S4]],\r
; DBGVALUE-NEXT: DBG_VALUE $rax, $noreg, ![[MYVAR]],
; CHECK-SAME: !DIExpression(DW_OP_plus_uconst, 4096, DW_OP_stack_value)
+; INSTRREF-SAME: dbg-instr-ref(2, 0)\r
-; INSTRREF: DBG_INSTR_REF 2, 0, ![[MYVAR]],
+; INSTRREF: DBG_INSTR_REF ![[MYVAR]],\r
; DBGVALUE: DBG_VALUE $rax, $noreg, ![[S4]],
; CHECK-SAME: !DIExpression(DW_OP_plus_uconst, 4096, DW_OP_stack_value)
+; INSTRREF-SAME: dbg-instr-ref(2, 0)\r
; CHECK-NEXT: $rdi = MOV64rm killed renamable $rax, 1, $noreg, 4096, $noreg,
source_filename = "test.c"
; CHECK-LABEL: bb.0.entry:
; CHECK: %[[REG:[0-9]+]]:gr32 = ADD32ri %1, 512,
; INSTRREF-SAME: debug-instr-number 1
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0
+; INSTRREF-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)\r
; DBGVALUE-NEXT: DBG_VALUE %[[REG]]
; Function Attrs: nofree norecurse nounwind uwtable writeonly
; CHECK: CALL64pcrel32 @getInt{{.*}}debug-instr-number 1
; CHECK-LABEL: bb.2.while.body:
-; CHECK: DBG_INSTR_REF 1, 6, ![[A]], !DIExpression()
+; CHECK: DBG_INSTR_REF ![[A]], !DIExpression(), dbg-instr-ref(1, 6)
; CHECK-LABEL: bb.3.while.end:
; CHECK: MOV32mr %stack.0.a.addr, 1, $noreg, 0, $noreg, %1
; DBGVALUE: %2:gr64 = nsw ADD64ri8 %1, 2, implicit-def dead $eflags, debug-location
; DBGVALUE-NEXT: DBG_VALUE %2, $noreg, ![[VAR]], !DIExpression(DW_OP_LLVM_fragment, 64, 64), debug-location
; INSTRREF: %2:gr64 = nsw ADD64ri8 %1, 2, implicit-def dead $eflags, debug-instr-number 1
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[VAR]], !DIExpression(DW_OP_LLVM_fragment, 64, 64), debug-location
+; INSTRREF-NEXT: DBG_INSTR_REF ![[VAR]], !DIExpression(DW_OP_LLVM_fragment, 64, 64), dbg-instr-ref(1, 0), debug-location
source_filename = "test.cpp"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
; CHECK-NEXT: DBG_VALUE 0, $noreg, ![[BAR1]], !DIExpression()
; CHECK-NEXT: [[REG1:%[0-9]+]]:gr64 = LEA64r
; INSTRREF-SAME: debug-instr-number 1
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[FOO1]], !DIExpression()
+; INSTRREF-NEXT: DBG_INSTR_REF ![[FOO1]], !DIExpression(), dbg-instr-ref(1, 0)
; DBGVALUE-NEXT: DBG_VALUE [[REG1]], $noreg, ![[FOO1]], !DIExpression()
entry1:
call void @llvm.dbg.assign(metadata ptr @S, metadata !20, metadata !DIExpression(), metadata !54, metadata ptr undef, metadata !DIExpression()), !dbg !23
; CHECK-LABEL: bb.0.entry2
; CHECK-NEXT: [[REG2:%[0-9]+]]:gr64 = LEA64r
; INSTRREF-SAME: debug-instr-number 1
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[FOO2]], !DIExpression()
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[BAR2]], !DIExpression()
+; INSTRREF-NEXT: DBG_INSTR_REF ![[FOO2]], !DIExpression(), dbg-instr-ref(1, 0)
+; INSTRREF-NEXT: DBG_INSTR_REF ![[BAR2]], !DIExpression(), dbg-instr-ref(1, 0)
; DBGVALUE-NEXT: DBG_VALUE [[REG2]], $noreg, ![[FOO2]], !DIExpression
; DBGVALUE-NEXT: DBG_VALUE [[REG2]], $noreg, ![[BAR2]], !DIExpression
entry2:
; CHECK-LABEL: bb.0.entry3
; CHECK-NEXT: [[REG3:%[0-9]+]]:gr64 = LEA64r
; INSTRREF-SAME: debug-instr-number 1
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[BAR3]], !DIExpression()
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[FOO3]], !DIExpression()
+; INSTRREF-NEXT: DBG_INSTR_REF ![[BAR3]], !DIExpression(), dbg-instr-ref(1, 0)
+; INSTRREF-NEXT: DBG_INSTR_REF ![[FOO3]], !DIExpression(), dbg-instr-ref(1, 0)
; DBGVALUE-NEXT: DBG_VALUE [[REG3]], $noreg, ![[BAR3]], !DIExpression()
; DBGVALUE-NEXT: DBG_VALUE [[REG3]], $noreg, ![[FOO3]], !DIExpression()
entry3:
; CHECK-NEXT: DBG_VALUE 0, $noreg, ![[FOO4]], !DIExpression()
; CHECK-NEXT: [[REG4:%[0-9]+]]:gr64 = LEA64r
; INSTRREF-SAME: debug-instr-number 1
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[BAR4]], !DIExpression()
+; INSTRREF-NEXT: DBG_INSTR_REF ![[BAR4]], !DIExpression(), dbg-instr-ref(1, 0)
; DBGVALUE-NEXT: DBG_VALUE [[REG4]], $noreg, ![[BAR4]], !DIExpression()
entry4:
call void @llvm.dbg.assign(metadata ptr @S, metadata !42, metadata !DIExpression(), metadata !54, metadata ptr undef, metadata !DIExpression()), !dbg !44
; CHECK-NEXT: DBG_VALUE 0, $noreg, ![[FOO5]], !DIExpression()
; CHECK-NEXT: [[REG5:%[0-9]+]]:gr64 = LEA64r
; INSTRREF-SAME: debug-instr-number 1
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0, ![[BAR5]], !DIExpression()
+; INSTRREF-NEXT: DBG_INSTR_REF ![[BAR5]], !DIExpression(), dbg-instr-ref(1, 0)
; DBGVALUE-NEXT: DBG_VALUE [[REG5]], $noreg, ![[BAR5]], !DIExpression()
; CHECK-NOT: DBG_{{.*}} ![[FOO5]], !DIExpression()
; CHECK: RET
; CHECK-LABEL: bb.0.entry:
; INSTRREF: DBG_PHI $rdi, 1
; CHECK-LABEL: bb.1.next:
-; INSTRREF: DBG_INSTR_REF 1, 0, ![[AAAVAR]]
+; INSTRREF: DBG_INSTR_REF ![[AAAVAR]], {{.+}}, dbg-instr-ref(1, 0)
; DBGVALUE: DBG_VALUE %{{[0-9]+}}, $noreg, ![[AAAVAR]]
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
; DBGVALUE: %[[REG:[0-9]+]]:gr32 = ADD32ri %1, 512
; DBGVALUE-NEXT: DBG_VALUE %[[REG]]
; INSTRREF: ADD32ri %1, 512, {{.*}}debug-instr-number 1
-; INSTRREF-NEXT: DBG_INSTR_REF 1, 0
+; INSTRREF-NEXT: DBG_INSTR_REF {{.+}}, dbg-instr-ref(1, 0)
; Function Attrs: nofree norecurse nounwind uwtable writeonly
define dso_local i32 @foo(i32 %a, ptr nocapture %b) local_unnamed_addr !dbg !7 {
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