phy: starfive: jh7110-usb: Fix link configuration to controller
authorJan Kiszka <jan.kiszka@siemens.com>
Tue, 15 Oct 2024 07:04:44 +0000 (15:04 +0800)
committerVinod Koul <vkoul@kernel.org>
Thu, 17 Oct 2024 14:49:44 +0000 (20:19 +0530)
In order to connect the USB 2.0 PHY to its controller, we also need to
set "u0_pdrstn_split_sw_usbpipe_plugen" [1]. Some downstream U-Boot
versions did that, but upstream firmware does not, and the kernel must
not rely on such behavior anyway. Failing to set this left the USB
gadget port invisible to connected hosts behind.

Link: https://doc-en.rvspace.org/JH7110/TRM/JH7110_TRM/sys_syscon.html#sys_syscon__section_b3l_fqs_wsb
Fixes: 16d3a71c20cf ("phy: starfive: Add JH7110 USB 2.0 PHY driver")
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20241015070444.20972-2-minda.chen@starfivetech.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/starfive/phy-jh7110-usb.c

index 633912f8a05d04e913eecf4ad5e4608dbace6f32..cb5454fbe2c8fa2de425d50a481fd6c8500a7a91 100644 (file)
 #include <linux/clk.h>
 #include <linux/err.h>
 #include <linux/io.h>
+#include <linux/mfd/syscon.h>
 #include <linux/module.h>
 #include <linux/phy/phy.h>
 #include <linux/platform_device.h>
+#include <linux/regmap.h>
 #include <linux/usb/of.h>
 
 #define USB_125M_CLK_RATE              125000000
 #define USB_LS_KEEPALIVE_OFF           0x4
 #define USB_LS_KEEPALIVE_ENABLE                BIT(4)
 
+#define USB_PDRSTN_SPLIT               BIT(17)
+#define SYSCON_USB_SPLIT_OFFSET                0x18
+
 struct jh7110_usb2_phy {
        struct phy *phy;
        void __iomem *regs;
+       struct regmap *sys_syscon;
        struct clk *usb_125m_clk;
        struct clk *app_125m;
        enum phy_mode mode;
@@ -61,6 +67,10 @@ static int usb2_phy_set_mode(struct phy *_phy,
                usb2_set_ls_keepalive(phy, (mode != PHY_MODE_USB_DEVICE));
        }
 
+       /* Connect usb 2.0 phy mode */
+       regmap_update_bits(phy->sys_syscon, SYSCON_USB_SPLIT_OFFSET,
+                          USB_PDRSTN_SPLIT, USB_PDRSTN_SPLIT);
+
        return 0;
 }
 
@@ -129,6 +139,12 @@ static int jh7110_usb_phy_probe(struct platform_device *pdev)
        phy_set_drvdata(phy->phy, phy);
        phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
 
+       phy->sys_syscon =
+               syscon_regmap_lookup_by_compatible("starfive,jh7110-sys-syscon");
+       if (IS_ERR(phy->sys_syscon))
+               return dev_err_probe(dev, PTR_ERR(phy->sys_syscon),
+                                    "Failed to get sys-syscon\n");
+
        return PTR_ERR_OR_ZERO(phy_provider);
 }