i386.opt: New option mstack-protector-guard=.

	* config/i386/i386.opt: New option mstack-protector-guard=.
	* config/i386/i386-opts.h: Add enum stack_protector_guard.
	* config/i386/i386.h: Define TARGET_SSP_GLOBAL_GUARD and
	TARGET_SSP_TLS_GUARD.
	* config/i386/i386.c (ix86_option_override_internal): Set
	ix86_stack_protector_guard.
	* config/i386/i386.md (stack_protect_set): Enable for
	TARGET_SSP_TLS_GUARD only.
	(stack_protect_set_<mode>): Ditto.
	(stack_protect_test): Ditto.
	(stack_protect_test_<mode>): Ditto.
	* doc/invoke.texi (i386 Option): Document.

From-SVN: r197963

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 06d603d..8ad6eb8 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,18 @@
+2013-04-15  Andrew Hsieh  <andrewhsieh.google.com>
+
+       * config/i386/i386.opt: New option mstack-protector-guard=.
+       * config/i386/i386-opts.h: Add enum stack_protector_guard.
+       * config/i386/i386.h: Define TARGET_SSP_GLOBAL_GUARD and
+       TARGET_SSP_TLS_GUARD.
+       * config/i386/i386.c (ix86_option_override_internal): Set
+       ix86_stack_protector_guard.
+       * config/i386/i386.md (stack_protect_set): Enable for
+       TARGET_SSP_TLS_GUARD only.
+       (stack_protect_set_<mode>): Ditto.
+       (stack_protect_test): Ditto.
+       (stack_protect_test_<mode>): Ditto.
+       * doc/invoke.texi (i386 Option): Document.
+
 2013-04-15  Eric Botcazou  <ebotcazou@adacore.com>
 
        PR target/56890

diff --git a/gcc/config/i386/i386-opts.h b/gcc/config/i386/i386-opts.h
index 11c0845..61f04ce 100644 (file)
--- a/gcc/config/i386/i386-opts.h
+++ b/gcc/config/i386/i386-opts.h
@@ -85,4 +85,9 @@ enum ix86_veclibabi {
   ix86_veclibabi_type_acml
 };
 
+enum stack_protector_guard {
+  SSP_TLS,      /* per-thread canary in TLS block */
+  SSP_GLOBAL    /* global canary */
+};
+
 #endif

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 4d4c618..940f388 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -3922,6 +3922,10 @@ ix86_option_override_internal (bool main_args_p)
   if (main_args_p)
     target_option_default_node = target_option_current_node
       = build_target_option_node ();
+
+  /* Handle stack protector */
+  if (!global_options_set.x_ix86_stack_protector_guard)
+    ix86_stack_protector_guard = TARGET_HAS_BIONIC ? SSP_GLOBAL : SSP_TLS;
 }
 
 /* Implement the TARGET_OPTION_OVERRIDE hook.  */

diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 5d31f80..037ec3e 100644 (file)
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -486,6 +486,9 @@ extern unsigned char x86_prefetch_sse;
 #define TARGET_TLS_DIRECT_SEG_REFS_DEFAULT 0
 #endif
 
+#define TARGET_SSP_GLOBAL_GUARD (ix86_stack_protector_guard == SSP_GLOBAL)
+#define TARGET_SSP_TLS_GUARD    (ix86_stack_protector_guard == SSP_TLS)
+
 /* Fence to use after loop using storent.  */
 
 extern tree x86_mfence;

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index b9ca95b..27e33c1 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -17058,7 +17058,7 @@
 (define_expand "stack_protect_set"
   [(match_operand 0 "memory_operand")
    (match_operand 1 "memory_operand")]
-  "!TARGET_HAS_BIONIC"
+  "TARGET_SSP_TLS_GUARD"
 {
   rtx (*insn)(rtx, rtx);
 
@@ -17083,7 +17083,7 @@
                    UNSPEC_SP_SET))
    (set (match_scratch:PTR 2 "=&r") (const_int 0))
    (clobber (reg:CC FLAGS_REG))]
-  "!TARGET_HAS_BIONIC"
+  "TARGET_SSP_TLS_GUARD"
   "mov{<imodesuffix>}\t{%1, %2|%2, %1}\;mov{<imodesuffix>}\t{%2, %0|%0, %2}\;xor{l}\t%k2, %k2"
   [(set_attr "type" "multi")])
 
@@ -17101,7 +17101,7 @@
   [(match_operand 0 "memory_operand")
    (match_operand 1 "memory_operand")
    (match_operand 2)]
-  "!TARGET_HAS_BIONIC"
+  "TARGET_SSP_TLS_GUARD"
 {
   rtx flags = gen_rtx_REG (CCZmode, FLAGS_REG);
 
@@ -17131,7 +17131,7 @@
                     (match_operand:PTR 2 "memory_operand" "m")]
                    UNSPEC_SP_TEST))
    (clobber (match_scratch:PTR 3 "=&r"))]
-  "!TARGET_HAS_BIONIC"
+  "TARGET_SSP_TLS_GUARD"
   "mov{<imodesuffix>}\t{%1, %3|%3, %1}\;xor{<imodesuffix>}\t{%2, %3|%3, %2}"
   [(set_attr "type" "multi")])
 

diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt
index 084a248..f5ad69e 100644 (file)
--- a/gcc/config/i386/i386.opt
+++ b/gcc/config/i386/i386.opt
@@ -626,3 +626,17 @@ Split 32-byte AVX unaligned store
 mrtm
 Target Report Mask(ISA_RTM) Var(ix86_isa_flags) Save
 Support RTM built-in functions and code generation
+
+mstack-protector-guard=
+Target RejectNegative Joined Enum(stack_protector_guard) Var(ix86_stack_protector_guard) Init(SSP_TLS)
+Use given stack-protector guard
+
+Enum
+Name(stack_protector_guard) Type(enum stack_protector_guard)
+Known stack protector guard (for use with the -mstack-protector-guard= option):
+
+EnumValue
+Enum(stack_protector_guard) String(tls) Value(SSP_TLS)
+
+EnumValue
+Enum(stack_protector_guard) String(global) Value(SSP_GLOBAL)

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 30445ec..e136c9d 100644 (file)
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -657,7 +657,8 @@ Objective-C and Objective-C++ Dialects}.
 -mcmodel=@var{code-model} -mabi=@var{name} -maddress-mode=@var{mode} @gol
 -m32 -m64 -mx32 -mlarge-data-threshold=@var{num} @gol
 -msse2avx -mfentry -m8bit-idiv @gol
--mavx256-split-unaligned-load -mavx256-split-unaligned-store}
+-mavx256-split-unaligned-load -mavx256-split-unaligned-store @gol
+-mstack-protector-guard=@var{guard}}
 
 @emph{i386 and x86-64 Windows Options}
 @gccoptlist{-mconsole -mcygwin -mno-cygwin -mdll @gol
@@ -14592,6 +14593,13 @@ to 255, 8-bit unsigned integer divide is used instead of
 @opindex avx256-split-unaligned-store
 Split 32-byte AVX unaligned load and store.
 
+@item -mstack-protector-guard=@var{guard}
+@opindex mstack-protector-guard=@var{guard}
+Generate stack protection code using canary at @var{guard}.  Supported
+locations are @samp{global} or @samp{tls} per thread at %gs:20 (the default).
+This option has effect only when @option{-fstack-protector}
+or @option{-fstack-protector-all} is also specified.
+
 @end table
 
 These @samp{-m} switches are supported in addition to the above