i965: Split BRW_NEW_BINDING_TABLE dirty bit into one per stage.
authorKenneth Graunke <kenneth@whitecape.org>
Tue, 22 Feb 2011 21:30:02 +0000 (13:30 -0800)
committerKenneth Graunke <kenneth@whitecape.org>
Wed, 18 May 2011 06:32:59 +0000 (23:32 -0700)
Ivybridge can update each stage's binding table pointer independently,
so we want separate dirty bits.  Previous generations can simply
subscribe to all three dirty bits and emit as usual.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
src/mesa/drivers/dri/i965/brw_context.h
src/mesa/drivers/dri/i965/brw_misc_state.c
src/mesa/drivers/dri/i965/brw_state_upload.c
src/mesa/drivers/dri/i965/brw_vs_surface_state.c
src/mesa/drivers/dri/i965/brw_wm_surface_state.c

index b3d297d..22a6826 100644 (file)
@@ -132,7 +132,9 @@ enum brw_state_id {
    BRW_STATE_WM_INPUT_DIMENSIONS,
    BRW_STATE_PSP,
    BRW_STATE_WM_SURFACES,
-   BRW_STATE_BINDING_TABLE,
+   BRW_STATE_VS_BINDING_TABLE,
+   BRW_STATE_GS_BINDING_TABLE,
+   BRW_STATE_PS_BINDING_TABLE,
    BRW_STATE_INDICES,
    BRW_STATE_VERTICES,
    BRW_STATE_BATCH,
@@ -155,21 +157,23 @@ enum brw_state_id {
 #define BRW_NEW_WM_INPUT_DIMENSIONS     (1 << BRW_STATE_WM_INPUT_DIMENSIONS)
 #define BRW_NEW_PSP                     (1 << BRW_STATE_PSP)
 #define BRW_NEW_WM_SURFACES            (1 << BRW_STATE_WM_SURFACES)
-#define BRW_NEW_BINDING_TABLE          (1 << BRW_STATE_BINDING_TABLE)
+#define BRW_NEW_VS_BINDING_TABLE       (1 << BRW_STATE_VS_BINDING_TABLE)
+#define BRW_NEW_GS_BINDING_TABLE       (1 << BRW_STATE_GS_BINDING_TABLE)
+#define BRW_NEW_PS_BINDING_TABLE       (1 << BRW_STATE_PS_BINDING_TABLE)
 #define BRW_NEW_INDICES                        (1 << BRW_STATE_INDICES)
 #define BRW_NEW_VERTICES               (1 << BRW_STATE_VERTICES)
 /**
  * Used for any batch entry with a relocated pointer that will be used
  * by any 3D rendering.
  */
-#define BRW_NEW_BATCH                  (1 << BRW_STATE_BATCH)
+#define BRW_NEW_BATCH                  (1 << BRW_STATE_BATCH)
 /** \see brw.state.depth_region */
-#define BRW_NEW_DEPTH_BUFFER           (1 << BRW_STATE_DEPTH_BUFFER)
-#define BRW_NEW_NR_WM_SURFACES         (1 << BRW_STATE_NR_WM_SURFACES)
-#define BRW_NEW_NR_VS_SURFACES         (1 << BRW_STATE_NR_VS_SURFACES)
-#define BRW_NEW_INDEX_BUFFER           (1 << BRW_STATE_INDEX_BUFFER)
-#define BRW_NEW_VS_CONSTBUF            (1 << BRW_STATE_VS_CONSTBUF)
-#define BRW_NEW_WM_CONSTBUF            (1 << BRW_STATE_WM_CONSTBUF)
+#define BRW_NEW_DEPTH_BUFFER           (1 << BRW_STATE_DEPTH_BUFFER)
+#define BRW_NEW_NR_WM_SURFACES         (1 << BRW_STATE_NR_WM_SURFACES)
+#define BRW_NEW_NR_VS_SURFACES         (1 << BRW_STATE_NR_VS_SURFACES)
+#define BRW_NEW_INDEX_BUFFER           (1 << BRW_STATE_INDEX_BUFFER)
+#define BRW_NEW_VS_CONSTBUF            (1 << BRW_STATE_VS_CONSTBUF)
+#define BRW_NEW_WM_CONSTBUF            (1 << BRW_STATE_WM_CONSTBUF)
 
 struct brw_state_flags {
    /** State update flags signalled by mesa internals */
index 7119786..ed6a09d 100644 (file)
@@ -86,7 +86,10 @@ static void upload_binding_table_pointers(struct brw_context *brw)
 const struct brw_tracked_state brw_binding_table_pointers = {
    .dirty = {
       .mesa = 0,
-      .brw = BRW_NEW_BATCH | BRW_NEW_BINDING_TABLE,
+      .brw = BRW_NEW_BATCH
+          | BRW_NEW_VS_BINDING_TABLE
+          | BRW_NEW_GS_BINDING_TABLE
+          | BRW_NEW_PS_BINDING_TABLE,
       .cache = 0,
    },
    .emit = upload_binding_table_pointers,
@@ -118,7 +121,10 @@ static void upload_gen6_binding_table_pointers(struct brw_context *brw)
 const struct brw_tracked_state gen6_binding_table_pointers = {
    .dirty = {
       .mesa = 0,
-      .brw = BRW_NEW_BATCH | BRW_NEW_BINDING_TABLE,
+      .brw = BRW_NEW_BATCH
+          | BRW_NEW_VS_BINDING_TABLE
+          | BRW_NEW_GS_BINDING_TABLE
+          | BRW_NEW_PS_BINDING_TABLE,
       .cache = 0,
    },
    .emit = upload_gen6_binding_table_pointers,
index 062d98e..6684cdc 100644 (file)
@@ -370,7 +370,6 @@ static struct dirty_bit_map brw_bits[] = {
    DEFINE_BIT(BRW_NEW_WM_INPUT_DIMENSIONS),
    DEFINE_BIT(BRW_NEW_PSP),
    DEFINE_BIT(BRW_NEW_WM_SURFACES),
-   DEFINE_BIT(BRW_NEW_BINDING_TABLE),
    DEFINE_BIT(BRW_NEW_INDICES),
    DEFINE_BIT(BRW_NEW_INDEX_BUFFER),
    DEFINE_BIT(BRW_NEW_VERTICES),
@@ -380,6 +379,9 @@ static struct dirty_bit_map brw_bits[] = {
    DEFINE_BIT(BRW_NEW_NR_VS_SURFACES),
    DEFINE_BIT(BRW_NEW_VS_CONSTBUF),
    DEFINE_BIT(BRW_NEW_WM_CONSTBUF),
+   DEFINE_BIT(BRW_NEW_VS_BINDING_TABLE),
+   DEFINE_BIT(BRW_NEW_GS_BINDING_TABLE),
+   DEFINE_BIT(BRW_NEW_PS_BINDING_TABLE),
    {0, 0, 0}
 };
 
index 48cf265..2b9b635 100644 (file)
@@ -165,7 +165,7 @@ static void upload_vs_surfaces(struct brw_context *brw)
    /* BRW_NEW_NR_VS_SURFACES */
    if (brw->vs.nr_surfaces == 0) {
       if (brw->vs.bind_bo_offset) {
-        brw->state.dirty.brw |= BRW_NEW_BINDING_TABLE;
+        brw->state.dirty.brw |= BRW_NEW_VS_BINDING_TABLE;
       }
       brw->vs.bind_bo_offset = 0;
       return;
@@ -184,7 +184,7 @@ static void upload_vs_surfaces(struct brw_context *brw)
       bind[i] = brw->vs.surf_offset[i];
    }
 
-   brw->state.dirty.brw |= BRW_NEW_BINDING_TABLE;
+   brw->state.dirty.brw |= BRW_NEW_VS_BINDING_TABLE;
 }
 
 const struct brw_tracked_state brw_vs_surfaces = {
index 47b8b51..e3e035a 100644 (file)
@@ -664,7 +664,7 @@ brw_wm_upload_binding_table(struct brw_context *brw)
       bind[i] = brw->wm.surf_offset[i];
    }
 
-   brw->state.dirty.brw |= BRW_NEW_BINDING_TABLE;
+   brw->state.dirty.brw |= BRW_NEW_PS_BINDING_TABLE;
 }
 
 const struct brw_tracked_state brw_wm_binding_table = {