static void lsi_command_complete(void *opaque, int reason, uint32_t tag,
uint32_t arg)
{
- LSIState *s = (LSIState *)opaque;
+ LSIState *s = opaque;
int out;
out = (s->sstat1 & PHASE_MASK) == PHASE_DO;
static void lsi_mmio_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
{
- LSIState *s = (LSIState *)opaque;
+ LSIState *s = opaque;
lsi_reg_writeb(s, addr & 0xff, val);
}
static void lsi_mmio_writew(void *opaque, target_phys_addr_t addr, uint32_t val)
{
- LSIState *s = (LSIState *)opaque;
+ LSIState *s = opaque;
addr &= 0xff;
lsi_reg_writeb(s, addr, val & 0xff);
static void lsi_mmio_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
{
- LSIState *s = (LSIState *)opaque;
+ LSIState *s = opaque;
addr &= 0xff;
lsi_reg_writeb(s, addr, val & 0xff);
static uint32_t lsi_mmio_readb(void *opaque, target_phys_addr_t addr)
{
- LSIState *s = (LSIState *)opaque;
+ LSIState *s = opaque;
return lsi_reg_readb(s, addr & 0xff);
}
static uint32_t lsi_mmio_readw(void *opaque, target_phys_addr_t addr)
{
- LSIState *s = (LSIState *)opaque;
+ LSIState *s = opaque;
uint32_t val;
addr &= 0xff;
static uint32_t lsi_mmio_readl(void *opaque, target_phys_addr_t addr)
{
- LSIState *s = (LSIState *)opaque;
+ LSIState *s = opaque;
uint32_t val;
addr &= 0xff;
val = lsi_reg_readb(s, addr);
static void lsi_ram_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
{
- LSIState *s = (LSIState *)opaque;
+ LSIState *s = opaque;
uint32_t newval;
int shift;
static void lsi_ram_writew(void *opaque, target_phys_addr_t addr, uint32_t val)
{
- LSIState *s = (LSIState *)opaque;
+ LSIState *s = opaque;
uint32_t newval;
addr &= 0x1fff;
static void lsi_ram_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
{
- LSIState *s = (LSIState *)opaque;
+ LSIState *s = opaque;
addr &= 0x1fff;
s->script_ram[addr >> 2] = val;
static uint32_t lsi_ram_readb(void *opaque, target_phys_addr_t addr)
{
- LSIState *s = (LSIState *)opaque;
+ LSIState *s = opaque;
uint32_t val;
addr &= 0x1fff;
static uint32_t lsi_ram_readw(void *opaque, target_phys_addr_t addr)
{
- LSIState *s = (LSIState *)opaque;
+ LSIState *s = opaque;
uint32_t val;
addr &= 0x1fff;
static uint32_t lsi_ram_readl(void *opaque, target_phys_addr_t addr)
{
- LSIState *s = (LSIState *)opaque;
+ LSIState *s = opaque;
addr &= 0x1fff;
return le32_to_cpu(s->script_ram[addr >> 2]);
static uint32_t lsi_io_readb(void *opaque, uint32_t addr)
{
- LSIState *s = (LSIState *)opaque;
+ LSIState *s = opaque;
return lsi_reg_readb(s, addr & 0xff);
}
static uint32_t lsi_io_readw(void *opaque, uint32_t addr)
{
- LSIState *s = (LSIState *)opaque;
+ LSIState *s = opaque;
uint32_t val;
addr &= 0xff;
val = lsi_reg_readb(s, addr);
static uint32_t lsi_io_readl(void *opaque, uint32_t addr)
{
- LSIState *s = (LSIState *)opaque;
+ LSIState *s = opaque;
uint32_t val;
addr &= 0xff;
val = lsi_reg_readb(s, addr);
static void lsi_io_writeb(void *opaque, uint32_t addr, uint32_t val)
{
- LSIState *s = (LSIState *)opaque;
+ LSIState *s = opaque;
lsi_reg_writeb(s, addr & 0xff, val);
}
static void lsi_io_writew(void *opaque, uint32_t addr, uint32_t val)
{
- LSIState *s = (LSIState *)opaque;
+ LSIState *s = opaque;
addr &= 0xff;
lsi_reg_writeb(s, addr, val & 0xff);
lsi_reg_writeb(s, addr + 1, (val >> 8) & 0xff);
static void lsi_io_writel(void *opaque, uint32_t addr, uint32_t val)
{
- LSIState *s = (LSIState *)opaque;
+ LSIState *s = opaque;
addr &= 0xff;
lsi_reg_writeb(s, addr, val & 0xff);
lsi_reg_writeb(s, addr + 1, (val >> 8) & 0xff);