x86: tighten condition for emitting LOCK on control register accesses

The control register is never expressed by REX.B; this bit only affects
the involved GPR. Also only one of the operands can have its "control"
flag set, so only check the correct operand.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 14f03bc..199a48d 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,11 @@
 2018-06-01  Jan Beulich  <jbeulich@suse.com>
 
+       * config/tc-i386.c (build_modrm_byte): Drop REX_B from condition
+       checking for the need of emitting LOCK. Check "control" bit just
+       once.
+
+2018-06-01  Jan Beulich  <jbeulich@suse.com>
+
        *  testsuite/gas/i386/invpcid.s,
        testsuite/gas/i386/x86-64-invpcid.s: Add test with explicit
        "oword ptr".

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 36e42eb..3d04a83 100644 (file)
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -6894,12 +6894,11 @@ build_modrm_byte (void)
          if ((i.op[source].regs->reg_flags & RegVRex) != 0)
            i.vrex |= REX_R;
        }
-      if (flag_code != CODE_64BIT && (i.rex & (REX_R | REX_B)))
+      if (flag_code != CODE_64BIT && (i.rex & REX_R))
        {
-         if (!i.types[0].bitfield.control
-             && !i.types[1].bitfield.control)
+         if (!i.types[i.tm.operand_types[0].bitfield.regmem].bitfield.control)
            abort ();
-         i.rex &= ~(REX_R | REX_B);
+         i.rex &= ~REX_R;
          add_prefix (LOCK_PREFIX_OPCODE);
        }
     }