spi: pxa2xx: Convert reset_sccr1() to use pxa2xx_spi_update()
authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Mon, 19 Jul 2021 07:48:40 +0000 (10:48 +0300)
committerMark Brown <broonie@kernel.org>
Mon, 19 Jul 2021 11:58:52 +0000 (12:58 +0100)
Convert reset_sccr1() to use pxa2xx_spi_update().
It will help for further improvements.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20210719074842.36060-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-pxa2xx.c

index 974e307..7c4c817 100644 (file)
@@ -594,24 +594,22 @@ static int u32_reader(struct driver_data *drv_data)
 
 static void reset_sccr1(struct driver_data *drv_data)
 {
-       struct chip_data *chip =
-               spi_get_ctldata(drv_data->controller->cur_msg->spi);
-       u32 sccr1_reg;
+       struct chip_data *chip = spi_get_ctldata(drv_data->controller->cur_msg->spi);
+       u32 mask = drv_data->int_cr1;
 
-       sccr1_reg = pxa2xx_spi_read(drv_data, SSCR1) & ~drv_data->int_cr1;
        switch (drv_data->ssp_type) {
        case QUARK_X1000_SSP:
-               sccr1_reg &= ~QUARK_X1000_SSCR1_RFT;
+               mask |= QUARK_X1000_SSCR1_RFT;
                break;
        case CE4100_SSP:
-               sccr1_reg &= ~CE4100_SSCR1_RFT;
+               mask |= CE4100_SSCR1_RFT;
                break;
        default:
-               sccr1_reg &= ~SSCR1_RFT;
+               mask |= SSCR1_RFT;
                break;
        }
-       sccr1_reg |= chip->threshold;
-       pxa2xx_spi_write(drv_data, SSCR1, sccr1_reg);
+
+       pxa2xx_spi_update(drv_data, SSCR1, mask, chip->threshold);
 }
 
 static void int_stop_and_reset(struct driver_data *drv_data)