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perf/x86/intel: Add Emerald Rapids
author
Kan Liang
<kan.liang@linux.intel.com>
Fri, 6 Jan 2023 16:04:46 +0000
(08:04 -0800)
committer
Greg Kroah-Hartman
<gregkh@linuxfoundation.org>
Thu, 9 Feb 2023 10:28:12 +0000
(11:28 +0100)
[ Upstream commit
6795e558e9cc6123c24e2100a2ebe88e58a792bc
]
From core PMU's perspective, Emerald Rapids is the same as the Sapphire
Rapids. The only difference is the event list, which will be
supported in the perf tool later.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Link:
https://lore.kernel.org/r/20230106160449.3566477-1-kan.liang@linux.intel.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/x86/events/intel/core.c
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diff --git
a/arch/x86/events/intel/core.c
b/arch/x86/events/intel/core.c
index 1b92bf05fd652a7b92c158ed1b9641809bec234d..5a1d0ea402e418557cd0ab017ae329bba27ca416 100644
(file)
--- a/
arch/x86/events/intel/core.c
+++ b/
arch/x86/events/intel/core.c
@@
-6342,6
+6342,7
@@
__init int intel_pmu_init(void)
break;
case INTEL_FAM6_SAPPHIRERAPIDS_X:
+ case INTEL_FAM6_EMERALDRAPIDS_X:
pmem = true;
x86_pmu.late_ack = true;
memcpy(hw_cache_event_ids, spr_hw_cache_event_ids, sizeof(hw_cache_event_ids));