arm64: dts: qcom: sm8450: Add description of camera clock controller
authorVladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Fri, 1 Jul 2022 06:26:22 +0000 (09:26 +0300)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Wed, 6 Jul 2022 20:23:06 +0000 (15:23 -0500)
The change adds description of Qualcomm SM8450 camera clock controller.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220701062622.2757831-3-vladimir.zapolskiy@linaro.org
arch/arm64/boot/dts/qcom/sm8450.dtsi

index f05e477..118ae04 100644 (file)
@@ -6,6 +6,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
 #include <dt-bindings/clock/qcom,rpmh.h>
+#include <dt-bindings/clock/qcom,sm8450-camcc.h>
 #include <dt-bindings/dma/qcom-gpi.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/mailbox/qcom-ipcc.h>
                        };
                };
 
+               camcc: clock-controller@ade0000 {
+                       compatible = "qcom,sm8450-camcc";
+                       reg = <0 0x0ade0000 0 0x20000>;
+                       clocks = <&gcc GCC_CAMERA_AHB_CLK>,
+                                <&rpmhcc RPMH_CXO_CLK>,
+                                <&rpmhcc RPMH_CXO_CLK_A>,
+                                <&sleep_clk>;
+                       power-domains = <&rpmhpd SM8450_MMCX>;
+                       required-opps = <&rpmhpd_opp_low_svs>;
+                       #clock-cells = <1>;
+                       #reset-cells = <1>;
+                       #power-domain-cells = <1>;
+                       status = "disabled";
+               };
+
                pdc: interrupt-controller@b220000 {
                        compatible = "qcom,sm8450-pdc", "qcom,pdc";
                        reg = <0 0x0b220000 0 0x30000>, <0 0x174000f0 0 0x64>;