RDMA/hns: Support query information of functions from FW
authorWei Xu <xuwei5@hisilicon.com>
Thu, 25 Mar 2021 13:33:55 +0000 (21:33 +0800)
committerJason Gunthorpe <jgg@nvidia.com>
Thu, 1 Apr 2021 18:23:08 +0000 (15:23 -0300)
Add a new type of command to query mac id of functions from the firmware,
it is used to select the template of congestion algorithm. More info will
be supported in the future.

Link: https://lore.kernel.org/r/1616679236-7795-2-git-send-email-liweihang@huawei.com
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Signed-off-by: Shengming Shu <shushengming1@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
drivers/infiniband/hw/hns/hns_roce_device.h
drivers/infiniband/hw/hns/hns_roce_hw_v2.c
drivers/infiniband/hw/hns/hns_roce_hw_v2.h

index eb2ccb8..4322fd4 100644 (file)
@@ -1001,6 +1001,7 @@ struct hns_roce_dev {
        void                    *priv;
        struct workqueue_struct *irq_workq;
        const struct hns_roce_dfx_hw *dfx;
+       u32 cong_algo_tmpl_id;
 };
 
 static inline struct hns_roce_dev *to_hr_dev(struct ib_device *ib_dev)
index 783388b..f3f5839 100644 (file)
@@ -1537,6 +1537,25 @@ static int hns_roce_query_fw_ver(struct hns_roce_dev *hr_dev)
        return 0;
 }
 
+static int hns_roce_query_func_info(struct hns_roce_dev *hr_dev)
+{
+       struct hns_roce_cmq_desc desc;
+       int ret;
+
+       if (hr_dev->pci_dev->revision < PCI_REVISION_ID_HIP09)
+               return 0;
+
+       hns_roce_cmq_setup_basic_desc(&desc, HNS_ROCE_OPC_QUERY_FUNC_INFO,
+                                     true);
+       ret = hns_roce_cmq_send(hr_dev, &desc, 1);
+       if (ret)
+               return ret;
+
+       hr_dev->cong_algo_tmpl_id = le32_to_cpu(desc.func_info.own_mac_id);
+
+       return 0;
+}
+
 static int hns_roce_config_global_param(struct hns_roce_dev *hr_dev)
 {
        struct hns_roce_cfg_global_param *req;
@@ -2279,6 +2298,13 @@ static int hns_roce_v2_profile(struct hns_roce_dev *hr_dev)
                return ret;
        }
 
+       ret = hns_roce_query_func_info(hr_dev);
+       if (ret) {
+               dev_err(hr_dev->dev, "Query function info fail, ret = %d.\n",
+                       ret);
+               return ret;
+       }
+
        ret = hns_roce_config_global_param(hr_dev);
        if (ret) {
                dev_err(hr_dev->dev, "Configure global param fail, ret = %d.\n",
index ffdae15..aa87b1c 100644 (file)
@@ -235,6 +235,7 @@ enum hns_roce_opcode_type {
        HNS_ROCE_OPC_CFG_EXT_LLM                        = 0x8403,
        HNS_ROCE_OPC_CFG_TMOUT_LLM                      = 0x8404,
        HNS_ROCE_OPC_QUERY_PF_TIMER_RES                 = 0x8406,
+       HNS_ROCE_OPC_QUERY_FUNC_INFO                    = 0x8407,
        HNS_ROCE_OPC_QUERY_PF_CAPS_NUM                  = 0x8408,
        HNS_ROCE_OPC_CFG_ENTRY_SIZE                     = 0x8409,
        HNS_ROCE_OPC_CFG_SGID_TB                        = 0x8500,
@@ -1866,7 +1867,15 @@ struct hns_roce_cmq_desc {
        __le16 flag;
        __le16 retval;
        __le16 rsv;
-       __le32 data[6];
+       union {
+               __le32 data[6];
+               struct {
+                       __le32 rsv1;
+                       __le32 own_mac_id;
+                       __le32 rsv2[4];
+               } func_info;
+       };
+
 };
 
 #define HNS_ROCE_V2_GO_BIT_TIMEOUT_MSECS       10000