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drm/amdgpu: fix bug set incorrect value to vce register
author
Rex Zhu
<Rex.Zhu@amd.com>
Tue, 10 Jan 2017 12:00:40 +0000
(20:00 +0800)
committer
Alex Deucher
<alexander.deucher@amd.com>
Tue, 17 Jan 2017 20:24:55 +0000
(15:24 -0500)
Set the proper bits for clockgating setup.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
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diff --git
a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
index
5fb0b7f
..
b621bde
100644
(file)
--- a/
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
+++ b/
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
@@
-175,7
+175,7
@@
static void vce_v3_0_set_vce_sw_clock_gating(struct amdgpu_device *adev,
WREG32(mmVCE_UENC_CLOCK_GATING_2, data);
data = RREG32(mmVCE_UENC_REG_CLOCK_GATING);
- data &= ~0x
ffc00000
;
+ data &= ~0x
3ff
;
WREG32(mmVCE_UENC_REG_CLOCK_GATING, data);
data = RREG32(mmVCE_UENC_DMA_DCLK_CTRL);