crypto: qat - get compression extended capabilities
authorGiovanni Cabiddu <giovanni.cabiddu@intel.com>
Thu, 16 Dec 2021 09:13:11 +0000 (09:13 +0000)
committerHerbert Xu <herbert@gondor.apana.org.au>
Fri, 24 Dec 2021 03:18:23 +0000 (14:18 +1100)
Get compression extended capabilities mask from firmware through the
init/admin channel.
These capabilities are stored in the accel_dev structure and will be
communicated to VF through the PFVF channel.

Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Marco Chiappero <marco.chiappero@intel.com>
Reviewed-by: Fiona Trahe <fiona.trahe@intel.com>
Reviewed-by: Marco Chiappero <marco.chiappero@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
drivers/crypto/qat/qat_common/adf_accel_devices.h
drivers/crypto/qat/qat_common/adf_admin.c
drivers/crypto/qat/qat_common/icp_qat_fw_init_admin.h

index a1809a7..2c380fa 100644 (file)
@@ -198,6 +198,7 @@ struct adf_hw_device_data {
        u32 fuses;
        u32 straps;
        u32 accel_capabilities_mask;
+       u32 extended_dc_capabilities;
        u32 instance_id;
        u16 accel_mask;
        u32 ae_mask;
index 43680e1..c381b89 100644 (file)
@@ -194,6 +194,35 @@ static int adf_set_fw_constants(struct adf_accel_dev *accel_dev)
        return adf_send_admin(accel_dev, &req, &resp, ae_mask);
 }
 
+static int adf_get_dc_capabilities(struct adf_accel_dev *accel_dev,
+                                  u32 *capabilities)
+{
+       struct adf_hw_device_data *hw_device = accel_dev->hw_device;
+       struct icp_qat_fw_init_admin_resp resp;
+       struct icp_qat_fw_init_admin_req req;
+       unsigned long ae_mask;
+       unsigned long ae;
+       int ret;
+
+       /* Target only service accelerator engines */
+       ae_mask = hw_device->ae_mask & ~hw_device->admin_ae_mask;
+
+       memset(&req, 0, sizeof(req));
+       memset(&resp, 0, sizeof(resp));
+       req.cmd_id = ICP_QAT_FW_COMP_CAPABILITY_GET;
+
+       *capabilities = 0;
+       for_each_set_bit(ae, &ae_mask, GET_MAX_ACCELENGINES(accel_dev)) {
+               ret = adf_send_admin(accel_dev, &req, &resp, 1ULL << ae);
+               if (ret)
+                       return ret;
+
+               *capabilities |= resp.extended_features;
+       }
+
+       return 0;
+}
+
 /**
  * adf_send_admin_init() - Function sends init message to FW
  * @accel_dev: Pointer to acceleration device.
@@ -204,8 +233,16 @@ static int adf_set_fw_constants(struct adf_accel_dev *accel_dev)
  */
 int adf_send_admin_init(struct adf_accel_dev *accel_dev)
 {
+       u32 dc_capabilities = 0;
        int ret;
 
+       ret = adf_get_dc_capabilities(accel_dev, &dc_capabilities);
+       if (ret) {
+               dev_err(&GET_DEV(accel_dev), "Cannot get dc capabilities\n");
+               return ret;
+       }
+       accel_dev->hw_device->extended_dc_capabilities = dc_capabilities;
+
        ret = adf_set_fw_constants(accel_dev);
        if (ret)
                return ret;
index f05ad17..afe59a7 100644 (file)
@@ -14,7 +14,8 @@ enum icp_qat_fw_init_admin_cmd_id {
        ICP_QAT_FW_COUNTERS_GET = 5,
        ICP_QAT_FW_LOOPBACK = 6,
        ICP_QAT_FW_HEARTBEAT_SYNC = 7,
-       ICP_QAT_FW_HEARTBEAT_GET = 8
+       ICP_QAT_FW_HEARTBEAT_GET = 8,
+       ICP_QAT_FW_COMP_CAPABILITY_GET = 9,
 };
 
 enum icp_qat_fw_init_admin_resp_status {
@@ -52,6 +53,7 @@ struct icp_qat_fw_init_admin_resp {
                        __u16 version_minor_num;
                        __u16 version_major_num;
                };
+               __u32 extended_features;
        };
        __u64 opaque_data;
        union {