drm/i915/rps: Add frequency translation helpers
authorAndi Shyti <andi.shyti@intel.com>
Fri, 13 Dec 2019 18:37:35 +0000 (20:37 +0200)
committerChris Wilson <chris@chris-wilson.co.uk>
Fri, 13 Dec 2019 22:22:05 +0000 (22:22 +0000)
Add two helpers that for reading the actual GT's frequency. The
two helpers are:

 - intel_rps_read_cagf: reads the frequency and returns it not
   normalized

 - intel_rps_read_actual_frequency: provides the frequency in Hz.

Use the above helpers in sysfs and debugfs.

Signed-off-by: Andi Shyti <andi.shyti@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20191213183736.31992-2-andi@etezian.org
drivers/gpu/drm/i915/gt/intel_rps.c
drivers/gpu/drm/i915/gt/intel_rps.h
drivers/gpu/drm/i915/i915_debugfs.c
drivers/gpu/drm/i915/i915_pmu.c
drivers/gpu/drm/i915/i915_sysfs.c

index 106c9fce9d6c0392c628710b2460b0c604cc0043..5f5a000c801da140fcb238ed33bb0723753c8201 100644 (file)
@@ -1667,19 +1667,49 @@ void intel_rps_init(struct intel_rps *rps)
                rps->pm_intrmsk_mbz |= GEN8_PMINTR_DISABLE_REDIRECT_TO_GUC;
 }
 
-u32 intel_get_cagf(struct intel_rps *rps, u32 rpstat)
+u32 intel_rps_get_cagf(struct intel_rps *rps, u32 rpstat)
 {
        struct drm_i915_private *i915 = rps_to_i915(rps);
        u32 cagf;
 
-       if (INTEL_GEN(i915) >= 9)
+       if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
+               cagf = (rpstat >> 8) & 0xff;
+       else if (INTEL_GEN(i915) >= 9)
                cagf = (rpstat & GEN9_CAGF_MASK) >> GEN9_CAGF_SHIFT;
        else if (IS_HASWELL(i915) || IS_BROADWELL(i915))
                cagf = (rpstat & HSW_CAGF_MASK) >> HSW_CAGF_SHIFT;
        else
                cagf = (rpstat & GEN6_CAGF_MASK) >> GEN6_CAGF_SHIFT;
 
-       return  cagf;
+       return cagf;
+}
+
+static u32 read_cagf(struct intel_rps *rps)
+{
+       struct drm_i915_private *i915 = rps_to_i915(rps);
+       u32 freq;
+
+       if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) {
+               vlv_punit_get(i915);
+               freq = vlv_punit_read(i915, PUNIT_REG_GPU_FREQ_STS);
+               vlv_punit_put(i915);
+       } else {
+               freq = intel_uncore_read(rps_to_gt(rps)->uncore, GEN6_RPSTAT1);
+       }
+
+       return intel_rps_get_cagf(rps, freq);
+}
+
+u32 intel_rps_read_actual_frequency(struct intel_rps *rps)
+{
+       struct intel_runtime_pm *rpm = rps_to_gt(rps)->uncore->rpm;
+       intel_wakeref_t wakeref;
+       u32 freq = 0;
+
+       with_intel_runtime_pm_if_in_use(rpm, wakeref)
+               freq = intel_gpu_freq(rps, read_cagf(rps));
+
+       return freq;
 }
 
 /* External interface for intel_ips.ko */
index 9518c66c9792029154bfbd74a8036a1536cadc1f..dfa98194f3b25ed30f00a8e5b7fef59fd2d63efd 100644 (file)
@@ -29,7 +29,8 @@ void intel_rps_mark_interactive(struct intel_rps *rps, bool interactive);
 
 int intel_gpu_freq(struct intel_rps *rps, int val);
 int intel_freq_opcode(struct intel_rps *rps, int val);
-u32 intel_get_cagf(struct intel_rps *rps, u32 rpstat1);
+u32 intel_rps_get_cagf(struct intel_rps *rps, u32 rpstat1);
+u32 intel_rps_read_actual_frequency(struct intel_rps *rps);
 
 void gen5_rps_irq_handler(struct intel_rps *rps);
 void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir);
index 9cd5ce5bc93bf3672a2f9cbb1c1d7b3fdc1369c9..d28468eaed577e952aeeaeb62c1da7fbf1907375 100644 (file)
@@ -881,7 +881,7 @@ static int i915_frequency_info(struct seq_file *m, void *unused)
                rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI) & GEN6_CURIAVG_MASK;
                rpcurdown = I915_READ(GEN6_RP_CUR_DOWN) & GEN6_CURBSYTAVG_MASK;
                rpprevdown = I915_READ(GEN6_RP_PREV_DOWN) & GEN6_CURBSYTAVG_MASK;
-               cagf = intel_gpu_freq(rps, intel_get_cagf(rps, rpstat));
+               cagf = intel_rps_read_actual_frequency(rps);
 
                intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
 
@@ -1623,21 +1623,6 @@ static int i915_rps_boost_info(struct seq_file *m, void *data)
 {
        struct drm_i915_private *dev_priv = node_to_i915(m->private);
        struct intel_rps *rps = &dev_priv->gt.rps;
-       u32 act_freq = rps->cur_freq;
-       intel_wakeref_t wakeref;
-
-       with_intel_runtime_pm_if_in_use(&dev_priv->runtime_pm, wakeref) {
-               if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
-                       vlv_punit_get(dev_priv);
-                       act_freq = vlv_punit_read(dev_priv,
-                                                 PUNIT_REG_GPU_FREQ_STS);
-                       vlv_punit_put(dev_priv);
-                       act_freq = (act_freq >> 8) & 0xff;
-               } else {
-                       act_freq = intel_get_cagf(rps,
-                                                 I915_READ(GEN6_RPSTAT1));
-               }
-       }
 
        seq_printf(m, "RPS enabled? %d\n", rps->enabled);
        seq_printf(m, "GPU busy? %s\n", yesno(dev_priv->gt.awake));
@@ -1646,7 +1631,7 @@ static int i915_rps_boost_info(struct seq_file *m, void *data)
        seq_printf(m, "Interactive? %d\n", READ_ONCE(rps->power.interactive));
        seq_printf(m, "Frequency requested %d, actual %d\n",
                   intel_gpu_freq(rps, rps->cur_freq),
-                  intel_gpu_freq(rps, act_freq));
+                  intel_rps_read_actual_frequency(rps));
        seq_printf(m, "  min hard:%d, soft:%d; max soft:%d, hard:%d\n",
                   intel_gpu_freq(rps, rps->min_freq),
                   intel_gpu_freq(rps, rps->min_freq_softlimit),
index eaad9c97d0316254f4e5c9d8fb980845c279a7ce..5f2adfbf85bed0e063dcd845a0a2405f69bba6c7 100644 (file)
@@ -406,7 +406,7 @@ frequency_sample(struct intel_gt *gt, unsigned int period_ns)
                 */
                val = intel_uncore_read_fw(uncore, GEN6_RPSTAT1);
                if (val)
-                       val = intel_get_cagf(rps, val);
+                       val = intel_rps_get_cagf(rps, val);
                else
                        val = rps->cur_freq;
 
index 65476909d1bf5e5fae4e0bdfb803c38ae2c4ddcc..ad2b1b833d7b2d6093e4b4e978bfea0a4a70b804 100644 (file)
@@ -259,33 +259,18 @@ static const struct bin_attribute dpf_attrs_1 = {
 static ssize_t gt_act_freq_mhz_show(struct device *kdev,
                                    struct device_attribute *attr, char *buf)
 {
-       struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
-       struct intel_rps *rps = &dev_priv->gt.rps;
-       intel_wakeref_t wakeref;
-       u32 freq;
-
-       wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
-
-       if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
-               vlv_punit_get(dev_priv);
-               freq = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
-               vlv_punit_put(dev_priv);
-
-               freq = (freq >> 8) & 0xff;
-       } else {
-               freq = intel_get_cagf(rps, I915_READ(GEN6_RPSTAT1));
-       }
-
-       intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
+       struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);
+       struct intel_rps *rps = &i915->gt.rps;
 
-       return snprintf(buf, PAGE_SIZE, "%d\n", intel_gpu_freq(rps, freq));
+       return snprintf(buf, PAGE_SIZE, "%d\n",
+                       intel_rps_read_actual_frequency(rps));
 }
 
 static ssize_t gt_cur_freq_mhz_show(struct device *kdev,
                                    struct device_attribute *attr, char *buf)
 {
-       struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
-       struct intel_rps *rps = &dev_priv->gt.rps;
+       struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);
+       struct intel_rps *rps = &i915->gt.rps;
 
        return snprintf(buf, PAGE_SIZE, "%d\n",
                        intel_gpu_freq(rps, rps->cur_freq));
@@ -293,8 +278,8 @@ static ssize_t gt_cur_freq_mhz_show(struct device *kdev,
 
 static ssize_t gt_boost_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
 {
-       struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
-       struct intel_rps *rps = &dev_priv->gt.rps;
+       struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);
+       struct intel_rps *rps = &i915->gt.rps;
 
        return snprintf(buf, PAGE_SIZE, "%d\n",
                        intel_gpu_freq(rps, rps->boost_freq));