drm/i915: Speed up DMC firmware loading

Currently we're doing:

1. acquire lock
2. write word to hardware
3. release lock
4. repeat from 1

to load the DMC firmware. Due to the cost of acquiring/releasing a lock,
and the size of the DMC firmware, this slows down DMC loading a lot.

This patch simply acquires the lock, writes the entire firmware,
then releases the lock.  Testing shows resume speedups
in the order of 10ms on platforms with DMC firmware (GEN9+).

v2: Per feedback from Chris & Ville there's no need to do the whole
    forcewake dance, so lose that bit (Chris, Ville)

v3: Actually send the new version of the patch...

v4: Don't acquire the uncore lock. Disable preempt. (Chris)

Signed-off-by: David Weinehall <david.weinehall@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170905131050.11655-1-david.weinehall@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index 965988f..cdfb624 100644 (file)
--- a/drivers/gpu/drm/i915/intel_csr.c
+++ b/drivers/gpu/drm/i915/intel_csr.c
@@ -252,8 +252,14 @@ void intel_csr_load_program(struct drm_i915_private *dev_priv)
        }
 
        fw_size = dev_priv->csr.dmc_fw_size;
+       assert_rpm_wakelock_held(dev_priv);
+
+       preempt_disable();
+
        for (i = 0; i < fw_size; i++)
-               I915_WRITE(CSR_PROGRAM(i), payload[i]);
+               I915_WRITE_FW(CSR_PROGRAM(i), payload[i]);
+
+       preempt_enable();
 
        for (i = 0; i < dev_priv->csr.mmio_count; i++) {
                I915_WRITE(dev_priv->csr.mmioaddr[i],