ath9k_hw: store the clock rate in common data on channel changes
authorFelix Fietkau <nbd@openwrt.org>
Fri, 8 Oct 2010 20:13:51 +0000 (22:13 +0200)
committerJohn W. Linville <linville@tuxdriver.com>
Mon, 11 Oct 2010 19:04:19 +0000 (15:04 -0400)
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath.h
drivers/net/wireless/ath/ath9k/ani.c
drivers/net/wireless/ath/ath9k/hw.c

index cee0191..b36d9d7 100644 (file)
@@ -145,6 +145,8 @@ struct ath_common {
        DECLARE_BITMAP(tkip_keymap, ATH_KEYMAX);
        enum ath_crypt_caps crypt_caps;
 
+       unsigned int clockrate;
+
        struct ath_regulatory regulatory;
        const struct ath_ops *ops;
        const struct ath_bus_ops *bus_ops;
index f2a907b..f2aa684 100644 (file)
@@ -465,35 +465,13 @@ static void ath9k_hw_ani_lower_immunity(struct ath_hw *ah)
                ath9k_hw_set_cck_nil(ah, aniState->cckNoiseImmunityLevel - 1);
 }
 
-static u8 ath9k_hw_chan_2_clockrate_mhz(struct ath_hw *ah)
-{
-       struct ath9k_channel *chan = ah->curchan;
-       struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf;
-       u8 clockrate; /* in MHz */
-
-       if (!ah->curchan) /* should really check for CCK instead */
-               clockrate = ATH9K_CLOCK_RATE_CCK;
-       else if (conf->channel->band == IEEE80211_BAND_2GHZ)
-               clockrate = ATH9K_CLOCK_RATE_2GHZ_OFDM;
-       else if (IS_CHAN_A_FAST_CLOCK(ah, chan))
-               clockrate = ATH9K_CLOCK_FAST_RATE_5GHZ_OFDM;
-       else
-               clockrate = ATH9K_CLOCK_RATE_5GHZ_OFDM;
-
-       if (conf_is_ht40(conf))
-               return clockrate * 2;
-
-       return clockrate;
-}
-
 static int32_t ath9k_hw_ani_get_listen_time(struct ath_hw *ah)
 {
+       struct ath_common *common = ath9k_hw_common(ah);
        int32_t listen_time;
-       int32_t clock_rate;
 
        ath9k_hw_update_cycle_counters(ah);
-       clock_rate = ath9k_hw_chan_2_clockrate_mhz(ah) * 1000;
-       listen_time = ah->listen_time / clock_rate;
+       listen_time = ah->listen_time / (common->clockrate * 1000);
        ah->listen_time = 0;
 
        return listen_time;
index 05e9935..f5d7917 100644 (file)
@@ -88,29 +88,32 @@ static void ath9k_hw_ani_cache_ini_regs(struct ath_hw *ah)
 /* Helper Functions */
 /********************/
 
-static u32 ath9k_hw_mac_clks(struct ath_hw *ah, u32 usecs)
+static void ath9k_hw_set_clockrate(struct ath_hw *ah)
 {
        struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf;
+       struct ath_common *common = ath9k_hw_common(ah);
+       unsigned int clockrate;
 
        if (!ah->curchan) /* should really check for CCK instead */
-               return usecs *ATH9K_CLOCK_RATE_CCK;
-       if (conf->channel->band == IEEE80211_BAND_2GHZ)
-               return usecs *ATH9K_CLOCK_RATE_2GHZ_OFDM;
-
-       if (ah->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK)
-               return usecs * ATH9K_CLOCK_FAST_RATE_5GHZ_OFDM;
+               clockrate = ATH9K_CLOCK_RATE_CCK;
+       else if (conf->channel->band == IEEE80211_BAND_2GHZ)
+               clockrate = ATH9K_CLOCK_RATE_2GHZ_OFDM;
+       else if (ah->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK)
+               clockrate = ATH9K_CLOCK_FAST_RATE_5GHZ_OFDM;
        else
-               return usecs * ATH9K_CLOCK_RATE_5GHZ_OFDM;
+               clockrate = ATH9K_CLOCK_RATE_5GHZ_OFDM;
+
+       if (conf_is_ht40(conf))
+               clockrate *= 2;
+
+       common->clockrate = clockrate;
 }
 
 static u32 ath9k_hw_mac_to_clks(struct ath_hw *ah, u32 usecs)
 {
-       struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf;
+       struct ath_common *common = ath9k_hw_common(ah);
 
-       if (conf_is_ht40(conf))
-               return ath9k_hw_mac_clks(ah, usecs) * 2;
-       else
-               return ath9k_hw_mac_clks(ah, usecs);
+       return usecs * common->clockrate;
 }
 
 bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout)
@@ -1156,6 +1159,7 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah,
                          "Failed to set channel\n");
                return false;
        }
+       ath9k_hw_set_clockrate(ah);
 
        ah->eep_ops->set_txpower(ah, chan,
                             ath9k_regd_get_ctl(regulatory, chan),
@@ -1368,6 +1372,8 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
        if (r)
                return r;
 
+       ath9k_hw_set_clockrate(ah);
+
        ENABLE_REGWRITE_BUFFER(ah);
 
        for (i = 0; i < AR_NUM_DCU; i++)