TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput,
const Instruction *I = nullptr) const;
+ /// \return The cost of VP Load and Store instructions.
+ InstructionCost
+ getVPMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment,
+ unsigned AddressSpace,
+ TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput,
+ const Instruction *I = nullptr) const;
+
/// \return The cost of masked Load and Store instructions.
InstructionCost getMaskedMemoryOpCost(
unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
/// \name Vector Predication Information
/// @{
/// Whether the target supports the %evl parameter of VP intrinsic efficiently
- /// in hardware. (see LLVM Language Reference - "Vector Predication
- /// Intrinsics") Use of %evl is discouraged when that is not the case.
- bool hasActiveVectorLength() const;
+ /// in hardware, for the given opcode and type/alignment. (see LLVM Language
+ /// Reference - "Vector Predication Intrinsics").
+ /// Use of %evl is discouraged when that is not the case.
+ bool hasActiveVectorLength(unsigned Opcode, Type *DataType,
+ Align Alignment) const;
struct VPLegalization {
enum VPTransform {
unsigned AddressSpace,
TTI::TargetCostKind CostKind,
const Instruction *I) = 0;
+ virtual InstructionCost getVPMemoryOpCost(unsigned Opcode, Type *Src,
+ Align Alignment,
+ unsigned AddressSpace,
+ TTI::TargetCostKind CostKind,
+ const Instruction *I) = 0;
virtual InstructionCost
getMaskedMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment,
unsigned AddressSpace,
virtual bool shouldExpandReduction(const IntrinsicInst *II) const = 0;
virtual unsigned getGISelRematGlobalCost() const = 0;
virtual bool supportsScalableVectors() const = 0;
- virtual bool hasActiveVectorLength() const = 0;
+ virtual bool hasActiveVectorLength(unsigned Opcode, Type *DataType,
+ Align Alignment) const = 0;
virtual InstructionCost getInstructionLatency(const Instruction *I) = 0;
virtual VPLegalization
getVPLegalizationStrategy(const VPIntrinsic &PI) const = 0;
return Impl.getMemoryOpCost(Opcode, Src, Alignment, AddressSpace,
CostKind, I);
}
+ InstructionCost getVPMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment,
+ unsigned AddressSpace,
+ TTI::TargetCostKind CostKind,
+ const Instruction *I) override {
+ return Impl.getVPMemoryOpCost(Opcode, Src, Alignment, AddressSpace,
+ CostKind, I);
+ }
InstructionCost getMaskedMemoryOpCost(unsigned Opcode, Type *Src,
Align Alignment, unsigned AddressSpace,
TTI::TargetCostKind CostKind) override {
return Impl.supportsScalableVectors();
}
- bool hasActiveVectorLength() const override {
- return Impl.hasActiveVectorLength();
+ bool hasActiveVectorLength(unsigned Opcode, Type *DataType,
+ Align Alignment) const override {
+ return Impl.hasActiveVectorLength(Opcode, DataType, Alignment);
}
InstructionCost getInstructionLatency(const Instruction *I) override {
return 1;
}
+ InstructionCost getVPMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment,
+ unsigned AddressSpace,
+ TTI::TargetCostKind CostKind,
+ const Instruction *I) const {
+ return 1;
+ }
+
InstructionCost getMaskedMemoryOpCost(unsigned Opcode, Type *Src,
Align Alignment, unsigned AddressSpace,
TTI::TargetCostKind CostKind) const {
bool supportsScalableVectors() const { return false; }
- bool hasActiveVectorLength() const { return false; }
+ bool hasActiveVectorLength(unsigned Opcode, Type *DataType,
+ Align Alignment) const {
+ return false;
+ }
TargetTransformInfo::VPLegalization
getVPLegalizationStrategy(const VPIntrinsic &PI) const {