radeonsi: set nr_pos_exports outside of llvm translation

This can save an abi interface when we share position export
code with RADV.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20691>

diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 2caa95b..ee8adf1 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -1769,6 +1769,32 @@ static void si_assign_param_offsets(nir_shader *nir, struct si_shader *shader)
    si_nir_assign_param_offsets(nir, shader, slot_remap);
 }
 
+static unsigned si_get_nr_pos_exports(const struct si_shader_selector *sel,
+                                      const union si_shader_key *key)
+{
+   const struct si_shader_info *info = &sel->info;
+
+   /* Must have a position export. */
+   unsigned nr_pos_exports = 1;
+
+   if ((info->writes_psize && !key->ge.opt.kill_pointsize) ||
+       (info->writes_edgeflag && !key->ge.as_ngg) ||
+       info->writes_viewport_index || info->writes_layer ||
+       sel->screen->options.vrs2x2) {
+      nr_pos_exports++;
+   }
+
+   unsigned clipdist_mask =
+      (info->clipdist_mask & ~key->ge.opt.kill_clip_distances) | info->culldist_mask;
+
+   for (int i = 0; i < 2; i++) {
+      if (clipdist_mask & BITFIELD_RANGE(i * 4, 4))
+         nr_pos_exports++;
+   }
+
+   return nr_pos_exports;
+}
+
 struct nir_shader *si_get_nir_shader(struct si_shader *shader,
                                      struct si_shader_args *args,
                                      bool *free_nir,
@@ -1910,6 +1936,9 @@ struct nir_shader *si_get_nir_shader(struct si_shader *shader,
       /* Assign param export indices. */
       si_assign_param_offsets(nir, shader);
 
+      /* Assign num of position exports. */
+      shader->info.nr_pos_exports = si_get_nr_pos_exports(sel, key);
+
       if (key->ge.as_ngg) {
          /* Lower last VGT NGG shader stage. */
          si_lower_ngg(shader, nir);
@@ -2012,6 +2041,8 @@ si_nir_generate_gs_copy_shader(struct si_screen *sscreen,
       shader->info.vs_output_param_mask |= BITFIELD64_BIT(i);
    }
 
+   shader->info.nr_pos_exports = si_get_nr_pos_exports(gs_selector, gskey);
+
    nir_shader *nir =
       ac_nir_create_gs_copy_shader(gs_nir,
                                    gskey->ge.opt.remove_streamout,

diff --git a/src/gallium/drivers/radeonsi/si_shader_llvm_vs.c b/src/gallium/drivers/radeonsi/si_shader_llvm_vs.c
index 1679f68..5d04369 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_shader_llvm_vs.c
+++ b/src/gallium/drivers/radeonsi/si_shader_llvm_vs.c
@@ -546,10 +546,6 @@ void si_llvm_build_vs_exports(struct si_shader_context *ctx,
       }
    }
 
-   for (i = 0; i < 4; i++)
-      if (pos_args[i].out[0])
-         shader->info.nr_pos_exports++;
-
    /* GFX10 (Navi1x) skip POS0 exports if EXEC=0 and DONE=0, causing a hang.
     * Setting valid_mask=1 prevents it and has no other effect.
     */