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radeon/vcn: correct target buffer pitch calculation
author
Leo Liu
<leo.liu@amd.com>
Mon, 21 Aug 2017 15:50:38 +0000
(11:50 -0400)
committer
Leo Liu
<leo.liu@amd.com>
Tue, 22 Aug 2017 19:12:19 +0000
(15:12 -0400)
since the way should be as same as UVD
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
src/gallium/drivers/radeon/radeon_vcn_dec.c
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diff --git
a/src/gallium/drivers/radeon/radeon_vcn_dec.c
b/src/gallium/drivers/radeon/radeon_vcn_dec.c
index
a60b969
..
5139162
100644
(file)
--- a/
src/gallium/drivers/radeon/radeon_vcn_dec.c
+++ b/
src/gallium/drivers/radeon/radeon_vcn_dec.c
@@
-631,7
+631,7
@@
static struct pb_buffer *rvcn_dec_message_decode(struct radeon_decoder *dec,
decode->db_pitch = align(dec->base.width, 32);
decode->db_surf_tile_config = 0;
- decode->dt_pitch = luma->surface.u.gfx9.surf_pitch * luma->surface.b
pe;
;
+ decode->dt_pitch = luma->surface.u.gfx9.surf_pitch * luma->surface.b
lk_w
;
decode->dt_uv_pitch = decode->dt_pitch / 2;
decode->dt_tiling_mode = 0;