Update for post processing on IVB
authorXiang, Haihao <haihao.xiang@intel.com>
Mon, 24 Oct 2011 05:15:36 +0000 (13:15 +0800)
committerXiang, Haihao <haihao.xiang@intel.com>
Mon, 24 Oct 2011 05:15:36 +0000 (13:15 +0800)
AVS works on IVB

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
src/i965_drv_video.c
src/i965_post_processing.c
src/i965_post_processing.h
src/i965_structs.h
src/shaders/post_processing/gen7/Makefile.am

index 57d0770..9b9d44c 100644 (file)
@@ -172,7 +172,7 @@ extern struct hw_context *gen7_dec_hw_context_init(VADriverContextP, VAProfile);
 static struct hw_codec_info gen7_hw_codec_info = {
     .dec_hw_context_init = gen7_dec_hw_context_init,
     .enc_hw_context_init = gen6_enc_hw_context_init,
-    .proc_hw_context_init = NULL,
+    .proc_hw_context_init = i965_proc_context_init,
 };
 
 VAStatus 
index 287fa31..1a7e22c 100644 (file)
 #define SURFACE_STATE_PADDED_SIZE_1_I965        ALIGN(sizeof(struct i965_surface_state2), 32)
 #define SURFACE_STATE_PADDED_SIZE_I965          MAX(SURFACE_STATE_PADDED_SIZE_0_I965, SURFACE_STATE_PADDED_SIZE_1_I965)
 
-#define SURFACE_STATE_PADDED_SIZE               SURFACE_STATE_PADDED_SIZE_I965
+#define SURFACE_STATE_PADDED_SIZE_0_GEN7        ALIGN(sizeof(struct gen7_surface_state), 32)
+#define SURFACE_STATE_PADDED_SIZE_1_GEN7        ALIGN(sizeof(struct gen7_surface_state2), 32)
+#define SURFACE_STATE_PADDED_SIZE_GEN7          MAX(SURFACE_STATE_PADDED_SIZE_0_GEN7, SURFACE_STATE_PADDED_SIZE_1_GEN7)
+
+#define SURFACE_STATE_PADDED_SIZE               MAX(SURFACE_STATE_PADDED_SIZE_I965, SURFACE_STATE_PADDED_SIZE_GEN7)
 #define SURFACE_STATE_OFFSET(index)             (SURFACE_STATE_PADDED_SIZE * index)
 #define BINDING_TABLE_OFFSET                    SURFACE_STATE_OFFSET(MAX_PP_SURFACES)
 
@@ -382,8 +386,163 @@ static struct pp_module pp_modules_gen6[] = {
     },
 };
 
-#define pp_static_parameter     pp_context->pp_static_parameter
-#define pp_inline_parameter     pp_context->pp_inline_parameter
+static const uint32_t pp_null_gen7[][4] = {
+};
+
+static const uint32_t pp_nv12_load_save_nv12_gen7[][4] = {
+};
+
+static const uint32_t pp_nv12_load_save_pl3_gen7[][4] = {
+};
+
+static const uint32_t pp_pl3_load_save_nv12_gen7[][4] = {
+};
+
+static const uint32_t pp_pl3_load_save_pl3_gen7[][4] = {
+};
+
+static const uint32_t pp_nv12_scaling_gen7[][4] = {
+};
+
+static const uint32_t pp_nv12_avs_gen7[][4] = {
+#include "shaders/post_processing/gen7/avs.g7b"
+};
+
+static const uint32_t pp_nv12_dndi_gen7[][4] = {
+#include "shaders/post_processing/gen7/dndi.g7b"
+};
+
+static const uint32_t pp_nv12_dn_gen7[][4] = {
+};
+
+static VAStatus gen7_pp_nv12_avs_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context,
+                                            const struct i965_surface *src_surface,
+                                            const VARectangle *src_rect,
+                                            struct i965_surface *dst_surface,
+                                            const VARectangle *dst_rect,
+                                            void *filter_param);
+static VAStatus gen7_pp_nv12_dndi_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context,
+                                             const struct i965_surface *src_surface,
+                                             const VARectangle *src_rect,
+                                             struct i965_surface *dst_surface,
+                                             const VARectangle *dst_rect,
+                                             void *filter_param);
+static VAStatus gen7_pp_nv12_dn_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context,
+                                           const struct i965_surface *src_surface,
+                                           const VARectangle *src_rect,
+                                           struct i965_surface *dst_surface,
+                                           const VARectangle *dst_rect,
+                                           void *filter_param);
+
+static struct pp_module pp_modules_gen7[] = {
+    {
+        {
+            "NULL module (for testing)",
+            PP_NULL,
+            pp_null_gen7,
+            sizeof(pp_null_gen7),
+            NULL,
+        },
+
+        pp_null_initialize,
+    },
+
+    {
+        {
+            "NV12_NV12",
+            PP_NV12_LOAD_SAVE_N12,
+            pp_nv12_load_save_nv12_gen7,
+            sizeof(pp_nv12_load_save_nv12_gen7),
+            NULL,
+        },
+
+        pp_plx_load_save_plx_initialize,
+    },
+
+    {
+        {
+            "NV12_PL3",
+            PP_NV12_LOAD_SAVE_PL3,
+            pp_nv12_load_save_pl3_gen7,
+            sizeof(pp_nv12_load_save_pl3_gen7),
+            NULL,
+        },
+        
+        pp_plx_load_save_plx_initialize,
+    },
+
+    {
+        {
+            "PL3_NV12",
+            PP_PL3_LOAD_SAVE_N12,
+            pp_pl3_load_save_nv12_gen7,
+            sizeof(pp_pl3_load_save_nv12_gen7),
+            NULL,
+        },
+
+        pp_plx_load_save_plx_initialize,
+    },
+
+    {
+        {
+            "PL3_PL3",
+            PP_PL3_LOAD_SAVE_N12,
+            pp_pl3_load_save_pl3_gen7,
+            sizeof(pp_pl3_load_save_pl3_gen7),
+            NULL,
+        },
+
+        pp_plx_load_save_plx_initialize,
+    },
+
+    {
+        {
+            "NV12 Scaling module",
+            PP_NV12_SCALING,
+            pp_nv12_scaling_gen7,
+            sizeof(pp_nv12_scaling_gen7),
+            NULL,
+        },
+
+        pp_nv12_scaling_initialize,
+    },
+
+    {
+        {
+            "NV12 AVS module",
+            PP_NV12_AVS,
+            pp_nv12_avs_gen7,
+            sizeof(pp_nv12_avs_gen7),
+            NULL,
+        },
+
+        gen7_pp_nv12_avs_initialize,
+    },
+
+    {
+        {
+            "NV12 DNDI module",
+            PP_NV12_DNDI,
+            pp_nv12_dndi_gen7,
+            sizeof(pp_nv12_dndi_gen7),
+            NULL,
+        },
+
+        gen7_pp_nv12_dndi_initialize,
+    },
+
+    {
+        {
+            "NV12 DN module",
+            PP_NV12_DN,
+            pp_nv12_dn_gen7,
+            sizeof(pp_nv12_dn_gen7),
+            NULL,
+        },
+
+        gen7_pp_nv12_dn_initialize,
+    },
+};
 
 static int
 pp_get_surface_fourcc(VADriverContextP ctx, const struct i965_surface *surface)
@@ -441,6 +600,44 @@ pp_set_surface2_tiling(struct i965_surface_state2 *ss, unsigned int tiling)
 }
 
 static void
+gen7_pp_set_surface_tiling(struct gen7_surface_state *ss, unsigned int tiling)
+{
+    switch (tiling) {
+    case I915_TILING_NONE:
+        ss->ss0.tiled_surface = 0;
+        ss->ss0.tile_walk = 0;
+        break;
+    case I915_TILING_X:
+        ss->ss0.tiled_surface = 1;
+        ss->ss0.tile_walk = I965_TILEWALK_XMAJOR;
+        break;
+    case I915_TILING_Y:
+        ss->ss0.tiled_surface = 1;
+        ss->ss0.tile_walk = I965_TILEWALK_YMAJOR;
+        break;
+    }
+}
+
+static void
+gen7_pp_set_surface2_tiling(struct gen7_surface_state2 *ss, unsigned int tiling)
+{
+    switch (tiling) {
+    case I915_TILING_NONE:
+        ss->ss2.tiled_surface = 0;
+        ss->ss2.tile_walk = 0;
+        break;
+    case I915_TILING_X:
+        ss->ss2.tiled_surface = 1;
+        ss->ss2.tile_walk = I965_TILEWALK_XMAJOR;
+        break;
+    case I915_TILING_Y:
+        ss->ss2.tiled_surface = 1;
+        ss->ss2.tile_walk = I965_TILEWALK_YMAJOR;
+        break;
+    }
+}
+
+static void
 ironlake_pp_interface_descriptor_table(struct i965_post_processing_context *pp_context)
 {
     struct i965_interface_descriptor *desc;
@@ -507,12 +704,13 @@ static void
 ironlake_pp_upload_constants(struct i965_post_processing_context *pp_context)
 {
     unsigned char *constant_buffer;
+    struct pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter;
 
-    assert(sizeof(pp_static_parameter) == 128);
+    assert(sizeof(*pp_static_parameter) == 128);
     dri_bo_map(pp_context->curbe.bo, 1);
     assert(pp_context->curbe.bo->virtual);
     constant_buffer = pp_context->curbe.bo->virtual;
-    memcpy(constant_buffer, &pp_static_parameter, sizeof(pp_static_parameter));
+    memcpy(constant_buffer, pp_static_parameter, sizeof(*pp_static_parameter));
     dri_bo_unmap(pp_context->curbe.bo);
 }
 
@@ -620,6 +818,7 @@ ironlake_pp_object_walker(VADriverContextP ctx,
 {
     struct intel_batchbuffer *batch = pp_context->batch;
     int x, x_steps, y, y_steps;
+    struct pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter;
 
     x_steps = pp_context->pp_x_steps(&pp_context->private_context);
     y_steps = pp_context->pp_y_steps(&pp_context->private_context);
@@ -634,8 +833,8 @@ ironlake_pp_object_walker(VADriverContextP ctx,
                 OUT_BATCH(batch, 0);
 
                 /* inline data grf 5-6 */
-                assert(sizeof(pp_inline_parameter) == 64);
-                intel_batchbuffer_data(batch, &pp_inline_parameter, sizeof(pp_inline_parameter));
+                assert(sizeof(*pp_inline_parameter) == 64);
+                intel_batchbuffer_data(batch, pp_inline_parameter, sizeof(*pp_inline_parameter));
 
                 ADVANCE_BATCH(batch);
             }
@@ -736,6 +935,81 @@ i965_pp_set_surface2_state(VADriverContextP ctx, struct i965_post_processing_con
     dri_bo_unmap(ss2_bo);
 }
 
+static void
+gen7_pp_set_surface_state(VADriverContextP ctx, struct i965_post_processing_context *pp_context,
+                          dri_bo *surf_bo, unsigned long surf_bo_offset,
+                          int width, int height, int pitch, int format, 
+                          int index, int is_target)
+{
+    struct gen7_surface_state *ss;
+    dri_bo *ss_bo;
+    unsigned int tiling;
+    unsigned int swizzle;
+
+    dri_bo_get_tiling(surf_bo, &tiling, &swizzle);
+    ss_bo = pp_context->surface_state_binding_table.bo;
+    assert(ss_bo);
+
+    dri_bo_map(ss_bo, True);
+    assert(ss_bo->virtual);
+    ss = (struct gen7_surface_state *)((char *)ss_bo->virtual + SURFACE_STATE_OFFSET(index));
+    memset(ss, 0, sizeof(*ss));
+    ss->ss0.surface_type = I965_SURFACE_2D;
+    ss->ss0.surface_format = format;
+    ss->ss1.base_addr = surf_bo->offset + surf_bo_offset;
+    ss->ss2.width = width - 1;
+    ss->ss2.height = height - 1;
+    ss->ss3.pitch = pitch - 1;
+    gen7_pp_set_surface_tiling(ss, tiling);
+    dri_bo_emit_reloc(ss_bo,
+                      I915_GEM_DOMAIN_RENDER, is_target ? I915_GEM_DOMAIN_RENDER : 0,
+                      surf_bo_offset,
+                      SURFACE_STATE_OFFSET(index) + offsetof(struct gen7_surface_state, ss1),
+                      surf_bo);
+    ((unsigned int *)((char *)ss_bo->virtual + BINDING_TABLE_OFFSET))[index] = SURFACE_STATE_OFFSET(index);
+    dri_bo_unmap(ss_bo);
+}
+
+static void
+gen7_pp_set_surface2_state(VADriverContextP ctx, struct i965_post_processing_context *pp_context,
+                           dri_bo *surf_bo, unsigned long surf_bo_offset,
+                           int width, int height, int wpitch,
+                           int xoffset, int yoffset,
+                           int format, int interleave_chroma,
+                           int index)
+{
+    struct gen7_surface_state2 *ss2;
+    dri_bo *ss2_bo;
+    unsigned int tiling;
+    unsigned int swizzle;
+
+    dri_bo_get_tiling(surf_bo, &tiling, &swizzle);
+    ss2_bo = pp_context->surface_state_binding_table.bo;
+    assert(ss2_bo);
+
+    dri_bo_map(ss2_bo, True);
+    assert(ss2_bo->virtual);
+    ss2 = (struct gen7_surface_state2 *)((char *)ss2_bo->virtual + SURFACE_STATE_OFFSET(index));
+    memset(ss2, 0, sizeof(*ss2));
+    ss2->ss0.surface_base_address = surf_bo->offset + surf_bo_offset;
+    ss2->ss1.cbcr_pixel_offset_v_direction = 0;
+    ss2->ss1.width = width - 1;
+    ss2->ss1.height = height - 1;
+    ss2->ss2.pitch = wpitch - 1;
+    ss2->ss2.interleave_chroma = interleave_chroma;
+    ss2->ss2.surface_format = format;
+    ss2->ss3.x_offset_for_cb = xoffset;
+    ss2->ss3.y_offset_for_cb = yoffset;
+    gen7_pp_set_surface2_tiling(ss2, tiling);
+    dri_bo_emit_reloc(ss2_bo,
+                      I915_GEM_DOMAIN_RENDER, 0,
+                      surf_bo_offset,
+                      SURFACE_STATE_OFFSET(index) + offsetof(struct gen7_surface_state2, ss0),
+                      surf_bo);
+    ((unsigned int *)((char *)ss2_bo->virtual + BINDING_TABLE_OFFSET))[index] = SURFACE_STATE_OFFSET(index);
+    dri_bo_unmap(ss2_bo);
+}
+
 static void 
 pp_set_media_rw_message_surface(VADriverContextP ctx, struct i965_post_processing_context *pp_context,
                                 const struct i965_surface *surface, 
@@ -881,10 +1155,12 @@ pp_load_save_y_steps(void *private_context)
 static int
 pp_load_save_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y)
 {
-    pp_inline_parameter.grf5.block_vertical_mask = 0xff;
-    pp_inline_parameter.grf5.block_horizontal_mask = 0xffff;
-    pp_inline_parameter.grf5.destination_block_horizontal_origin = x * 16;
-    pp_inline_parameter.grf5.destination_block_vertical_origin = y * 8;
+    struct pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter;
+
+    pp_inline_parameter->grf5.block_vertical_mask = 0xff;
+    pp_inline_parameter->grf5.block_horizontal_mask = 0xffff;
+    pp_inline_parameter->grf5.destination_block_horizontal_origin = x * 16;
+    pp_inline_parameter->grf5.destination_block_vertical_origin = y * 8;
 
     return 0;
 }
@@ -898,6 +1174,7 @@ pp_plx_load_save_plx_initialize(VADriverContextP ctx, struct i965_post_processin
                                 void *filter_param)
 {
     struct pp_load_save_context *pp_load_save_context = (struct pp_load_save_context *)&pp_context->private_context;
+    struct pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter;
     int width[3], height[3], pitch[3], offset[3];
     const int Y = 0;
 
@@ -916,8 +1193,8 @@ pp_plx_load_save_plx_initialize(VADriverContextP ctx, struct i965_post_processin
     pp_load_save_context->dest_h = ALIGN(height[Y], 16);
     pp_load_save_context->dest_w = ALIGN(width[Y], 16);
 
-    pp_inline_parameter.grf5.block_count_x = ALIGN(width[Y], 16) / 16;   /* 1 x N */
-    pp_inline_parameter.grf5.number_blocks = ALIGN(width[Y], 16) / 16;
+    pp_inline_parameter->grf5.block_count_x = ALIGN(width[Y], 16) / 16;   /* 1 x N */
+    pp_inline_parameter->grf5.number_blocks = ALIGN(width[Y], 16) / 16;
 
     dst_surface->flags = src_surface->flags;
 
@@ -942,13 +1219,15 @@ static int
 pp_scaling_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y)
 {
     struct pp_scaling_context *pp_scaling_context = (struct pp_scaling_context *)&pp_context->private_context;
-    float src_x_steping = pp_inline_parameter.grf5.normalized_video_x_scaling_step;
-    float src_y_steping = pp_static_parameter.grf1.r1_6.normalized_video_y_scaling_step;
-
-    pp_inline_parameter.grf5.r5_1.source_surface_block_normalized_horizontal_origin = src_x_steping * x * 16 + pp_scaling_context->src_normalized_x;
-    pp_inline_parameter.grf5.source_surface_block_normalized_vertical_origin = src_y_steping * y * 8 + pp_scaling_context->src_normalized_y;
-    pp_inline_parameter.grf5.destination_block_horizontal_origin = x * 16 + pp_scaling_context->dest_x;
-    pp_inline_parameter.grf5.destination_block_vertical_origin = y * 8 + pp_scaling_context->dest_y;
+    struct pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter;
+    struct pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter;
+    float src_x_steping = pp_inline_parameter->grf5.normalized_video_x_scaling_step;
+    float src_y_steping = pp_static_parameter->grf1.r1_6.normalized_video_y_scaling_step;
+
+    pp_inline_parameter->grf5.r5_1.source_surface_block_normalized_horizontal_origin = src_x_steping * x * 16 + pp_scaling_context->src_normalized_x;
+    pp_inline_parameter->grf5.source_surface_block_normalized_vertical_origin = src_y_steping * y * 8 + pp_scaling_context->src_normalized_y;
+    pp_inline_parameter->grf5.destination_block_horizontal_origin = x * 16 + pp_scaling_context->dest_x;
+    pp_inline_parameter->grf5.destination_block_vertical_origin = y * 8 + pp_scaling_context->dest_y;
     
     return 0;
 }
@@ -963,6 +1242,8 @@ pp_nv12_scaling_initialize(VADriverContextP ctx, struct i965_post_processing_con
 {
     struct i965_driver_data *i965 = i965_driver_data(ctx);
     struct pp_scaling_context *pp_scaling_context = (struct pp_scaling_context *)&pp_context->private_context;
+    struct pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter;
+    struct pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter;
     struct object_surface *obj_surface;
     struct i965_sampler_state *sampler_state;
     int in_w, in_h, in_wpitch, in_hpitch;
@@ -1039,13 +1320,13 @@ pp_nv12_scaling_initialize(VADriverContextP ctx, struct i965_post_processing_con
     pp_scaling_context->src_normalized_x = (float)src_rect->x / in_w / out_w;
     pp_scaling_context->src_normalized_y = (float)src_rect->y / in_h / out_h;
 
-    pp_static_parameter.grf1.r1_6.normalized_video_y_scaling_step = (float) src_rect->height / in_h / out_h;
+    pp_static_parameter->grf1.r1_6.normalized_video_y_scaling_step = (float) src_rect->height / in_h / out_h;
 
-    pp_inline_parameter.grf5.normalized_video_x_scaling_step = (float) src_rect->width / in_w / out_w;
-    pp_inline_parameter.grf5.block_count_x = pp_scaling_context->dest_w / 16;   /* 1 x N */
-    pp_inline_parameter.grf5.number_blocks = pp_scaling_context->dest_w / 16;
-    pp_inline_parameter.grf5.block_vertical_mask = 0xff;
-    pp_inline_parameter.grf5.block_horizontal_mask = 0xffff;
+    pp_inline_parameter->grf5.normalized_video_x_scaling_step = (float) src_rect->width / in_w / out_w;
+    pp_inline_parameter->grf5.block_count_x = pp_scaling_context->dest_w / 16;   /* 1 x N */
+    pp_inline_parameter->grf5.number_blocks = pp_scaling_context->dest_w / 16;
+    pp_inline_parameter->grf5.block_vertical_mask = 0xff;
+    pp_inline_parameter->grf5.block_horizontal_mask = 0xffff;
 
     dst_surface->flags = src_surface->flags;
 
@@ -1070,20 +1351,22 @@ static int
 pp_avs_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y)
 {
     struct pp_avs_context *pp_avs_context = (struct pp_avs_context *)&pp_context->private_context;
+    struct pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter;
+    struct pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter;
     float src_x_steping, src_y_steping, video_step_delta;
     int tmp_w = ALIGN(pp_avs_context->dest_h * pp_avs_context->src_w / pp_avs_context->src_h, 16);
 
     if (tmp_w >= pp_avs_context->dest_w) {
-        pp_inline_parameter.grf5.normalized_video_x_scaling_step = 1.0 / tmp_w;
-        pp_inline_parameter.grf6.video_step_delta = 0;
+        pp_inline_parameter->grf5.normalized_video_x_scaling_step = 1.0 / tmp_w;
+        pp_inline_parameter->grf6.video_step_delta = 0;
         
         if (x == 0) {
-            pp_inline_parameter.grf5.r5_1.source_surface_block_normalized_horizontal_origin = (float)(tmp_w - pp_avs_context->dest_w) / tmp_w / 2 +
+            pp_inline_parameter->grf5.r5_1.source_surface_block_normalized_horizontal_origin = (float)(tmp_w - pp_avs_context->dest_w) / tmp_w / 2 +
                 pp_avs_context->src_normalized_x;
         } else {
-            src_x_steping = pp_inline_parameter.grf5.normalized_video_x_scaling_step;
-            video_step_delta = pp_inline_parameter.grf6.video_step_delta;
-            pp_inline_parameter.grf5.r5_1.source_surface_block_normalized_horizontal_origin += src_x_steping * 16 +
+            src_x_steping = pp_inline_parameter->grf5.normalized_video_x_scaling_step;
+            video_step_delta = pp_inline_parameter->grf6.video_step_delta;
+            pp_inline_parameter->grf5.r5_1.source_surface_block_normalized_horizontal_origin += src_x_steping * 16 +
                 16 * 15 * video_step_delta / 2;
         }
     } else {
@@ -1099,15 +1382,15 @@ pp_avs_set_block_parameter(struct i965_post_processing_context *pp_context, int
         f = (float) n2 * 16 / tmp_w;
         
         if (n0 < 5) {
-            pp_inline_parameter.grf6.video_step_delta = 0.0;
+            pp_inline_parameter->grf6.video_step_delta = 0.0;
 
             if (x == 0) {
-                pp_inline_parameter.grf5.normalized_video_x_scaling_step = 1.0 / pp_avs_context->dest_w;
-                pp_inline_parameter.grf5.r5_1.source_surface_block_normalized_horizontal_origin = pp_avs_context->src_normalized_x;
+                pp_inline_parameter->grf5.normalized_video_x_scaling_step = 1.0 / pp_avs_context->dest_w;
+                pp_inline_parameter->grf5.r5_1.source_surface_block_normalized_horizontal_origin = pp_avs_context->src_normalized_x;
             } else {
-                src_x_steping = pp_inline_parameter.grf5.normalized_video_x_scaling_step;
-                video_step_delta = pp_inline_parameter.grf6.video_step_delta;
-                pp_inline_parameter.grf5.r5_1.source_surface_block_normalized_horizontal_origin += src_x_steping * 16 +
+                src_x_steping = pp_inline_parameter->grf5.normalized_video_x_scaling_step;
+                video_step_delta = pp_inline_parameter->grf6.video_step_delta;
+                pp_inline_parameter->grf5.r5_1.source_surface_block_normalized_horizontal_origin += src_x_steping * 16 +
                     16 * 15 * video_step_delta / 2;
             }
         } else {
@@ -1116,48 +1399,48 @@ pp_avs_set_block_parameter(struct i965_post_processing_context *pp_context, int
                 float a = f / (nls_left * 16 * factor_b);
                 float b = (f - nls_left * 16 * a) * 2 / (nls_left * 16 * (nls_left * 16 - 1));
                 
-                pp_inline_parameter.grf6.video_step_delta = b;
+                pp_inline_parameter->grf6.video_step_delta = b;
 
                 if (x == 0) {
-                    pp_inline_parameter.grf5.r5_1.source_surface_block_normalized_horizontal_origin = pp_avs_context->src_normalized_x;
-                    pp_inline_parameter.grf5.normalized_video_x_scaling_step = a;
+                    pp_inline_parameter->grf5.r5_1.source_surface_block_normalized_horizontal_origin = pp_avs_context->src_normalized_x;
+                    pp_inline_parameter->grf5.normalized_video_x_scaling_step = a;
                 } else {
-                    src_x_steping = pp_inline_parameter.grf5.normalized_video_x_scaling_step;
-                    video_step_delta = pp_inline_parameter.grf6.video_step_delta;
-                    pp_inline_parameter.grf5.r5_1.source_surface_block_normalized_horizontal_origin += src_x_steping * 16 +
+                    src_x_steping = pp_inline_parameter->grf5.normalized_video_x_scaling_step;
+                    video_step_delta = pp_inline_parameter->grf6.video_step_delta;
+                    pp_inline_parameter->grf5.r5_1.source_surface_block_normalized_horizontal_origin += src_x_steping * 16 +
                         16 * 15 * video_step_delta / 2;
-                    pp_inline_parameter.grf5.normalized_video_x_scaling_step += 16 * b;
+                    pp_inline_parameter->grf5.normalized_video_x_scaling_step += 16 * b;
                 }
             } else if (x < (pp_avs_context->dest_w / 16 - nls_right)) {
                 /* scale the center linearly */
-                src_x_steping = pp_inline_parameter.grf5.normalized_video_x_scaling_step;
-                video_step_delta = pp_inline_parameter.grf6.video_step_delta;
-                pp_inline_parameter.grf5.r5_1.source_surface_block_normalized_horizontal_origin += src_x_steping * 16 +
+                src_x_steping = pp_inline_parameter->grf5.normalized_video_x_scaling_step;
+                video_step_delta = pp_inline_parameter->grf6.video_step_delta;
+                pp_inline_parameter->grf5.r5_1.source_surface_block_normalized_horizontal_origin += src_x_steping * 16 +
                     16 * 15 * video_step_delta / 2;
-                pp_inline_parameter.grf6.video_step_delta = 0.0;
-                pp_inline_parameter.grf5.normalized_video_x_scaling_step = 1.0 / tmp_w;
+                pp_inline_parameter->grf6.video_step_delta = 0.0;
+                pp_inline_parameter->grf5.normalized_video_x_scaling_step = 1.0 / tmp_w;
             } else {
                 float a = f / (nls_right * 16 * factor_b);
                 float b = (f - nls_right * 16 * a) * 2 / (nls_right * 16 * (nls_right * 16 - 1));
 
-                src_x_steping = pp_inline_parameter.grf5.normalized_video_x_scaling_step;
-                video_step_delta = pp_inline_parameter.grf6.video_step_delta;
-                pp_inline_parameter.grf5.r5_1.source_surface_block_normalized_horizontal_origin += src_x_steping * 16 +
+                src_x_steping = pp_inline_parameter->grf5.normalized_video_x_scaling_step;
+                video_step_delta = pp_inline_parameter->grf6.video_step_delta;
+                pp_inline_parameter->grf5.r5_1.source_surface_block_normalized_horizontal_origin += src_x_steping * 16 +
                     16 * 15 * video_step_delta / 2;
-                pp_inline_parameter.grf6.video_step_delta = -b;
+                pp_inline_parameter->grf6.video_step_delta = -b;
 
                 if (x == (pp_avs_context->dest_w / 16 - nls_right))
-                    pp_inline_parameter.grf5.normalized_video_x_scaling_step = a + (nls_right * 16  - 1) * b;
+                    pp_inline_parameter->grf5.normalized_video_x_scaling_step = a + (nls_right * 16  - 1) * b;
                 else
-                    pp_inline_parameter.grf5.normalized_video_x_scaling_step -= b * 16;
+                    pp_inline_parameter->grf5.normalized_video_x_scaling_step -= b * 16;
             }
         }
     }
 
-    src_y_steping = pp_static_parameter.grf1.r1_6.normalized_video_y_scaling_step;
-    pp_inline_parameter.grf5.source_surface_block_normalized_vertical_origin = src_y_steping * y * 8 + pp_avs_context->src_normalized_y;
-    pp_inline_parameter.grf5.destination_block_horizontal_origin = x * 16 + pp_avs_context->dest_x;
-    pp_inline_parameter.grf5.destination_block_vertical_origin = y * 8 + pp_avs_context->dest_y;
+    src_y_steping = pp_static_parameter->grf1.r1_6.normalized_video_y_scaling_step;
+    pp_inline_parameter->grf5.source_surface_block_normalized_vertical_origin = src_y_steping * y * 8 + pp_avs_context->src_normalized_y;
+    pp_inline_parameter->grf5.destination_block_horizontal_origin = x * 16 + pp_avs_context->dest_x;
+    pp_inline_parameter->grf5.destination_block_vertical_origin = y * 8 + pp_avs_context->dest_y;
 
     return 0;
 }
@@ -1172,6 +1455,8 @@ pp_nv12_avs_initialize(VADriverContextP ctx, struct i965_post_processing_context
 {
     struct i965_driver_data *i965 = i965_driver_data(ctx);
     struct pp_avs_context *pp_avs_context = (struct pp_avs_context *)&pp_context->private_context;
+    struct pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter;
+    struct pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter;
     struct object_surface *obj_surface;
     struct i965_sampler_8x8 *sampler_8x8;
     struct i965_sampler_8x8_state *sampler_8x8_state;
@@ -1395,15 +1680,15 @@ pp_nv12_avs_initialize(VADriverContextP ctx, struct i965_post_processing_context
     pp_avs_context->src_w = src_rect->width;
     pp_avs_context->src_h = src_rect->height;
 
-    pp_static_parameter.grf4.r4_2.avs.nlas = 1;
-    pp_static_parameter.grf1.r1_6.normalized_video_y_scaling_step = (float) src_rect->height / in_h / out_h;
+    pp_static_parameter->grf4.r4_2.avs.nlas = 1;
+    pp_static_parameter->grf1.r1_6.normalized_video_y_scaling_step = (float) src_rect->height / in_h / out_h;
 
-    pp_inline_parameter.grf5.normalized_video_x_scaling_step = (float) src_rect->width / in_w / out_w;
-    pp_inline_parameter.grf5.block_count_x = 1;        /* M x 1 */
-    pp_inline_parameter.grf5.number_blocks = pp_avs_context->dest_h / 8;
-    pp_inline_parameter.grf5.block_vertical_mask = 0xff;
-    pp_inline_parameter.grf5.block_horizontal_mask = 0xffff;
-    pp_inline_parameter.grf6.video_step_delta = 0.0;
+    pp_inline_parameter->grf5.normalized_video_x_scaling_step = (float) src_rect->width / in_w / out_w;
+    pp_inline_parameter->grf5.block_count_x = 1;        /* M x 1 */
+    pp_inline_parameter->grf5.number_blocks = pp_avs_context->dest_h / 8;
+    pp_inline_parameter->grf5.block_vertical_mask = 0xff;
+    pp_inline_parameter->grf5.block_horizontal_mask = 0xffff;
+    pp_inline_parameter->grf6.video_step_delta = 0.0;
 
     dst_surface->flags = src_surface->flags;
 
@@ -1411,61 +1696,295 @@ pp_nv12_avs_initialize(VADriverContextP ctx, struct i965_post_processing_context
 }
 
 static int
-pp_dndi_x_steps(void *private_context)
+gen7_pp_avs_x_steps(void *private_context)
 {
-    return 1;
+    struct pp_avs_context *pp_avs_context = private_context;
+
+    return pp_avs_context->dest_w / 16;
 }
 
 static int
-pp_dndi_y_steps(void *private_context)
+gen7_pp_avs_y_steps(void *private_context)
 {
-    struct pp_dndi_context *pp_dndi_context = private_context;
+    struct pp_avs_context *pp_avs_context = private_context;
 
-    return pp_dndi_context->dest_h / 4;
+    return pp_avs_context->dest_h / 16;
 }
 
 static int
-pp_dndi_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y)
+gen7_pp_avs_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y)
 {
-    pp_inline_parameter.grf5.destination_block_horizontal_origin = x * 16;
-    pp_inline_parameter.grf5.destination_block_vertical_origin = y * 4;
+    struct pp_avs_context *pp_avs_context = (struct pp_avs_context *)&pp_context->private_context;
+    struct gen7_pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter;
+
+    pp_inline_parameter->grf7.destination_block_horizontal_origin = x * 16 + pp_avs_context->dest_x;
+    pp_inline_parameter->grf7.destination_block_vertical_origin = y * 16 + pp_avs_context->dest_y;
+    pp_inline_parameter->grf7.constant_0 = 0xffffffff;
+    pp_inline_parameter->grf7.sampler_load_main_video_x_scaling_step = 1.0 / pp_avs_context->src_w;
 
     return 0;
 }
 
-static VAStatus
-pp_nv12_dndi_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context,
-                        const struct i965_surface *src_surface,
-                        const VARectangle *src_rect,
-                        struct i965_surface *dst_surface,
-                        const VARectangle *dst_rect,
-                        void *filter_param)
+VAStatus
+gen7_pp_nv12_avs_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context,
+                            const struct i965_surface *src_surface,
+                            const VARectangle *src_rect,
+                            struct i965_surface *dst_surface,
+                            const VARectangle *dst_rect,
+                            void *filter_param)
 {
     struct i965_driver_data *i965 = i965_driver_data(ctx);
-    struct pp_dndi_context *pp_dndi_context = (struct pp_dndi_context *)&pp_context->private_context;
+    struct pp_avs_context *pp_avs_context = (struct pp_avs_context *)&pp_context->private_context;
+    struct gen7_pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter;
     struct object_surface *obj_surface;
-    struct i965_sampler_dndi *sampler_dndi;
-    int index;
-    int w, h;
-    int orig_w, orig_h;
-    int dndi_top_first = 1;
-
-    if (src_surface->flags == I965_SURFACE_FLAG_FRAME)
-        return VA_STATUS_ERROR_FLAG_NOT_SUPPORTED;
-
-    if (src_surface->flags == I965_SURFACE_FLAG_TOP_FIELD_FIRST)
-        dndi_top_first = 1;
-    else
-        dndi_top_first = 0;
+    struct gen7_sampler_8x8 *sampler_8x8;
+    struct i965_sampler_8x8_state *sampler_8x8_state;
+    int index, i;
+    int in_w, in_h, in_wpitch, in_hpitch;
+    int out_w, out_h, out_wpitch, out_hpitch;
 
     /* surface */
     obj_surface = SURFACE(src_surface->id);
-    orig_w = obj_surface->orig_width;
-    orig_h = obj_surface->orig_height;
-    w = obj_surface->width;
-    h = obj_surface->height;
+    in_w = obj_surface->orig_width;
+    in_h = obj_surface->orig_height;
+    in_wpitch = obj_surface->width;
+    in_hpitch = obj_surface->height;
 
-    if (pp_context->stmm.bo == NULL) {
+    /* source Y surface index 0 */
+    gen7_pp_set_surface2_state(ctx, pp_context,
+                               obj_surface->bo, 0,
+                               in_w, in_h, in_wpitch,
+                               0, 0,
+                               SURFACE_FORMAT_Y8_UNORM, 0,
+                               0);
+
+    /* source UV surface index 1 */
+    gen7_pp_set_surface2_state(ctx, pp_context,
+                               obj_surface->bo, in_wpitch * in_hpitch,
+                               in_w / 2, in_h / 2, in_wpitch,
+                               0, 0,
+                               SURFACE_FORMAT_R8B8_UNORM, 0,
+                               1);
+
+    /* destination surface */
+    obj_surface = SURFACE(dst_surface->id);
+    out_w = obj_surface->orig_width;
+    out_h = obj_surface->orig_height;
+    out_wpitch = obj_surface->width;
+    out_hpitch = obj_surface->height;
+    assert(out_w <= out_wpitch && out_h <= out_hpitch);
+
+    /* destination Y surface index 24 */
+    gen7_pp_set_surface_state(ctx, pp_context,
+                              obj_surface->bo, 0,
+                              out_w / 4, out_h, out_wpitch, I965_SURFACEFORMAT_R8_SINT,
+                              24, 1);
+
+    /* destination UV surface index 25 */
+    gen7_pp_set_surface_state(ctx, pp_context,
+                              obj_surface->bo, out_wpitch * out_hpitch,
+                              out_w / 4, out_h / 2, out_wpitch, I965_SURFACEFORMAT_R8G8_SINT,
+                              25, 1);
+
+    /* sampler 8x8 state */
+    dri_bo_map(pp_context->sampler_state_table.bo_8x8, True);
+    assert(pp_context->sampler_state_table.bo_8x8->virtual);
+    assert(sizeof(*sampler_8x8_state) == sizeof(int) * 138);
+    sampler_8x8_state = pp_context->sampler_state_table.bo_8x8->virtual;
+    memset(sampler_8x8_state, 0, sizeof(*sampler_8x8_state));
+
+    for (i = 0; i < 17; i++) {
+        /* for Y channel, currently ignore */
+        sampler_8x8_state->coefficients[i].dw0.table_0x_filter_c0 = 0x0;
+        sampler_8x8_state->coefficients[i].dw0.table_0x_filter_c1 = 0x0;
+        sampler_8x8_state->coefficients[i].dw0.table_0x_filter_c2 = 0x0;
+        sampler_8x8_state->coefficients[i].dw0.table_0x_filter_c3 = 0x0;
+        sampler_8x8_state->coefficients[i].dw1.table_0x_filter_c4 = 0x0;
+        sampler_8x8_state->coefficients[i].dw1.table_0x_filter_c5 = 0x0;
+        sampler_8x8_state->coefficients[i].dw1.table_0x_filter_c6 = 0x0;
+        sampler_8x8_state->coefficients[i].dw1.table_0x_filter_c7 = 0x0;
+        sampler_8x8_state->coefficients[i].dw2.table_0y_filter_c0 = 0x0;
+        sampler_8x8_state->coefficients[i].dw2.table_0y_filter_c1 = 0x0;
+        sampler_8x8_state->coefficients[i].dw2.table_0y_filter_c2 = 0x0;
+        sampler_8x8_state->coefficients[i].dw2.table_0y_filter_c3 = 0x0;
+        sampler_8x8_state->coefficients[i].dw3.table_0y_filter_c4 = 0x0;
+        sampler_8x8_state->coefficients[i].dw3.table_0y_filter_c5 = 0x0;
+        sampler_8x8_state->coefficients[i].dw3.table_0y_filter_c6 = 0x0;
+        sampler_8x8_state->coefficients[i].dw3.table_0y_filter_c7 = 0x0;
+        /* for U/V channel, 0.25 */
+        sampler_8x8_state->coefficients[i].dw4.table_1x_filter_c0 = 0x0;
+        sampler_8x8_state->coefficients[i].dw4.table_1x_filter_c1 = 0x0;
+        sampler_8x8_state->coefficients[i].dw4.table_1x_filter_c2 = 0x10;
+        sampler_8x8_state->coefficients[i].dw4.table_1x_filter_c3 = 0x10;
+        sampler_8x8_state->coefficients[i].dw5.table_1x_filter_c4 = 0x10;
+        sampler_8x8_state->coefficients[i].dw5.table_1x_filter_c5 = 0x10;
+        sampler_8x8_state->coefficients[i].dw5.table_1x_filter_c6 = 0x0;
+        sampler_8x8_state->coefficients[i].dw5.table_1x_filter_c7 = 0x0;
+        sampler_8x8_state->coefficients[i].dw6.table_1y_filter_c0 = 0x0;
+        sampler_8x8_state->coefficients[i].dw6.table_1y_filter_c1 = 0x0;
+        sampler_8x8_state->coefficients[i].dw6.table_1y_filter_c2 = 0x10;
+        sampler_8x8_state->coefficients[i].dw6.table_1y_filter_c3 = 0x10;
+        sampler_8x8_state->coefficients[i].dw7.table_1y_filter_c4 = 0x10;
+        sampler_8x8_state->coefficients[i].dw7.table_1y_filter_c5 = 0x10;
+        sampler_8x8_state->coefficients[i].dw7.table_1y_filter_c6 = 0x0;
+        sampler_8x8_state->coefficients[i].dw7.table_1y_filter_c7 = 0x0;
+    }
+
+    sampler_8x8_state->dw136.default_sharpness_level = 0;
+    sampler_8x8_state->dw137.adaptive_filter_for_all_channel = 1;
+    sampler_8x8_state->dw137.bypass_y_adaptive_filtering = 1;
+    sampler_8x8_state->dw137.bypass_x_adaptive_filtering = 1;
+    dri_bo_unmap(pp_context->sampler_state_table.bo_8x8);
+
+    /* sampler 8x8 */
+    dri_bo_map(pp_context->sampler_state_table.bo, True);
+    assert(pp_context->sampler_state_table.bo->virtual);
+    assert(sizeof(*sampler_8x8) == sizeof(int) * 4);
+    sampler_8x8 = pp_context->sampler_state_table.bo->virtual;
+
+    /* sample_8x8 Y index 4 */
+    index = 4;
+    memset(&sampler_8x8[index], 0, sizeof(*sampler_8x8));
+    sampler_8x8[index].dw0.global_noise_estimation = 255;
+    sampler_8x8[index].dw0.ief_bypass = 1;
+
+    sampler_8x8[index].dw1.sampler_8x8_state_pointer = pp_context->sampler_state_table.bo_8x8->offset >> 5;
+
+    sampler_8x8[index].dw2.weak_edge_threshold = 1;
+    sampler_8x8[index].dw2.strong_edge_threshold = 8;
+    sampler_8x8[index].dw2.r5x_coefficient = 9;
+    sampler_8x8[index].dw2.r5cx_coefficient = 8;
+    sampler_8x8[index].dw2.r5c_coefficient = 3;
+
+    sampler_8x8[index].dw3.r3x_coefficient = 27;
+    sampler_8x8[index].dw3.r3c_coefficient = 5;
+    sampler_8x8[index].dw3.gain_factor = 40;
+    sampler_8x8[index].dw3.non_edge_weight = 1;
+    sampler_8x8[index].dw3.regular_weight = 2;
+    sampler_8x8[index].dw3.strong_edge_weight = 7;
+    sampler_8x8[index].dw3.ief4_smooth_enable = 0;
+
+    dri_bo_emit_reloc(pp_context->sampler_state_table.bo,
+                      I915_GEM_DOMAIN_RENDER, 
+                      0,
+                      0,
+                      sizeof(*sampler_8x8) * index + offsetof(struct i965_sampler_8x8, dw1),
+                      pp_context->sampler_state_table.bo_8x8);
+
+    /* sample_8x8 UV index 8 */
+    index = 8;
+    memset(&sampler_8x8[index], 0, sizeof(*sampler_8x8));
+    sampler_8x8[index].dw0.disable_8x8_filter = 0;
+    sampler_8x8[index].dw0.global_noise_estimation = 255;
+    sampler_8x8[index].dw0.ief_bypass = 1;
+    sampler_8x8[index].dw1.sampler_8x8_state_pointer = pp_context->sampler_state_table.bo_8x8->offset >> 5;
+    sampler_8x8[index].dw2.weak_edge_threshold = 1;
+    sampler_8x8[index].dw2.strong_edge_threshold = 8;
+    sampler_8x8[index].dw2.r5x_coefficient = 9;
+    sampler_8x8[index].dw2.r5cx_coefficient = 8;
+    sampler_8x8[index].dw2.r5c_coefficient = 3;
+    sampler_8x8[index].dw3.r3x_coefficient = 27;
+    sampler_8x8[index].dw3.r3c_coefficient = 5;
+    sampler_8x8[index].dw3.gain_factor = 40;
+    sampler_8x8[index].dw3.non_edge_weight = 1;
+    sampler_8x8[index].dw3.regular_weight = 2;
+    sampler_8x8[index].dw3.strong_edge_weight = 7;
+    sampler_8x8[index].dw3.ief4_smooth_enable = 0;
+
+    dri_bo_emit_reloc(pp_context->sampler_state_table.bo,
+                      I915_GEM_DOMAIN_RENDER, 
+                      0,
+                      0,
+                      sizeof(*sampler_8x8) * index + offsetof(struct i965_sampler_8x8, dw1),
+                      pp_context->sampler_state_table.bo_8x8);
+
+    dri_bo_unmap(pp_context->sampler_state_table.bo);
+
+    /* private function & data */
+    pp_context->pp_x_steps = gen7_pp_avs_x_steps;
+    pp_context->pp_y_steps = gen7_pp_avs_y_steps;
+    pp_context->pp_set_block_parameter = gen7_pp_avs_set_block_parameter;
+
+    pp_avs_context->dest_x = dst_rect->x;
+    pp_avs_context->dest_y = dst_rect->y;
+    pp_avs_context->dest_w = ALIGN(dst_rect->width, 16);
+    pp_avs_context->dest_h = ALIGN(dst_rect->height, 16);
+    pp_avs_context->src_normalized_x = (float)src_rect->x / in_w / out_w;
+    pp_avs_context->src_normalized_y = (float)src_rect->y / in_h / out_h;
+    pp_avs_context->src_w = src_rect->width;
+    pp_avs_context->src_h = src_rect->height;
+
+    pp_static_parameter->grf1.pointer_to_inline_parameter = 7;
+    pp_static_parameter->grf3.sampler_load_horizontal_scaling_step_ratio = (float) pp_avs_context->src_w / pp_avs_context->dest_w;
+    pp_static_parameter->grf4.sampler_load_vertical_scaling_step = (float) 1.0 / out_h;
+    pp_static_parameter->grf5.sampler_load_vertical_frame_origin = 0.0; /* FIXME */
+    pp_static_parameter->grf6.sampler_load_horizontal_frame_origin = 0.0;
+
+    dst_surface->flags = src_surface->flags;
+
+    return VA_STATUS_SUCCESS;
+}
+
+static int
+pp_dndi_x_steps(void *private_context)
+{
+    return 1;
+}
+
+static int
+pp_dndi_y_steps(void *private_context)
+{
+    struct pp_dndi_context *pp_dndi_context = private_context;
+
+    return pp_dndi_context->dest_h / 4;
+}
+
+static int
+pp_dndi_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y)
+{
+    struct pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter;
+
+    pp_inline_parameter->grf5.destination_block_horizontal_origin = x * 16;
+    pp_inline_parameter->grf5.destination_block_vertical_origin = y * 4;
+
+    return 0;
+}
+
+static VAStatus
+pp_nv12_dndi_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context,
+                        const struct i965_surface *src_surface,
+                        const VARectangle *src_rect,
+                        struct i965_surface *dst_surface,
+                        const VARectangle *dst_rect,
+                        void *filter_param)
+{
+    struct i965_driver_data *i965 = i965_driver_data(ctx);
+    struct pp_dndi_context *pp_dndi_context = (struct pp_dndi_context *)&pp_context->private_context;
+    struct pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter;
+    struct pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter;
+    struct object_surface *obj_surface;
+    struct i965_sampler_dndi *sampler_dndi;
+    int index;
+    int w, h;
+    int orig_w, orig_h;
+    int dndi_top_first = 1;
+
+    if (src_surface->flags == I965_SURFACE_FLAG_FRAME)
+        return VA_STATUS_ERROR_FLAG_NOT_SUPPORTED;
+
+    if (src_surface->flags == I965_SURFACE_FLAG_TOP_FIELD_FIRST)
+        dndi_top_first = 1;
+    else
+        dndi_top_first = 0;
+
+    /* surface */
+    obj_surface = SURFACE(src_surface->id);
+    orig_w = obj_surface->orig_width;
+    orig_h = obj_surface->orig_height;
+    w = obj_surface->width;
+    h = obj_surface->height;
+
+    if (pp_context->stmm.bo == NULL) {
         pp_context->stmm.bo = dri_bo_alloc(i965->intel.bufmgr,
                                            "STMM surface",
                                            w * h,
@@ -1576,15 +2095,15 @@ pp_nv12_dndi_initialize(VADriverContextP ctx, struct i965_post_processing_contex
     pp_context->pp_y_steps = pp_dndi_y_steps;
     pp_context->pp_set_block_parameter = pp_dndi_set_block_parameter;
 
-    pp_static_parameter.grf1.statistics_surface_picth = w / 2;
-    pp_static_parameter.grf1.r1_6.di.top_field_first = 0;
-    pp_static_parameter.grf4.r4_2.di.motion_history_coefficient_m2 = 64;
-    pp_static_parameter.grf4.r4_2.di.motion_history_coefficient_m1 = 192;
+    pp_static_parameter->grf1.statistics_surface_picth = w / 2;
+    pp_static_parameter->grf1.r1_6.di.top_field_first = 0;
+    pp_static_parameter->grf4.r4_2.di.motion_history_coefficient_m2 = 64;
+    pp_static_parameter->grf4.r4_2.di.motion_history_coefficient_m1 = 192;
 
-    pp_inline_parameter.grf5.block_count_x = w / 16;   /* 1 x N */
-    pp_inline_parameter.grf5.number_blocks = w / 16;
-    pp_inline_parameter.grf5.block_vertical_mask = 0xff;
-    pp_inline_parameter.grf5.block_horizontal_mask = 0xffff;
+    pp_inline_parameter->grf5.block_count_x = w / 16;   /* 1 x N */
+    pp_inline_parameter->grf5.number_blocks = w / 16;
+    pp_inline_parameter->grf5.block_vertical_mask = 0xff;
+    pp_inline_parameter->grf5.block_horizontal_mask = 0xffff;
 
     pp_dndi_context->dest_w = w;
     pp_dndi_context->dest_h = h;
@@ -1611,8 +2130,10 @@ pp_dn_y_steps(void *private_context)
 static int
 pp_dn_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y)
 {
-    pp_inline_parameter.grf5.destination_block_horizontal_origin = x * 16;
-    pp_inline_parameter.grf5.destination_block_vertical_origin = y * 8;
+    struct pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter;
+
+    pp_inline_parameter->grf5.destination_block_horizontal_origin = x * 16;
+    pp_inline_parameter->grf5.destination_block_vertical_origin = y * 8;
 
     return 0;
 }
@@ -1629,6 +2150,8 @@ pp_nv12_dn_initialize(VADriverContextP ctx, struct i965_post_processing_context
     struct pp_dn_context *pp_dn_context = (struct pp_dn_context *)&pp_context->private_context;
     struct object_surface *obj_surface;
     struct i965_sampler_dndi *sampler_dndi;
+    struct pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter;
+    struct pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter;
     VAProcFilterBaseParameterBuffer *dn_filter_param = filter_param;
     int index;
     int w, h;
@@ -1778,15 +2301,15 @@ pp_nv12_dn_initialize(VADriverContextP ctx, struct i965_post_processing_context
     pp_context->pp_y_steps = pp_dn_y_steps;
     pp_context->pp_set_block_parameter = pp_dn_set_block_parameter;
 
-    pp_static_parameter.grf1.statistics_surface_picth = w / 2;
-    pp_static_parameter.grf1.r1_6.di.top_field_first = 0;
-    pp_static_parameter.grf4.r4_2.di.motion_history_coefficient_m2 = 64;
-    pp_static_parameter.grf4.r4_2.di.motion_history_coefficient_m1 = 192;
+    pp_static_parameter->grf1.statistics_surface_picth = w / 2;
+    pp_static_parameter->grf1.r1_6.di.top_field_first = 0;
+    pp_static_parameter->grf4.r4_2.di.motion_history_coefficient_m2 = 64;
+    pp_static_parameter->grf4.r4_2.di.motion_history_coefficient_m1 = 192;
 
-    pp_inline_parameter.grf5.block_count_x = w / 16;   /* 1 x N */
-    pp_inline_parameter.grf5.number_blocks = w / 16;
-    pp_inline_parameter.grf5.block_vertical_mask = 0xff;
-    pp_inline_parameter.grf5.block_horizontal_mask = 0xffff;
+    pp_inline_parameter->grf5.block_count_x = w / 16;   /* 1 x N */
+    pp_inline_parameter->grf5.number_blocks = w / 16;
+    pp_inline_parameter->grf5.block_vertical_mask = 0xff;
+    pp_inline_parameter->grf5.block_horizontal_mask = 0xffff;
 
     pp_dn_context->dest_w = w;
     pp_dn_context->dest_h = h;
@@ -1796,6 +2319,452 @@ pp_nv12_dn_initialize(VADriverContextP ctx, struct i965_post_processing_context
     return VA_STATUS_SUCCESS;
 }
 
+static int
+gen7_pp_dndi_x_steps(void *private_context)
+{
+    struct pp_dndi_context *pp_dndi_context = private_context;
+
+    return pp_dndi_context->dest_w / 16;
+}
+
+static int
+gen7_pp_dndi_y_steps(void *private_context)
+{
+    struct pp_dndi_context *pp_dndi_context = private_context;
+
+    return pp_dndi_context->dest_h / 4;
+}
+
+static int
+gen7_pp_dndi_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y)
+{
+    struct gen7_pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter;
+
+    pp_inline_parameter->grf7.destination_block_horizontal_origin = x * 16;
+    pp_inline_parameter->grf7.destination_block_vertical_origin = y * 4;
+
+    return 0;
+}
+
+static VAStatus
+gen7_pp_nv12_dndi_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context,
+                             const struct i965_surface *src_surface,
+                             const VARectangle *src_rect,
+                             struct i965_surface *dst_surface,
+                             const VARectangle *dst_rect,
+                             void *filter_param)
+{
+    struct i965_driver_data *i965 = i965_driver_data(ctx);
+    struct pp_dndi_context *pp_dndi_context = (struct pp_dndi_context *)&pp_context->private_context;
+    struct gen7_pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter;
+    struct object_surface *obj_surface;
+    struct gen7_sampler_dndi *sampler_dndi;
+    int index;
+    int w, h;
+    int orig_w, orig_h;
+    int dndi_top_first = 1;
+
+    if (src_surface->flags == I965_SURFACE_FLAG_FRAME)
+        return VA_STATUS_ERROR_FLAG_NOT_SUPPORTED;
+
+    if (src_surface->flags == I965_SURFACE_FLAG_TOP_FIELD_FIRST)
+        dndi_top_first = 1;
+    else
+        dndi_top_first = 0;
+
+    /* surface */
+    obj_surface = SURFACE(src_surface->id);
+    orig_w = obj_surface->orig_width;
+    orig_h = obj_surface->orig_height;
+    w = obj_surface->width;
+    h = obj_surface->height;
+
+    if (pp_context->stmm.bo == NULL) {
+        pp_context->stmm.bo = dri_bo_alloc(i965->intel.bufmgr,
+                                           "STMM surface",
+                                           w * h,
+                                           4096);
+        assert(pp_context->stmm.bo);
+    }
+
+    /* source UV surface index 1 */
+    gen7_pp_set_surface_state(ctx, pp_context,
+                              obj_surface->bo, w * h,
+                              orig_w / 4, orig_h / 2, w, I965_SURFACEFORMAT_R8G8_UNORM,
+                              1, 0);
+
+    /* source YUV surface index 3 */
+    gen7_pp_set_surface2_state(ctx, pp_context,
+                               obj_surface->bo, 0,
+                               orig_w, orig_w, w,
+                               0, h,
+                               SURFACE_FORMAT_PLANAR_420_8, 1,
+                               3);
+
+    /* source (temporal reference) YUV surface index 4 */
+    gen7_pp_set_surface2_state(ctx, pp_context,
+                               obj_surface->bo, 0,
+                               orig_w, orig_w, w,
+                               0, h,
+                               SURFACE_FORMAT_PLANAR_420_8, 1,
+                               4);
+
+    /* STMM / History Statistics input surface, index 5 */
+    gen7_pp_set_surface_state(ctx, pp_context,
+                              pp_context->stmm.bo, 0,
+                              orig_w, orig_h, w, I965_SURFACEFORMAT_R8_UNORM,
+                              5, 1);
+
+    /* destination surface */
+    obj_surface = SURFACE(dst_surface->id);
+    orig_w = obj_surface->orig_width;
+    orig_h = obj_surface->orig_height;
+    w = obj_surface->width;
+    h = obj_surface->height;
+
+    /* destination(Previous frame) Y surface index 27 */
+    gen7_pp_set_surface_state(ctx, pp_context,
+                              obj_surface->bo, 0,
+                              orig_w / 4, orig_h, w, I965_SURFACEFORMAT_R8_UNORM,
+                              27, 1);
+
+    /* destination(Previous frame) UV surface index 28 */
+    gen7_pp_set_surface_state(ctx, pp_context,
+                              obj_surface->bo, w * h,
+                              orig_w / 4, orig_h / 2, w, I965_SURFACEFORMAT_R8G8_UNORM,
+                              28, 1);
+
+    /* destination(Current frame) Y surface index 30 */
+    gen7_pp_set_surface_state(ctx, pp_context,
+                              obj_surface->bo, 0,
+                              orig_w / 4, orig_h, w, I965_SURFACEFORMAT_R8_UNORM,
+                              30, 1);
+
+    /* destination(Current frame) UV surface index 31 */
+    gen7_pp_set_surface_state(ctx, pp_context,
+                              obj_surface->bo, w * h,
+                              orig_w / 4, orig_h / 2, w, I965_SURFACEFORMAT_R8G8_UNORM,
+                              31, 1);
+
+    /* STMM output surface, index 33 */
+    gen7_pp_set_surface_state(ctx, pp_context,
+                              pp_context->stmm.bo, 0,
+                              orig_w, orig_h, w, I965_SURFACEFORMAT_R8_UNORM,
+                              33, 1);
+
+
+    /* sampler dndi */
+    dri_bo_map(pp_context->sampler_state_table.bo, True);
+    assert(pp_context->sampler_state_table.bo->virtual);
+    assert(sizeof(*sampler_dndi) == sizeof(int) * 8);
+    sampler_dndi = pp_context->sampler_state_table.bo->virtual;
+
+    /* sample dndi index 0 */
+    index = 0;
+    sampler_dndi[index].dw0.denoise_asd_threshold = 0;
+    sampler_dndi[index].dw0.dnmh_delt = 8;
+    sampler_dndi[index].dw0.vdi_walker_y_stride = 0;
+    sampler_dndi[index].dw0.vdi_walker_frame_sharing_enable = 0;
+    sampler_dndi[index].dw0.denoise_maximum_history = 128;      // 128-240
+    sampler_dndi[index].dw0.denoise_stad_threshold = 0;
+
+    sampler_dndi[index].dw1.denoise_threshold_for_sum_of_complexity_measure = 64;
+    sampler_dndi[index].dw1.denoise_moving_pixel_threshold = 0;
+    sampler_dndi[index].dw1.stmm_c2 = 0;
+    sampler_dndi[index].dw1.low_temporal_difference_threshold = 8;
+    sampler_dndi[index].dw1.temporal_difference_threshold = 16;
+
+    sampler_dndi[index].dw2.block_noise_estimate_noise_threshold = 15;   // 0-31
+    sampler_dndi[index].dw2.bne_edge_th = 1;
+    sampler_dndi[index].dw2.smooth_mv_th = 0;
+    sampler_dndi[index].dw2.sad_tight_th = 5;
+    sampler_dndi[index].dw2.cat_slope_minus1 = 9;
+    sampler_dndi[index].dw2.good_neighbor_th = 4;
+
+    sampler_dndi[index].dw3.maximum_stmm = 128;
+    sampler_dndi[index].dw3.multipler_for_vecm = 2;
+    sampler_dndi[index].dw3.blending_constant_across_time_for_small_values_of_stmm = 0;
+    sampler_dndi[index].dw3.blending_constant_across_time_for_large_values_of_stmm = 64;
+    sampler_dndi[index].dw3.stmm_blending_constant_select = 0;
+
+    sampler_dndi[index].dw4.sdi_delta = 8;
+    sampler_dndi[index].dw4.sdi_threshold = 128;
+    sampler_dndi[index].dw4.stmm_output_shift = 7;                      // stmm_max - stmm_min = 2 ^ stmm_output_shift
+    sampler_dndi[index].dw4.stmm_shift_up = 0;
+    sampler_dndi[index].dw4.stmm_shift_down = 0;
+    sampler_dndi[index].dw4.minimum_stmm = 0;
+
+    sampler_dndi[index].dw5.fmd_temporal_difference_threshold = 0;
+    sampler_dndi[index].dw5.sdi_fallback_mode_2_constant = 0;
+    sampler_dndi[index].dw5.sdi_fallback_mode_1_t2_constant = 0;
+    sampler_dndi[index].dw5.sdi_fallback_mode_1_t1_constant = 0;
+
+    sampler_dndi[index].dw6.dn_enable = 0;
+    sampler_dndi[index].dw6.di_enable = 1;
+    sampler_dndi[index].dw6.di_partial = 0;
+    sampler_dndi[index].dw6.dndi_top_first = dndi_top_first;
+    sampler_dndi[index].dw6.dndi_stream_id = 1;
+    sampler_dndi[index].dw6.dndi_first_frame = 1;
+    sampler_dndi[index].dw6.progressive_dn = 0;
+    sampler_dndi[index].dw6.mcdi_enable = 0;
+    sampler_dndi[index].dw6.fmd_tear_threshold = 32;
+    sampler_dndi[index].dw6.cat_th1 = 0;
+    sampler_dndi[index].dw6.fmd2_vertical_difference_threshold = 32;
+    sampler_dndi[index].dw6.fmd1_vertical_difference_threshold = 32;
+
+    sampler_dndi[index].dw7.sad_tha = 5;
+    sampler_dndi[index].dw7.sad_thb = 10;
+    sampler_dndi[index].dw7.fmd_for_1st_field_of_current_frame = 0;
+    sampler_dndi[index].dw7.mc_pixel_consistency_th = 25;
+    sampler_dndi[index].dw7.fmd_for_2nd_field_of_previous_frame = 0;
+    sampler_dndi[index].dw7.vdi_walker_enable = 0;
+    sampler_dndi[index].dw7.neighborpixel_th = 10;
+    sampler_dndi[index].dw7.column_width_minus1 = w / 16;
+
+    dri_bo_unmap(pp_context->sampler_state_table.bo);
+
+    /* private function & data */
+    pp_context->pp_x_steps = gen7_pp_dndi_x_steps;
+    pp_context->pp_y_steps = gen7_pp_dndi_y_steps;
+    pp_context->pp_set_block_parameter = gen7_pp_dndi_set_block_parameter;
+
+    pp_static_parameter->grf1.di_statistics_surface_pitch_div2 = w / 2;
+    pp_static_parameter->grf1.di_statistics_surface_height_div4 = h / 4;
+    pp_static_parameter->grf1.di_top_field_first = 0;
+    pp_static_parameter->grf1.pointer_to_inline_parameter = 7;
+
+    pp_static_parameter->grf2.di_destination_packed_y_component_offset = 0;
+    pp_static_parameter->grf2.di_destination_packed_u_component_offset = 1;
+    pp_static_parameter->grf2.di_destination_packed_v_component_offset = 3;
+
+    pp_static_parameter->grf4.di_hoffset_svf_from_dvf = 0;
+    pp_static_parameter->grf4.di_voffset_svf_from_dvf = 0;
+
+    pp_dndi_context->dest_w = w;
+    pp_dndi_context->dest_h = h;
+
+    dst_surface->flags = I965_SURFACE_FLAG_FRAME;
+
+    return VA_STATUS_SUCCESS;
+}
+
+static int
+gen7_pp_dn_x_steps(void *private_context)
+{
+    return 1;
+}
+
+static int
+gen7_pp_dn_y_steps(void *private_context)
+{
+    struct pp_dn_context *pp_dn_context = private_context;
+
+    return pp_dn_context->dest_h / 4;
+}
+
+static int
+gen7_pp_dn_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y)
+{
+    struct pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter;
+
+    pp_inline_parameter->grf5.destination_block_horizontal_origin = x * 16;
+    pp_inline_parameter->grf5.destination_block_vertical_origin = y * 4;
+
+    return 0;
+}
+
+static VAStatus
+gen7_pp_nv12_dn_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context,
+                           const struct i965_surface *src_surface,
+                           const VARectangle *src_rect,
+                           struct i965_surface *dst_surface,
+                           const VARectangle *dst_rect,
+                           void *filter_param)
+{
+    struct i965_driver_data *i965 = i965_driver_data(ctx);
+    struct pp_dn_context *pp_dn_context = (struct pp_dn_context *)&pp_context->private_context;
+    struct gen7_pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter;
+    struct object_surface *obj_surface;
+    struct gen7_sampler_dndi *sampler_dn;
+    VAProcFilterBaseParameterBuffer *dn_filter_param = filter_param;
+    int index;
+    int w, h;
+    int orig_w, orig_h;
+    int dn_strength = 15;
+    int dndi_top_first = 1;
+    int dn_progressive = 0;
+
+    if (src_surface->flags == I965_SURFACE_FLAG_FRAME) {
+        dndi_top_first = 1;
+        dn_progressive = 1;
+    } else if (src_surface->flags == I965_SURFACE_FLAG_TOP_FIELD_FIRST) {
+        dndi_top_first = 1;
+        dn_progressive = 0;
+    } else {
+        dndi_top_first = 0;
+        dn_progressive = 0;
+    }
+
+    if (dn_filter_param) {
+        int value = dn_filter_param->value;
+        
+        if (value > 1.0)
+            value = 1.0;
+        
+        if (value < 0.0)
+            value = 0.0;
+
+        dn_strength = (int)(value * 31.0F);
+    }
+
+    /* surface */
+    obj_surface = SURFACE(src_surface->id);
+    orig_w = obj_surface->orig_width;
+    orig_h = obj_surface->orig_height;
+    w = obj_surface->width;
+    h = obj_surface->height;
+
+    if (pp_context->stmm.bo == NULL) {
+        pp_context->stmm.bo = dri_bo_alloc(i965->intel.bufmgr,
+                                           "STMM surface",
+                                           w * h,
+                                           4096);
+        assert(pp_context->stmm.bo);
+    }
+
+    /* source UV surface index 1 */
+    gen7_pp_set_surface_state(ctx, pp_context,
+                              obj_surface->bo, w * h,
+                              orig_w / 4, orig_h / 2, w, I965_SURFACEFORMAT_R8G8_UNORM,
+                              1, 0);
+
+    /* source YUV surface index 3 */
+    gen7_pp_set_surface2_state(ctx, pp_context,
+                               obj_surface->bo, 0,
+                               orig_w, orig_w, w,
+                               0, h,
+                               SURFACE_FORMAT_PLANAR_420_8, 1,
+                               3);
+
+    /* source STMM surface index 5 */
+    gen7_pp_set_surface_state(ctx, pp_context,
+                              pp_context->stmm.bo, 0,
+                              orig_w, orig_h, w, I965_SURFACEFORMAT_R8_UNORM,
+                              5, 1);
+
+    /* destination surface */
+    obj_surface = SURFACE(dst_surface->id);
+    orig_w = obj_surface->orig_width;
+    orig_h = obj_surface->orig_height;
+    w = obj_surface->width;
+    h = obj_surface->height;
+
+    /* destination Y surface index 7 */
+    gen7_pp_set_surface_state(ctx, pp_context,
+                              obj_surface->bo, 0,
+                              orig_w / 4, orig_h, w, I965_SURFACEFORMAT_R8_UNORM,
+                              7, 1);
+
+    /* destination UV surface index 8 */
+    gen7_pp_set_surface_state(ctx, pp_context,
+                              obj_surface->bo, w * h,
+                              orig_w / 4, orig_h / 2, w, I965_SURFACEFORMAT_R8G8_UNORM,
+                              8, 1);
+    /* sampler dn */
+    dri_bo_map(pp_context->sampler_state_table.bo, True);
+    assert(pp_context->sampler_state_table.bo->virtual);
+    assert(sizeof(*sampler_dn) == sizeof(int) * 8);
+    sampler_dn = pp_context->sampler_state_table.bo->virtual;
+
+    /* sample dn index 1 */
+    index = 0;
+    sampler_dn[index].dw0.denoise_asd_threshold = 0;
+    sampler_dn[index].dw0.dnmh_delt = 8;
+    sampler_dn[index].dw0.vdi_walker_y_stride = 0;
+    sampler_dn[index].dw0.vdi_walker_frame_sharing_enable = 0;
+    sampler_dn[index].dw0.denoise_maximum_history = 128;      // 128-240
+    sampler_dn[index].dw0.denoise_stad_threshold = 0;
+
+    sampler_dn[index].dw1.denoise_threshold_for_sum_of_complexity_measure = 64;
+    sampler_dn[index].dw1.denoise_moving_pixel_threshold = 0;
+    sampler_dn[index].dw1.stmm_c2 = 0;
+    sampler_dn[index].dw1.low_temporal_difference_threshold = 8;
+    sampler_dn[index].dw1.temporal_difference_threshold = 16;
+
+    sampler_dn[index].dw2.block_noise_estimate_noise_threshold = dn_strength;   // 0-31
+    sampler_dn[index].dw2.bne_edge_th = 1;
+    sampler_dn[index].dw2.smooth_mv_th = 0;
+    sampler_dn[index].dw2.sad_tight_th = 5;
+    sampler_dn[index].dw2.cat_slope_minus1 = 9;
+    sampler_dn[index].dw2.good_neighbor_th = 4;
+
+    sampler_dn[index].dw3.maximum_stmm = 128;
+    sampler_dn[index].dw3.multipler_for_vecm = 2;
+    sampler_dn[index].dw3.blending_constant_across_time_for_small_values_of_stmm = 0;
+    sampler_dn[index].dw3.blending_constant_across_time_for_large_values_of_stmm = 64;
+    sampler_dn[index].dw3.stmm_blending_constant_select = 0;
+
+    sampler_dn[index].dw4.sdi_delta = 8;
+    sampler_dn[index].dw4.sdi_threshold = 128;
+    sampler_dn[index].dw4.stmm_output_shift = 7;                      // stmm_max - stmm_min = 2 ^ stmm_output_shift
+    sampler_dn[index].dw4.stmm_shift_up = 0;
+    sampler_dn[index].dw4.stmm_shift_down = 0;
+    sampler_dn[index].dw4.minimum_stmm = 0;
+
+    sampler_dn[index].dw5.fmd_temporal_difference_threshold = 0;
+    sampler_dn[index].dw5.sdi_fallback_mode_2_constant = 0;
+    sampler_dn[index].dw5.sdi_fallback_mode_1_t2_constant = 0;
+    sampler_dn[index].dw5.sdi_fallback_mode_1_t1_constant = 0;
+
+    sampler_dn[index].dw6.dn_enable = 1;
+    sampler_dn[index].dw6.di_enable = 0;
+    sampler_dn[index].dw6.di_partial = 0;
+    sampler_dn[index].dw6.dndi_top_first = dndi_top_first;
+    sampler_dn[index].dw6.dndi_stream_id = 1;
+    sampler_dn[index].dw6.dndi_first_frame = 1;
+    sampler_dn[index].dw6.progressive_dn = dn_progressive;
+    sampler_dn[index].dw6.mcdi_enable = 0;
+    sampler_dn[index].dw6.fmd_tear_threshold = 32;
+    sampler_dn[index].dw6.cat_th1 = 0;
+    sampler_dn[index].dw6.fmd2_vertical_difference_threshold = 32;
+    sampler_dn[index].dw6.fmd1_vertical_difference_threshold = 32;
+
+    sampler_dn[index].dw7.sad_tha = 5;
+    sampler_dn[index].dw7.sad_thb = 10;
+    sampler_dn[index].dw7.fmd_for_1st_field_of_current_frame = 2;
+    sampler_dn[index].dw7.mc_pixel_consistency_th = 25;
+    sampler_dn[index].dw7.fmd_for_2nd_field_of_previous_frame = 1;
+    sampler_dn[index].dw7.vdi_walker_enable = 0;
+    sampler_dn[index].dw7.neighborpixel_th = 10;
+    sampler_dn[index].dw7.column_width_minus1 = w / 16;
+
+    dri_bo_unmap(pp_context->sampler_state_table.bo);
+
+    /* private function & data */
+    pp_context->pp_x_steps = gen7_pp_dn_x_steps;
+    pp_context->pp_y_steps = gen7_pp_dn_y_steps;
+    pp_context->pp_set_block_parameter = gen7_pp_dn_set_block_parameter;
+
+    pp_static_parameter->grf1.di_statistics_surface_pitch_div2 = w / 2;
+    pp_static_parameter->grf1.di_statistics_surface_height_div4 = h / 4;
+    pp_static_parameter->grf1.di_top_field_first = 0;
+    pp_static_parameter->grf1.pointer_to_inline_parameter = 7;
+
+    pp_static_parameter->grf2.di_destination_packed_y_component_offset = 0;
+    pp_static_parameter->grf2.di_destination_packed_u_component_offset = 1;
+    pp_static_parameter->grf2.di_destination_packed_v_component_offset = 3;
+
+    pp_static_parameter->grf4.di_hoffset_svf_from_dvf = 0;
+    pp_static_parameter->grf4.di_voffset_svf_from_dvf = 0;
+
+    pp_dn_context->dest_w = w;
+    pp_dn_context->dest_h = h;
+
+    dst_surface->flags = src_surface->flags;
+
+    return VA_STATUS_SUCCESS;
+}
+
 static VAStatus
 ironlake_pp_initialize(
     VADriverContextP   ctx,
@@ -1812,6 +2781,7 @@ ironlake_pp_initialize(
     struct i965_driver_data *i965 = i965_driver_data(ctx);
     struct pp_module *pp_module;
     dri_bo *bo;
+    int static_param_size, inline_param_size;
 
     dri_bo_unreference(pp_context->surface_state_binding_table.bo);
     bo = dri_bo_alloc(i965->intel.bufmgr,
@@ -1872,9 +2842,17 @@ ironlake_pp_initialize(
                       4096);
     assert(bo);
     pp_context->vfe_state.bo = bo;
-    
-    memset(&pp_static_parameter, 0, sizeof(pp_static_parameter));
-    memset(&pp_inline_parameter, 0, sizeof(pp_inline_parameter));
+
+    if (IS_GEN7(i965->intel.device_id)) {
+        static_param_size = sizeof(struct gen7_pp_static_parameter);
+        inline_param_size = sizeof(struct gen7_pp_inline_parameter);
+    } else {
+        static_param_size = sizeof(struct pp_static_parameter);
+        inline_param_size = sizeof(struct pp_inline_parameter);
+    }
+
+    memset(pp_context->pp_static_parameter, 0, static_param_size);
+    memset(pp_context->pp_inline_parameter, 0, inline_param_size);
     assert(pp_index >= PP_NULL && pp_index < NUM_PP_MODULES);
     pp_context->current_pp = pp_index;
     pp_module = &pp_context->pp_modules[pp_index];
@@ -1938,6 +2916,8 @@ gen6_pp_initialize(
     struct i965_driver_data *i965 = i965_driver_data(ctx);
     struct pp_module *pp_module;
     dri_bo *bo;
+    struct pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter;
+    struct pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter;
 
     dri_bo_unreference(pp_context->surface_state_binding_table.bo);
     bo = dri_bo_alloc(i965->intel.bufmgr,
@@ -1999,8 +2979,8 @@ gen6_pp_initialize(
     assert(bo);
     pp_context->vfe_state.bo = bo;
     
-    memset(&pp_static_parameter, 0, sizeof(pp_static_parameter));
-    memset(&pp_inline_parameter, 0, sizeof(pp_inline_parameter));
+    memset(pp_static_parameter, 0, sizeof(*pp_static_parameter));
+    memset(pp_inline_parameter, 0, sizeof(*pp_inline_parameter));
     assert(pp_index >= PP_NULL && pp_index < NUM_PP_MODULES);
     pp_context->current_pp = pp_index;
     pp_module = &pp_context->pp_modules[pp_index];
@@ -2019,8 +2999,10 @@ gen6_pp_initialize(
 }
 
 static void
-gen6_pp_interface_descriptor_table(struct i965_post_processing_context *pp_context)
+gen6_pp_interface_descriptor_table(VADriverContextP   ctx,
+                                   struct i965_post_processing_context *pp_context)
 {
+    struct i965_driver_data *i965 = i965_driver_data(ctx);
     struct gen6_interface_descriptor_data *desc;
     dri_bo *bo;
     int pp_index = pp_context->current_pp;
@@ -2040,7 +3022,11 @@ gen6_pp_interface_descriptor_table(struct i965_post_processing_context *pp_conte
     desc->desc3.binding_table_entry_count = 0;
     desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET >> 5);
     desc->desc4.constant_urb_entry_read_offset = 0;
-    desc->desc4.constant_urb_entry_read_length = 4; /* grf 1-4 */
+
+    if (IS_GEN7(i965->intel.device_id))
+        desc->desc4.constant_urb_entry_read_length = 6; /* grf 1-6 */
+    else
+        desc->desc4.constant_urb_entry_read_length = 4; /* grf 1-4 */
 
     dri_bo_emit_reloc(bo,
                       I915_GEM_DOMAIN_INSTRUCTION, 0,
@@ -2059,15 +3045,25 @@ gen6_pp_interface_descriptor_table(struct i965_post_processing_context *pp_conte
 }
 
 static void
-gen6_pp_upload_constants(struct i965_post_processing_context *pp_context)
+gen6_pp_upload_constants(VADriverContextP ctx,
+                         struct i965_post_processing_context *pp_context)
 {
+    struct i965_driver_data *i965 = i965_driver_data(ctx);
     unsigned char *constant_buffer;
+    int param_size;
+
+    assert(sizeof(struct pp_static_parameter) == 128);
+    assert(sizeof(struct gen7_pp_static_parameter) == 192);
+
+    if (IS_GEN7(i965->intel.device_id))
+        param_size = sizeof(struct gen7_pp_static_parameter);
+    else
+        param_size = sizeof(struct pp_static_parameter);
 
-    assert(sizeof(pp_static_parameter) == 128);
     dri_bo_map(pp_context->curbe.bo, 1);
     assert(pp_context->curbe.bo->virtual);
     constant_buffer = pp_context->curbe.bo->virtual;
-    memcpy(constant_buffer, &pp_static_parameter, sizeof(pp_static_parameter));
+    memcpy(constant_buffer, pp_context->pp_static_parameter, param_size);
     dri_bo_unmap(pp_context->curbe.bo);
 }
 
@@ -2075,8 +3071,8 @@ static void
 gen6_pp_states_setup(VADriverContextP ctx,
                      struct i965_post_processing_context *pp_context)
 {
-    gen6_pp_interface_descriptor_table(pp_context);
-    gen6_pp_upload_constants(pp_context);
+    gen6_pp_interface_descriptor_table(ctx, pp_context);
+    gen6_pp_upload_constants(ctx, pp_context);
 }
 
 static void
@@ -2124,8 +3120,8 @@ gen6_pp_vfe_state(VADriverContextP ctx,
               pp_context->urb.num_vfe_entries << 8);
     OUT_BATCH(batch, 0);
     OUT_BATCH(batch,
-              (pp_context->urb.size_vfe_entry * 2) << 16 |  /* in 256 bits unit */
-              (pp_context->urb.size_cs_entry * pp_context->urb.num_cs_entries * 2 - 1));            /* in 256 bits unit */
+              (pp_context->urb.size_vfe_entry * 2) << 16 |  /* URB Entry Allocation Size, in 256 bits unit */
+              (pp_context->urb.size_cs_entry * pp_context->urb.num_cs_entries * 2)); /* CURBE Allocation Size, in 256 bits unit */
     OUT_BATCH(batch, 0);
     OUT_BATCH(batch, 0);
     OUT_BATCH(batch, 0);
@@ -2138,13 +3134,13 @@ gen6_pp_curbe_load(VADriverContextP ctx,
 {
     struct intel_batchbuffer *batch = pp_context->batch;
 
-    assert(pp_context->urb.size_cs_entry * pp_context->urb.num_cs_entries * 512 <= pp_context->curbe.bo->size);
+    assert(pp_context->urb.size_cs_entry * pp_context->urb.num_cs_entries * 2 * 32 <= pp_context->curbe.bo->size);
 
     BEGIN_BATCH(batch, 4);
     OUT_BATCH(batch, CMD_MEDIA_CURBE_LOAD | (4 - 2));
     OUT_BATCH(batch, 0);
     OUT_BATCH(batch,
-              pp_context->urb.size_cs_entry * pp_context->urb.num_cs_entries * 512);
+              pp_context->urb.size_cs_entry * pp_context->urb.num_cs_entries * 2 * 32);
     OUT_RELOC(batch, 
               pp_context->curbe.bo,
               I915_GEM_DOMAIN_INSTRUCTION, 0,
@@ -2174,31 +3170,66 @@ static void
 gen6_pp_object_walker(VADriverContextP ctx,
                       struct i965_post_processing_context *pp_context)
 {
+    struct i965_driver_data *i965 = i965_driver_data(ctx);
     struct intel_batchbuffer *batch = pp_context->batch;
     int x, x_steps, y, y_steps;
+    int param_size, command_length_in_dws;
+    dri_bo *command_buffer;
+    unsigned int *command_ptr;
+
+    if (IS_GEN7(i965->intel.device_id))
+        param_size = sizeof(struct gen7_pp_inline_parameter);
+    else
+        param_size = sizeof(struct pp_inline_parameter);
 
     x_steps = pp_context->pp_x_steps(&pp_context->private_context);
     y_steps = pp_context->pp_y_steps(&pp_context->private_context);
+    command_length_in_dws = 6 + (param_size >> 2);
+    command_buffer = dri_bo_alloc(i965->intel.bufmgr,
+                                  "command objects buffer",
+                                  command_length_in_dws * 4 * x_steps * y_steps + 8,
+                                  4096);
+
+    dri_bo_map(command_buffer, 1);
+    command_ptr = command_buffer->virtual;
 
     for (y = 0; y < y_steps; y++) {
         for (x = 0; x < x_steps; x++) {
             if (!pp_context->pp_set_block_parameter(pp_context, x, y)) {
-                BEGIN_BATCH(batch, 22);
-                OUT_BATCH(batch, CMD_MEDIA_OBJECT | 20);
-                OUT_BATCH(batch, 0);
-                OUT_BATCH(batch, 0); /* no indirect data */
-                OUT_BATCH(batch, 0);
-                OUT_BATCH(batch, 0); /* scoreboard */
-                OUT_BATCH(batch, 0);
-
-                /* inline data grf 5-6 */
-                assert(sizeof(pp_inline_parameter) == 64);
-                intel_batchbuffer_data(batch, &pp_inline_parameter, sizeof(pp_inline_parameter));
-
-                ADVANCE_BATCH(batch);
+                *command_ptr++ = (CMD_MEDIA_OBJECT | (command_length_in_dws - 2));
+                *command_ptr++ = 0;
+                *command_ptr++ = 0;
+                *command_ptr++ = 0;
+                *command_ptr++ = 0;
+                *command_ptr++ = 0;
+                memcpy(command_ptr, pp_context->pp_inline_parameter, param_size);
+                command_ptr += (param_size >> 2);
             }
         }
     }
+
+    if (command_length_in_dws * x_steps * y_steps % 2 == 0)
+        *command_ptr++ = 0;
+
+    *command_ptr = MI_BATCH_BUFFER_END;
+
+    dri_bo_unmap(command_buffer);
+
+    BEGIN_BATCH(batch, 2);
+    OUT_BATCH(batch, MI_BATCH_BUFFER_START | (2 << 6));
+    OUT_RELOC(batch, command_buffer, 
+              I915_GEM_DOMAIN_COMMAND, 0, 
+              0);
+    ADVANCE_BATCH(batch);
+    
+    dri_bo_unreference(command_buffer);
+
+    /* Have to execute the batch buffer here becuase MI_BATCH_BUFFER_END
+     * will cause control to pass back to ring buffer 
+     */
+    intel_batchbuffer_end_atomic(batch);
+    intel_batchbuffer_flush(batch);
+    intel_batchbuffer_start_atomic(batch, 0x1000);
 }
 
 static void
@@ -2211,9 +3242,9 @@ gen6_pp_pipeline_setup(VADriverContextP ctx,
     intel_batchbuffer_emit_mi_flush(batch);
     gen6_pp_pipeline_select(ctx, pp_context);
     gen6_pp_state_base_address(ctx, pp_context);
+    gen6_pp_vfe_state(ctx, pp_context);
     gen6_pp_curbe_load(ctx, pp_context);
     gen6_interface_descriptor_load(ctx, pp_context);
-    gen6_pp_vfe_state(ctx, pp_context);
     gen6_pp_object_walker(ctx, pp_context);
     intel_batchbuffer_end_atomic(batch);
 }
@@ -2526,6 +3557,10 @@ i965_post_processing_context_finalize(struct i965_post_processing_context *pp_co
         pp_module->kernel.bo = NULL;
     }
 
+    free(pp_context->pp_static_parameter);
+    free(pp_context->pp_inline_parameter);
+    pp_context->pp_static_parameter = NULL;
+    pp_context->pp_inline_parameter = NULL;
 }
 
 Bool
@@ -2556,7 +3591,12 @@ i965_post_processing_context_init(VADriverContextP ctx,
     pp_context->urb.num_vfe_entries = 32;
     pp_context->urb.size_vfe_entry = 1;     /* in 512 bits unit */
     pp_context->urb.num_cs_entries = 1;
-    pp_context->urb.size_cs_entry = 2;      /* in 512 bits unit */
+    
+    if (IS_GEN7(i965->intel.device_id))
+        pp_context->urb.size_cs_entry = 4;      /* in 512 bits unit */
+    else
+        pp_context->urb.size_cs_entry = 2;
+
     pp_context->urb.vfe_start = 0;
     pp_context->urb.cs_start = pp_context->urb.vfe_start + 
         pp_context->urb.num_vfe_entries * pp_context->urb.size_vfe_entry;
@@ -2565,9 +3605,11 @@ i965_post_processing_context_init(VADriverContextP ctx,
 
     assert(NUM_PP_MODULES == ARRAY_ELEMS(pp_modules_gen5));
     assert(NUM_PP_MODULES == ARRAY_ELEMS(pp_modules_gen6));
+    assert(NUM_PP_MODULES == ARRAY_ELEMS(pp_modules_gen7));
 
-    if (IS_GEN6(i965->intel.device_id) ||
-        IS_GEN7(i965->intel.device_id))
+    if (IS_GEN7(i965->intel.device_id))
+        memcpy(pp_context->pp_modules, pp_modules_gen7, sizeof(pp_context->pp_modules));
+    else if (IS_GEN6(i965->intel.device_id))
         memcpy(pp_context->pp_modules, pp_modules_gen6, sizeof(pp_context->pp_modules));
     else if (IS_IRONLAKE(i965->intel.device_id))
         memcpy(pp_context->pp_modules, pp_modules_gen5, sizeof(pp_context->pp_modules));
@@ -2575,7 +3617,7 @@ i965_post_processing_context_init(VADriverContextP ctx,
     for (i = 0; i < NUM_PP_MODULES; i++) {
         struct pp_module *pp_module = &pp_context->pp_modules[i];
         dri_bo_unreference(pp_module->kernel.bo);
-        if (pp_module->kernel.bin) {
+        if (pp_module->kernel.bin && pp_module->kernel.size) {
             pp_module->kernel.bo = dri_bo_alloc(i965->intel.bufmgr,
                                                 pp_module->kernel.name,
                                                 pp_module->kernel.size,
@@ -2587,6 +3629,15 @@ i965_post_processing_context_init(VADriverContextP ctx,
         }
     }
 
+    /* static & inline parameters */
+    if (IS_GEN7(i965->intel.device_id)) {
+        pp_context->pp_static_parameter = calloc(sizeof(struct gen7_pp_static_parameter), 1);
+        pp_context->pp_inline_parameter = calloc(sizeof(struct gen7_pp_inline_parameter), 1);
+    } else {
+        pp_context->pp_static_parameter = calloc(sizeof(struct pp_static_parameter), 1);
+        pp_context->pp_inline_parameter = calloc(sizeof(struct pp_inline_parameter), 1);
+    }
+
     pp_context->batch = batch;
 }
 
index 0b8004e..ad827e5 100644 (file)
@@ -29,7 +29,7 @@
 #ifndef __I965_POST_PROCESSING_H__
 #define __I965_POST_PROCESSING_H__
 
-#define MAX_PP_SURFACES 32
+#define MAX_PP_SURFACES 48
 
 #define I965_PP_FLAG_DEINTERLACING_TOP_FISRT    1
 #define I965_PP_FLAG_DEINTERLACING_BOTTOM_FIRST 2
@@ -311,12 +311,87 @@ struct pp_inline_parameter
     } grf6;
 };
 
+struct gen7_pp_static_parameter
+{
+    struct {
+        /* r1.0-r1.5 */
+        unsigned int padx[6];
+        /* r1.6 */
+        unsigned int di_statistics_surface_pitch_div2:16;
+        unsigned int di_statistics_surface_height_div4:16;
+        /* r1.7 */
+        unsigned int di_top_field_first:8;
+        unsigned int pad0:16;
+        unsigned int pointer_to_inline_parameter:8; /* value: 7 */
+    } grf1;
+
+    struct {
+        /* r2.0-r2.6 */
+        unsigned int padx[7];
+        /* r2.7 */
+        unsigned int di_destination_packed_y_component_offset:8;
+        unsigned int di_destination_packed_u_component_offset:8;
+        unsigned int di_destination_packed_v_component_offset:8;
+        unsigned int pad0:8;
+    } grf2;
+
+    struct {
+        float sampler_load_horizontal_scaling_step_ratio;
+        unsigned int padx[7];
+    } grf3;
+
+    struct {
+        float sampler_load_vertical_scaling_step;
+        unsigned int pad0;
+        unsigned int di_hoffset_svf_from_dvf:16;
+        unsigned int di_voffset_svf_from_dvf:16;
+        unsigned int padx[5];
+    } grf4;
+
+    struct {
+        unsigned int sampler_load_vertical_frame_origin;
+        unsigned int padx[7];
+    } grf5;
+
+    struct {
+        unsigned int sampler_load_horizontal_frame_origin;
+        unsigned int padx[7];
+    } grf6;
+};
+
+struct gen7_pp_inline_parameter
+{
+    struct {
+        /* r7.0 */
+        unsigned int destination_block_horizontal_origin:16;
+        unsigned int destination_block_vertical_origin:16;
+        /* r7.1: 0xffffffff */
+        unsigned int constant_0;
+        /* r7.2 */
+        unsigned int pad0;
+        /* r7.3 */
+        unsigned int pad1;
+        /* r7.4 */
+        float sampler_load_main_video_x_scaling_step;
+        /* r7.5 */
+        unsigned int pad2;
+        /* r7.6: must be zero */
+        unsigned int avs_vertical_block_number;
+        /* r7.7: 0 */
+        unsigned int group_id_number;
+    } grf7;
+
+    struct {
+        unsigned int padx[8];
+    } grf8;
+};
+
 struct i965_post_processing_context
 {
     int current_pp;
     struct pp_module pp_modules[NUM_PP_MODULES];
-    struct pp_static_parameter pp_static_parameter;
-    struct pp_inline_parameter pp_inline_parameter;
+    void *pp_static_parameter;
+    void *pp_inline_parameter;
 
     struct {
         dri_bo *bo;
index 12a8d14..b730679 100644 (file)
@@ -799,7 +799,8 @@ struct i965_sampler_8x8_coefficient
     } dw3;
 
     struct {
-        int pad0:16;
+        int table_1x_filter_c0:8;
+        int table_1x_filter_c1:8;
         int table_1x_filter_c2:8;
         int table_1x_filter_c3:8;
     } dw4;
@@ -807,11 +808,13 @@ struct i965_sampler_8x8_coefficient
     struct {
         int table_1x_filter_c4:8;
         int table_1x_filter_c5:8;
-        int pad0:16;
+        int table_1x_filter_c6:8;
+        int table_1x_filter_c7:8;
     } dw5;
 
     struct {
-        int pad0:16;
+        int table_1y_filter_c0:8;
+        int table_1y_filter_c1:8;
         int table_1y_filter_c2:8;
         int table_1y_filter_c3:8;
     } dw6;
@@ -819,7 +822,8 @@ struct i965_sampler_8x8_coefficient
     struct {
         int table_1y_filter_c4:8;
         int table_1y_filter_c5:8;
-        int pad0:16;
+        int table_1y_filter_c6:8;
+        int table_1y_filter_c7:8;
     } dw7;
 };
 
@@ -1304,4 +1308,133 @@ struct gen7_surface_state2
     } ss7;
 };
 
+struct gen7_sampler_8x8
+{
+    struct {
+        unsigned int global_noise_estimation:8;
+        unsigned int pad0:8;
+        unsigned int chroma_key_index:2;
+        unsigned int chroma_key_enable:1;
+        unsigned int pad1:10;
+        unsigned int ief_bypass:1;
+        unsigned int pad2:1;
+        unsigned int disable_8x8_filter:1;
+    } dw0;
+
+    struct {
+        unsigned int pad0:5;
+        unsigned int sampler_8x8_state_pointer:27;
+    } dw1;
+    
+    struct {
+        unsigned int weak_edge_threshold:6;
+        unsigned int pad0:2;
+        unsigned int strong_edge_threshold:6;
+        unsigned int pad1:2;
+        unsigned int r5x_coefficient:5;
+        unsigned int r5cx_coefficient:5;
+        unsigned int r5c_coefficient:5;
+        unsigned int pad2:1;
+    } dw2;
+
+    struct {
+        unsigned int r3x_coefficient:5;
+        unsigned int pad0:1;
+        unsigned int r3c_coefficient:5;
+        unsigned int pad1:3;
+        unsigned int gain_factor:6;
+        unsigned int non_edge_weight:3;
+        unsigned int pad2:1;
+        unsigned int regular_weight:3;
+        unsigned int pad3:1;
+        unsigned int strong_edge_weight:3;
+        unsigned int ief4_smooth_enable:1;
+    } dw3;
+};
+
+struct gen7_sampler_dndi
+{
+    struct {
+        unsigned int denoise_asd_threshold:8;
+        unsigned int dnmh_delt:4;
+        unsigned int vdi_walker_y_stride:2;
+        unsigned int vdi_walker_frame_sharing_enable:1;
+        unsigned int pad0:1;
+        unsigned int denoise_maximum_history:8;
+        unsigned int denoise_stad_threshold:8;
+    } dw0;
+
+    struct {
+        unsigned int denoise_threshold_for_sum_of_complexity_measure:8;
+        unsigned int denoise_moving_pixel_threshold:5;
+        unsigned int stmm_c2:3;
+        unsigned int low_temporal_difference_threshold:6;
+        unsigned int pad0:2;
+        unsigned int temporal_difference_threshold:6;
+        unsigned int pad1:2;
+    } dw1;
+
+    struct {
+        unsigned int block_noise_estimate_noise_threshold:8;
+        unsigned int bne_edge_th:4;
+        unsigned int pad0:2;
+        unsigned int smooth_mv_th:2;
+        unsigned int sad_tight_th:4;
+        unsigned int cat_slope_minus1:4;
+        unsigned int good_neighbor_th:6;
+        unsigned int pad1:2;
+   } dw2;
+
+    struct {
+        unsigned int maximum_stmm:8;
+        unsigned int multipler_for_vecm:6;
+        unsigned int pad0:2;
+        unsigned int blending_constant_across_time_for_small_values_of_stmm:8;
+        unsigned int blending_constant_across_time_for_large_values_of_stmm:7;
+        unsigned int stmm_blending_constant_select:1;
+    } dw3;
+
+    struct {
+        unsigned int sdi_delta:8;
+        unsigned int sdi_threshold:8;
+        unsigned int stmm_output_shift:4;
+        unsigned int stmm_shift_up:2;
+        unsigned int stmm_shift_down:2;
+        unsigned int minimum_stmm:8;
+    } dw4;
+
+    struct {
+        unsigned int fmd_temporal_difference_threshold:8;
+        unsigned int sdi_fallback_mode_2_constant:8;
+        unsigned int sdi_fallback_mode_1_t2_constant:8;
+        unsigned int sdi_fallback_mode_1_t1_constant:8;
+    } dw5;
+
+    struct {
+        unsigned int dn_enable:1;
+        unsigned int di_enable:1;
+        unsigned int di_partial:1;
+        unsigned int dndi_top_first:1;
+        unsigned int dndi_stream_id:1;
+        unsigned int dndi_first_frame:1;
+        unsigned int progressive_dn:1;
+        unsigned int mcdi_enable:1;
+        unsigned int fmd_tear_threshold:6;
+        unsigned int cat_th1:2;
+        unsigned int fmd2_vertical_difference_threshold:8;
+        unsigned int fmd1_vertical_difference_threshold:8;
+    } dw6;
+
+    struct {
+        unsigned int sad_tha:4;
+        unsigned int sad_thb:4;
+        unsigned int fmd_for_1st_field_of_current_frame:2;
+        unsigned int mc_pixel_consistency_th:6;
+        unsigned int fmd_for_2nd_field_of_previous_frame:2;
+        unsigned int vdi_walker_enable:1;
+        unsigned int neighborpixel_th:4;
+        unsigned int column_width_minus1:9;
+    } dw7;
+};
+
 #endif /* _I965_STRUCTS_H_ */
index aeb5e59..216607d 100644 (file)
@@ -45,7 +45,7 @@ all-local: $(TARGETS)
 
 SUFFIXES = .g7b .g7s .asm
 
-$(INTEL_PP_GEN7_ASM): $(INTEL_PP_ASM)
+$(INTEL_PP_GEN7_ASM): $(INTEL_PP_ASM) $(INTEL_PP_G4A)
 .asm.g7s:
        cpp $< > _pp0.$@;               \
        ../../gpp.py _pp0.$@ $@;        \