drm/radeon: stop poisoning the GART TLB
authorChristian König <christian.koenig@amd.com>
Wed, 4 Jun 2014 13:29:56 +0000 (15:29 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 17 Jul 2014 23:21:06 +0000 (16:21 -0700)
commit 0986c1a55ca64b44ee126a2f719a6e9f28cbe0ed upstream.

When we set the valid bit on invalid GART entries they are
loaded into the TLB when an adjacent entry is loaded. This
poisons the TLB with invalid entries which are sometimes
not correctly removed on TLB flush.

For stable inclusion the patch probably needs to be modified a bit.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpu/drm/radeon/rs600.c

index 72d3616de08e054efe6199fcd529f59cef3e18d5..95b693c1164001b7ebd236a2db85dc94fa6ea1c5 100644 (file)
@@ -646,8 +646,10 @@ int rs600_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr)
                return -EINVAL;
        }
        addr = addr & 0xFFFFFFFFFFFFF000ULL;
-       addr |= R600_PTE_VALID | R600_PTE_SYSTEM | R600_PTE_SNOOPED;
-       addr |= R600_PTE_READABLE | R600_PTE_WRITEABLE;
+       if (addr != rdev->dummy_page.addr)
+               addr |= R600_PTE_VALID | R600_PTE_READABLE |
+                       R600_PTE_WRITEABLE;
+       addr |= R600_PTE_SYSTEM | R600_PTE_SNOOPED;
        writeq(addr, ptr + (i * 8));
        return 0;
 }