F: sound/soc/codecs/amlogic/*
F: drivers/amlogic/audiodsp/*
+
AMLOGIC PPMGR DRIVER
M: Guosong Zhou <guosong.zhou@amlogic.com>
F: arch/arm64/boot/dts/amlogic/gxl_p212_1g.dts
audiobus: audiobus@0xFF660000 {
compatible = "amlogic, audio-controller", "simple-bus";
- reg = <0xFF660000 0x4000>;
+ reg = <0xFF660000 0x3000>;
#address-cells = <1>;
#size-cells = <1>;
- ranges = <0x0 0xFF660000 0x4000>;
+ ranges = <0x0 0xFF660000 0x3000>;
clkaudio: audio_clocks {
compatible = "amlogic, sm1-audio-clocks";
#clock-cells = <1>;
};
};/* end of audiobus*/
+ /* eARC */
+ audio_earc: bus@ff663000 {
+ compatible = "simple-bus";
+ reg = <0xff663000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xff663000 0x1000>;
+
+ earc: earc@0 {
+ compatible = "amlogic, sm1-snd-earc";
+ #sound-dai-cells = <0>;
+
+ status = "disabled";
+
+ reg =
+ <0x800 0x400>,
+ <0xc00 0x200>,
+ <0xe00 0x200>;
+ reg-names =
+ "rx_cmdc",
+ "rx_dmac",
+ "rx_top";
+
+ clocks = < &clkaudio CLKID_EARCRX_CMDC
+ &clkaudio CLKID_EARCRX_DMAC
+ &clkc CLKID_FCLK_DIV4
+ &clkc CLKID_FCLK_DIV4
+ &clkaudio CLKID_EARCTX_CMDC
+ &clkaudio CLKID_EARCTX_DMAC
+ &clkc CLKID_FCLK_DIV4
+ &clkc CLKID_MPLL1
+ >;
+ clock-names =
+ "rx_cmdc",
+ "rx_dmac",
+ "rx_cmdc_srcpll",
+ "rx_dmac_srcpll";
+
+ interrupts = <
+ GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "earc_rx";
+ };
+ };
+
+ /* Sound iomap */
+ aml_snd_iomap {
+ compatible = "amlogic, snd-iomap";
+ status = "okay";
+ #address-cells=<1>;
+ #size-cells=<1>;
+ ranges;
+ pdm_bus {
+ reg = <0xFF661000 0x400>;
+ };
+ audiobus_base {
+ reg = <0xFF660000 0x1000>;
+ };
+ audiolocker_base {
+ reg = <0xFF661400 0x400>;
+ };
+ eqdrc_base {
+ reg = <0xFF662000 0x1000>;
+ };
+ reset_base {
+ reg = <0xFFD01000 0x1000>;
+ };
+ vad_base {
+ reg = <0xFF661800 0x400>;
+ };
+ };
}; /* end of soc*/
remote:rc@0xff808040 {
/*partions defined in dts */
};
- /* Sound iomap */
- aml_snd_iomap {
- compatible = "amlogic, snd-iomap";
- status = "okay";
- #address-cells=<1>;
- #size-cells=<1>;
- ranges;
- pdm_bus {
- reg = <0xFF661000 0x400>;
- };
- audiobus_base {
- reg = <0xFF660000 0x1000>;
- };
- audiolocker_base {
- reg = <0xFF661400 0x400>;
- };
- eqdrc_base {
- reg = <0xFF662000 0x1000>;
- };
- reset_base {
- reg = <0xFFD01000 0x1000>;
- };
- vad_base {
- reg = <0xFF661800 0x400>;
- };
- earcrx_cdmc_base {
- reg = <0xFF663800 0x30>;
- };
- earcrx_dmac_base {
- reg = <0xFF663C00 0x20>;
- };
- earcrx_top_base {
- reg = <0xFF663E00 0x10>;
- };
- };
-
vddcpu0: pwmao_d-regulator {
compatible = "pwm-regulator";
pwms = <&pwm_AO_cd MESON_PWM_1 1500 0>;
compatible = "amlogic, audio-controller", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
- reg = <0xff600000 0x10000>;
- ranges = <0x0 0xff600000 0x10000>;
+ reg = <0xff600000 0x3000>;
+ ranges = <0x0 0xff600000 0x3000>;
clkaudio:audio_clocks {
compatible = "amlogic, tm2-audio-clocks";
};
};/* end of audiobus*/
+ audio_earc: bus@ff603000 {
+ compatible = "simple-bus";
+ reg = <0xff603000 0xD000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xff603000 0xD000>;
+
+ earc: earc@0 {
+ compatible = "amlogic, tm2-snd-earc";
+ #sound-dai-cells = <0>;
+
+ status = "disabled";
+
+ reg = <0x0 0x400>,
+ <0x400 0x200>,
+ <0x600 0x200>,
+ <0x800 0x400>,
+ <0xc00 0x200>,
+ <0xe00 0x200>;
+ reg-names = "tx_cmdc",
+ "tx_dmac",
+ "tx_top",
+ "rx_cmdc",
+ "rx_dmac",
+ "rx_top";
+
+ clocks = < &clkaudio CLKID_EARCRX_CMDC
+ &clkaudio CLKID_EARCRX_DMAC
+ &clkc CLKID_FCLK_DIV4
+ &clkc CLKID_FCLK_DIV4
+ &clkaudio CLKID_EARCTX_CMDC
+ &clkaudio CLKID_EARCTX_DMAC
+ &clkc CLKID_FCLK_DIV4
+ &clkc CLKID_MPLL1
+ >;
+ clock-names =
+ "rx_cmdc",
+ "rx_dmac",
+ "rx_cmdc_srcpll",
+ "rx_dmac_srcpll",
+ "tx_cmdc",
+ "tx_dmac",
+ "tx_cmdc_srcpll",
+ "tx_dmac_srcpll";
+
+ interrupts = <
+ GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "earc_rx", "earc_tx";
+ };
+ };
+
/* Sound iomap */
aml_snd_iomap {
compatible = "amlogic, snd-iomap";
vad_base {
reg = <0xFF601800 0x400>;
};
- earcrx_cdmc_base {
- reg = <0xFF603800 0x30>;
- };
- earcrx_dmac_base {
- reg = <0xFF603C00 0x20>;
- };
- earcrx_top_base {
- reg = <0xFF603E00 0x10>;
- };
};
cbus: cbus@ffd00000 {
status = "okay";
};
- earc:earc {
- compatible = "amlogic, sm1-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = <&clkaudio CLKID_AUDIO_GATE_EARCRX
- &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV4
- &clkc CLKID_FCLK_DIV4
- >;
- clock-names = "rx_gate",
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH
- >;
- interrupt-names = "earc_rx";
-
- status = "okay";
- };
-
asrca: resample@0 {
compatible = "amlogic, sm1-resample";
clocks = <&clkc CLKID_MPLL3
status = "disabled";
};
-
aed:effect {
compatible = "amlogic, snd-effect-v3";
#sound-dai-cells = <0>;
-
clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
&clkc CLKID_FCLK_DIV5
&clkaudio CLKID_AUDIO_EQDRC>;
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
tdmout_a: tdmout_a {
mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */
status = "okay";
};
- earc:earc {
- compatible = "amlogic, sm1-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = <&clkaudio CLKID_AUDIO_GATE_EARCRX
- &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV4
- &clkc CLKID_FCLK_DIV4
- >;
- clock-names = "rx_gate",
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH
- >;
- interrupt-names = "earc_rx";
-
- status = "okay";
- };
-
asrca: resample@0 {
compatible = "amlogic, sm1-resample";
clocks = <&clkc CLKID_MPLL3
&clkc CLKID_FCLK_DIV5
&clkaudio CLKID_AUDIO_EQDRC>;
clock-names = "gate", "srcpll", "eqdrc";
+
/*
* 0:tdmout_a
* 1:tdmout_b
lane_mask = <0x1>;
/* max 0xff, each bit for one channel */
channel_mask = <0x3>;
+
status = "okay";
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
tdmout_a: tdmout_a {
mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */
status = "okay";
};
- earc:earc {
- compatible = "amlogic, sm1-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = <&clkaudio CLKID_AUDIO_GATE_EARCRX
- &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV4
- &clkc CLKID_FCLK_DIV4
- >;
- clock-names = "rx_gate",
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH
- >;
- interrupt-names = "earc_rx";
-
- status = "okay";
- };
-
asrca: resample@0 {
compatible = "amlogic, sm1-resample";
clocks = <&clkc CLKID_MPLL3
lane_mask = <0x1>;
/* max 0xff, each bit for one channel */
channel_mask = <0x3>;
+
status = "okay";
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
tdmout_a: tdmout_a {
mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */
status = "okay";
};
- earc:earc {
- compatible = "amlogic, sm1-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = <&clkaudio CLKID_AUDIO_GATE_EARCRX
- &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV4
- &clkc CLKID_FCLK_DIV4
- >;
- clock-names = "rx_gate",
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH
- >;
- interrupt-names = "earc_rx";
-
- status = "okay";
- };
-
asrca: resample@0 {
compatible = "amlogic, sm1-resample";
clocks = <&clkc CLKID_MPLL3
status = "disabled";
};
+
aed:effect {
compatible = "amlogic, snd-effect-v3";
#sound-dai-cells = <0>;
+
clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
&clkc CLKID_FCLK_DIV5
&clkaudio CLKID_AUDIO_EQDRC>;
clock-names = "gate", "srcpll", "eqdrc";
+
/*
* 0:tdmout_a
* 1:tdmout_b
lane_mask = <0x1>;
/* max 0xff, each bit for one channel */
channel_mask = <0x3>;
+
status = "disabled";
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
tdmout_a: tdmout_a {
mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */
status = "okay";
};
- earc:earc {
- compatible = "amlogic, sm1-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = <&clkaudio CLKID_AUDIO_GATE_EARCRX
- &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV4
- &clkc CLKID_FCLK_DIV4
- >;
- clock-names = "rx_gate",
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH
- >;
- interrupt-names = "earc_rx";
-
- status = "okay";
- };
-
asrca: resample@0 {
compatible = "amlogic, sm1-resample";
clocks = <&clkc CLKID_MPLL3
status = "disabled";
};
+
aed:effect {
compatible = "amlogic, snd-effect-v3";
#sound-dai-cells = <0>;
+
clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
&clkc CLKID_FCLK_DIV5
&clkaudio CLKID_AUDIO_EQDRC>;
clock-names = "gate", "srcpll", "eqdrc";
+
/*
* 0:tdmout_a
* 1:tdmout_b
lane_mask = <0x1>;
/* max 0xff, each bit for one channel */
channel_mask = <0x3>;
+
status = "disabled";
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
tdmout_a: tdmout_a {
mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */
status = "okay";
};
- earc:earc {
- compatible = "amlogic, sm1-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = <&clkaudio CLKID_AUDIO_GATE_EARCRX
- &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV4
- &clkc CLKID_FCLK_DIV4
- >;
- clock-names = "rx_gate",
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH
- >;
- interrupt-names = "earc_rx";
-
- status = "okay";
- };
-
asrca: resample@0 {
compatible = "amlogic, sm1-resample";
clocks = <&clkc CLKID_MPLL3
status = "disabled";
};
+
aed:effect {
compatible = "amlogic, snd-effect-v3";
#sound-dai-cells = <0>;
+
clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
&clkc CLKID_FCLK_DIV5
&clkaudio CLKID_AUDIO_EQDRC>;
clock-names = "gate", "srcpll", "eqdrc";
+
/*
* 0:tdmout_a
* 1:tdmout_b
lane_mask = <0x1>;
/* max 0xff, each bit for one channel */
channel_mask = <0x3>;
+
status = "okay";
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
tdmout_a: tdmout_a {
mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */
/* mode 0~4, defalut:1 */
filter_mode = <1>;
- status = "okay";
- };
-
- earc:earc {
- compatible = "amlogic, sm1-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = <&clkaudio CLKID_AUDIO_GATE_EARCRX
- &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV4
- &clkc CLKID_FCLK_DIV4
- >;
- clock-names = "rx_gate",
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH
- >;
- interrupt-names = "earc_rx";
status = "okay";
};
status = "disabled";
};
+
aed:effect {
compatible = "amlogic, snd-effect-v3";
#sound-dai-cells = <0>;
+
clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
&clkc CLKID_FCLK_DIV5
&clkaudio CLKID_AUDIO_EQDRC>;
clock-names = "gate", "srcpll", "eqdrc";
+
/*
* 0:tdmout_a
* 1:tdmout_b
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
tdmout_a: tdmout_a {
mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */
/* mode 0~4, defalut:1 */
filter_mode = <1>;
- status = "okay";
- };
-
- earc:earc {
- compatible = "amlogic, sm1-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = <&clkaudio CLKID_AUDIO_GATE_EARCRX
- &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV4
- &clkc CLKID_FCLK_DIV4
- >;
- clock-names = "rx_gate",
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH
- >;
- interrupt-names = "earc_rx";
status = "okay";
};
status = "disabled";
};
+
aed:effect {
compatible = "amlogic, snd-effect-v3";
#sound-dai-cells = <0>;
+
clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
&clkc CLKID_FCLK_DIV5
&clkaudio CLKID_AUDIO_EQDRC>;
clock-names = "gate", "srcpll", "eqdrc";
+
/*
* 0:tdmout_a
* 1:tdmout_b
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
tdmout_a: tdmout_a {
mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */
/* mode 0~4, defalut:1 */
filter_mode = <1>;
- status = "okay";
- };
-
- earc:earc {
- compatible = "amlogic, sm1-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = <&clkaudio CLKID_AUDIO_GATE_EARCRX
- &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV5
- &clkc CLKID_FCLK_DIV3
- >;
- clock-names = "rx_gate",
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 88 IRQ_TYPE_EDGE_RISING
- GIC_SPI 87 IRQ_TYPE_EDGE_RISING
- >;
- interrupt-names = "rx_cmdc", "rx_dmac";
status = "okay";
};
status = "disabled";
};
+
aed:effect {
compatible = "amlogic, snd-effect-v3";
#sound-dai-cells = <0>;
+
clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
&clkc CLKID_FCLK_DIV5
&clkaudio CLKID_AUDIO_EQDRC>;
clock-names = "gate", "srcpll", "eqdrc";
+
/*
* 0:tdmout_a
* 1:tdmout_b
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
tdmout_a: tdmout_a {
mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */
/* mode 0~4, defalut:1 */
filter_mode = <1>;
- status = "okay";
- };
-
- earc:earc {
- compatible = "amlogic, sm1-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = <&clkaudio CLKID_AUDIO_GATE_EARCRX
- &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV5
- &clkc CLKID_FCLK_DIV3
- >;
- clock-names = "rx_gate",
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 88 IRQ_TYPE_EDGE_RISING
- GIC_SPI 87 IRQ_TYPE_EDGE_RISING
- >;
- interrupt-names = "rx_cmdc", "rx_dmac";
status = "okay";
};
status = "disabled";
};
+
aed:effect {
compatible = "amlogic, snd-effect-v3";
#sound-dai-cells = <0>;
+
clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
&clkc CLKID_FCLK_DIV5
&clkaudio CLKID_AUDIO_EQDRC>;
clock-names = "gate", "srcpll", "eqdrc";
+
/*
* 0:tdmout_a
* 1:tdmout_b
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
tdmout_a: tdmout_a {
mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */
/* mode 0~4, defalut:1 */
filter_mode = <1>;
- status = "okay";
- };
-
- earc:earc {
- compatible = "amlogic, sm1-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = <&clkaudio CLKID_AUDIO_GATE_EARCRX
- &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV5
- &clkc CLKID_FCLK_DIV3
- >;
- clock-names = "rx_gate",
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 88 IRQ_TYPE_EDGE_RISING
- GIC_SPI 87 IRQ_TYPE_EDGE_RISING
- >;
- interrupt-names = "rx_cmdc", "rx_dmac";
status = "okay";
};
status = "disabled";
};
+
aed:effect {
compatible = "amlogic, snd-effect-v3";
#sound-dai-cells = <0>;
+
clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
&clkc CLKID_FCLK_DIV5
&clkaudio CLKID_AUDIO_EQDRC>;
clock-names = "gate", "srcpll", "eqdrc";
+
/*
* 0:tdmout_a
* 1:tdmout_b
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
tdmout_a: tdmout_a {
mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */
status = "okay";
};
- earc:earc {
- compatible = "amlogic, tm2-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = < &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV4
- &clkc CLKID_FCLK_DIV4
- &clkaudio CLKID_EARCTX_CMDC
- &clkaudio CLKID_EARCTX_DMAC
- &clkc CLKID_FCLK_DIV5
- &clkc CLKID_FCLK_DIV3
- >;
- clock-names =
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll",
- "tx_cmdc",
- "tx_dmac",
- "tx_cmdc_srcpll",
- "tx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH
- >;
- interrupt-names = "earc_rx", "earc_tx";
-
- status = "okay";
- };
-
aed:effect {
compatible = "amlogic, snd-effect-v3";
#sound-dai-cells = <0>;
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
/* audio pin mux */
compatible = "amlogic, snd-extn";
#sound-dai-cells = <0>;
-
interrupts =
<GIC_SPI 158 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "irq_frhdmirx";
status = "okay";
};
- earc:earc {
- compatible = "amlogic, tm2-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = < &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV4
- &clkc CLKID_FCLK_DIV4
- &clkaudio CLKID_EARCTX_CMDC
- &clkaudio CLKID_EARCTX_DMAC
- &clkc CLKID_FCLK_DIV5
- &clkc CLKID_FCLK_DIV3
- >;
- clock-names =
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll",
- "tx_cmdc",
- "tx_dmac",
- "tx_cmdc_srcpll",
- "tx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH
- >;
- interrupt-names = "earc_rx", "earc_tx";
-
- status = "okay";
- };
-
aed:effect {
compatible = "amlogic, snd-effect-v3";
#sound-dai-cells = <0>;
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
/* audio pin mux */
status = "okay";
};
- earc:earc {
- compatible = "amlogic, tm2-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = < &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV4
- &clkc CLKID_FCLK_DIV4
- &clkaudio CLKID_EARCTX_CMDC
- &clkaudio CLKID_EARCTX_DMAC
- &clkc CLKID_FCLK_DIV5
- &clkc CLKID_FCLK_DIV3
- >;
- clock-names =
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll",
- "tx_cmdc",
- "tx_dmac",
- "tx_cmdc_srcpll",
- "tx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH
- >;
- interrupt-names = "earc_rx", "earc_tx";
-
- status = "okay";
- };
-
aed:effect {
compatible = "amlogic, snd-effect-v3";
#sound-dai-cells = <0>;
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
/* audio pin mux */
compatible = "amlogic, snd-extn";
#sound-dai-cells = <0>;
-
interrupts =
<GIC_SPI 158 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "irq_frhdmirx";
status = "okay";
};
- earc:earc {
- compatible = "amlogic, tm2-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = < &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV4
- &clkc CLKID_FCLK_DIV4
- &clkaudio CLKID_EARCTX_CMDC
- &clkaudio CLKID_EARCTX_DMAC
- &clkc CLKID_FCLK_DIV5
- &clkc CLKID_FCLK_DIV3
- >;
- clock-names =
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll",
- "tx_cmdc",
- "tx_dmac",
- "tx_cmdc_srcpll",
- "tx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH
- >;
- interrupt-names = "earc_rx", "earc_tx";
-
- status = "okay";
- };
-
aed:effect {
compatible = "amlogic, snd-effect-v3";
#sound-dai-cells = <0>;
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
/* audio pin mux */
status = "okay";
};
- earc:earc {
- compatible = "amlogic, tm2-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = < &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV4
- &clkc CLKID_FCLK_DIV4
- &clkaudio CLKID_EARCTX_CMDC
- &clkaudio CLKID_EARCTX_DMAC
- &clkc CLKID_FCLK_DIV5
- &clkc CLKID_FCLK_DIV3
- >;
- clock-names =
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll",
- "tx_cmdc",
- "tx_dmac",
- "tx_cmdc_srcpll",
- "tx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH
- >;
- interrupt-names = "earc_rx", "earc_tx";
-
- status = "okay";
- };
-
aed:effect {
compatible = "amlogic, snd-effect-v3";
#sound-dai-cells = <0>;
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
/* audio pin mux */
audiobus: audiobus@0xFF660000 {
compatible = "amlogic, audio-controller", "simple-bus";
- reg = <0x0 0xFF660000 0x0 0x4000>;
+ reg = <0x0 0xFF660000 0x0 0x3000>;
#address-cells = <2>;
#size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xFF660000 0x0 0x4000>;
+ ranges = <0x0 0x0 0x0 0xFF660000 0x0 0x3000>;
clkaudio: audio_clocks {
compatible = "amlogic, sm1-audio-clocks";
#clock-cells = <1>;
};
};/* end of audiobus*/
+ /* eARC */
+ audio_earc: bus@ff663000 {
+ compatible = "simple-bus";
+ reg = <0x0 0xff663000 0x0 0x1000>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x0 0x0 0x0 0xff663000 0x0 0x1000>;
+
+ earc: earc@0 {
+ compatible = "amlogic, sm1-snd-earc";
+ #sound-dai-cells = <0>;
+
+ status = "disabled";
+
+ reg =
+ <0x0 0x800 0x0 0x400>,
+ <0x0 0xc00 0x0 0x200>,
+ <0x0 0xe00 0x0 0x200>;
+ reg-names =
+ "rx_cmdc",
+ "rx_dmac",
+ "rx_top";
+
+ clocks = < &clkaudio CLKID_EARCRX_CMDC
+ &clkaudio CLKID_EARCRX_DMAC
+ &clkc CLKID_FCLK_DIV4
+ &clkc CLKID_FCLK_DIV4
+ &clkaudio CLKID_EARCTX_CMDC
+ &clkaudio CLKID_EARCTX_DMAC
+ &clkc CLKID_FCLK_DIV4
+ &clkc CLKID_MPLL1
+ >;
+ clock-names =
+ "rx_cmdc",
+ "rx_dmac",
+ "rx_cmdc_srcpll",
+ "rx_dmac_srcpll";
+
+ interrupts = <
+ GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "earc_rx";
+ };
+ };
+
+ /* Sound iomap */
+ aml_snd_iomap {
+ compatible = "amlogic, snd-iomap";
+ status = "okay";
+ #address-cells=<2>;
+ #size-cells=<2>;
+ ranges;
+ pdm_bus {
+ reg = <0x0 0xFF661000 0x0 0x400>;
+ };
+ audiobus_base {
+ reg = <0x0 0xFF660000 0x0 0x1000>;
+ };
+ audiolocker_base {
+ reg = <0x0 0xFF661400 0x0 0x400>;
+ };
+ eqdrc_base {
+ reg = <0x0 0xFF662000 0x0 0x1000>;
+ };
+ reset_base {
+ reg = <0x0 0xFFD01000 0x0 0x1000>;
+ };
+ vad_base {
+ reg = <0x0 0xFF661800 0x0 0x400>;
+ };
+ };
}; /* end of soc*/
remote:rc@0xff808040 {
/*partions defined in dts */
};
- /* Sound iomap */
- aml_snd_iomap {
- compatible = "amlogic, snd-iomap";
- status = "okay";
- #address-cells=<2>;
- #size-cells=<2>;
- ranges;
- pdm_bus {
- reg = <0x0 0xFF661000 0x0 0x400>;
- };
- audiobus_base {
- reg = <0x0 0xFF660000 0x0 0x1000>;
- };
- audiolocker_base {
- reg = <0x0 0xFF661400 0x0 0x400>;
- };
- eqdrc_base {
- reg = <0x0 0xFF662000 0x0 0x1000>;
- };
- reset_base {
- reg = <0x0 0xFFD01000 0x0 0x1000>;
- };
- vad_base {
- reg = <0x0 0xFF661800 0x0 0x400>;
- };
- earcrx_cdmc_base {
- reg = <0x0 0xFF663800 0x0 0x30>;
- };
- earcrx_dmac_base {
- reg = <0x0 0xFF663C00 0x0 0x20>;
- };
- earcrx_top_base {
- reg = <0x0 0xFF663E00 0x0 0x10>;
- };
- };
-
vddcpu0: pwmao_d-regulator {
compatible = "pwm-regulator";
pwms = <&pwm_AO_cd MESON_PWM_1 1500 0>;
compatible = "amlogic, audio-controller", "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
- reg = <0x0 0xff600000 0x0 0x10000>;
- ranges = <0x0 0x0 0x0 0xff600000 0x0 0x10000>;
+ reg = <0x0 0xff600000 0x0 0x3000>;
+ ranges = <0x0 0x0 0x0 0xff600000 0x0 0x3000>;
clkaudio:audio_clocks {
compatible = "amlogic, tm2-audio-clocks";
};
};/* end of audiobus*/
+ /* eARC */
+ audio_earc: bus@ff603000 {
+ compatible = "simple-bus";
+ reg = <0x0 0xff603000 0x0 0xD000>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x0 0x0 0x0 0xff603000 0x0 0xD000>;
+
+ earc: earc@0 {
+ compatible = "amlogic, tm2-snd-earc";
+ #sound-dai-cells = <0>;
+
+ status = "disabled";
+
+ reg = <0x0 0x0 0x0 0x400>,
+ <0x0 0x400 0x0 0x200>,
+ <0x0 0x600 0x0 0x200>,
+ <0x0 0x800 0x0 0x400>,
+ <0x0 0xc00 0x0 0x200>,
+ <0x0 0xe00 0x0 0x200>;
+ reg-names = "tx_cmdc",
+ "tx_dmac",
+ "tx_top",
+ "rx_cmdc",
+ "rx_dmac",
+ "rx_top";
+
+ clocks = < &clkaudio CLKID_EARCRX_CMDC
+ &clkaudio CLKID_EARCRX_DMAC
+ &clkc CLKID_FCLK_DIV4
+ &clkc CLKID_FCLK_DIV4
+ &clkaudio CLKID_EARCTX_CMDC
+ &clkaudio CLKID_EARCTX_DMAC
+ &clkc CLKID_FCLK_DIV4
+ &clkc CLKID_MPLL1
+ >;
+ clock-names =
+ "rx_cmdc",
+ "rx_dmac",
+ "rx_cmdc_srcpll",
+ "rx_dmac_srcpll",
+ "tx_cmdc",
+ "tx_dmac",
+ "tx_cmdc_srcpll",
+ "tx_dmac_srcpll";
+
+ interrupts = <
+ GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "earc_rx", "earc_tx";
+ };
+ };
+
/* Sound iomap */
aml_snd_iomap {
compatible = "amlogic, snd-iomap";
vad_base {
reg = <0x0 0xFF601800 0x0 0x400>;
};
- earcrx_cdmc_base {
- reg = <0x0 0xFF603800 0x0 0x30>;
- };
- earcrx_dmac_base {
- reg = <0x0 0xFF603C00 0x0 0x20>;
- };
- earcrx_top_base {
- reg = <0x0 0xFF603E00 0x0 0x10>;
- };
};
cbus: cbus@ffd00000 {
status = "okay";
};
- earc:earc {
- compatible = "amlogic, sm1-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = <&clkaudio CLKID_AUDIO_GATE_EARCRX
- &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV4
- &clkc CLKID_FCLK_DIV4
- >;
- clock-names = "rx_gate",
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH
- >;
- interrupt-names = "earc_rx";
-
- status = "okay";
- };
-
asrca: resample@0 {
compatible = "amlogic, sm1-resample";
clocks = <&clkc CLKID_MPLL3
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
tdmout_a: tdmout_a {
mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */
status = "okay";
};
- earc:earc {
- compatible = "amlogic, sm1-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = <&clkaudio CLKID_AUDIO_GATE_EARCRX
- &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV4
- &clkc CLKID_FCLK_DIV4
- >;
- clock-names = "rx_gate",
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH
- >;
- interrupt-names = "earc_rx";
-
- status = "okay";
- };
-
asrca: resample@0 {
compatible = "amlogic, sm1-resample";
clocks = <&clkc CLKID_MPLL3
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
tdmout_a: tdmout_a {
mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */
status = "okay";
};
- earc:earc {
- compatible = "amlogic, sm1-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = <&clkaudio CLKID_AUDIO_GATE_EARCRX
- &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV4
- &clkc CLKID_FCLK_DIV4
- >;
- clock-names = "rx_gate",
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH
- >;
- interrupt-names = "earc_rx";
-
- status = "okay";
- };
-
asrca: resample@0 {
compatible = "amlogic, sm1-resample";
clocks = <&clkc CLKID_MPLL3
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
tdmout_a: tdmout_a {
mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */
status = "okay";
};
- earc:earc {
- compatible = "amlogic, sm1-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = <&clkaudio CLKID_AUDIO_GATE_EARCRX
- &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV4
- &clkc CLKID_FCLK_DIV4
- >;
- clock-names = "rx_gate",
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH
- >;
- interrupt-names = "earc_rx";
-
- status = "okay";
- };
-
asrca: resample@0 {
compatible = "amlogic, sm1-resample";
clocks = <&clkc CLKID_MPLL3
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
tdmout_a: tdmout_a {
mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */
status = "okay";
};
- earc:earc {
- compatible = "amlogic, sm1-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = <&clkaudio CLKID_AUDIO_GATE_EARCRX
- &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV4
- &clkc CLKID_FCLK_DIV4
- >;
- clock-names = "rx_gate",
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH
- >;
- interrupt-names = "earc_rx";
-
- status = "okay";
- };
-
asrca: resample@0 {
compatible = "amlogic, sm1-resample";
clocks = <&clkc CLKID_MPLL3
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
tdmout_a: tdmout_a {
mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */
status = "okay";
};
- earc:earc {
- compatible = "amlogic, sm1-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = <&clkaudio CLKID_AUDIO_GATE_EARCRX
- &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV4
- &clkc CLKID_FCLK_DIV4
- >;
- clock-names = "rx_gate",
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH
- >;
- interrupt-names = "earc_rx";
-
- status = "okay";
- };
-
asrca: resample@0 {
compatible = "amlogic, sm1-resample";
clocks = <&clkc CLKID_MPLL3
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
tdmout_a: tdmout_a {
mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */
status = "okay";
};
- earc:earc {
- compatible = "amlogic, sm1-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = <&clkaudio CLKID_AUDIO_GATE_EARCRX
- &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV4
- &clkc CLKID_FCLK_DIV4
- >;
- clock-names = "rx_gate",
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH
- >;
- interrupt-names = "earc_rx";
-
- status = "okay";
- };
-
asrca: resample@0 {
compatible = "amlogic, sm1-resample";
clocks = <&clkc CLKID_MPLL3
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
tdmout_a: tdmout_a {
mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */
status = "okay";
};
- earc:earc {
- compatible = "amlogic, sm1-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = <&clkaudio CLKID_AUDIO_GATE_EARCRX
- &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV4
- &clkc CLKID_FCLK_DIV4
- >;
- clock-names = "rx_gate",
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH
- >;
- interrupt-names = "earc_rx";
-
- status = "okay";
- };
-
asrca: resample@0 {
compatible = "amlogic, sm1-resample";
clocks = <&clkc CLKID_MPLL3
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
tdmout_a: tdmout_a {
mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */
status = "okay";
};
- earc:earc {
- compatible = "amlogic, sm1-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = <&clkaudio CLKID_AUDIO_GATE_EARCRX
- &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV5
- &clkc CLKID_FCLK_DIV3
- >;
- clock-names = "rx_gate",
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 88 IRQ_TYPE_EDGE_RISING
- GIC_SPI 87 IRQ_TYPE_EDGE_RISING
- >;
- interrupt-names = "rx_cmdc", "rx_dmac";
-
- status = "okay";
- };
-
asrca: resample@0 {
compatible = "amlogic, sm1-resample";
clocks = <&clkc CLKID_MPLL3
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
tdmout_a: tdmout_a {
mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */
status = "okay";
};
- earc:earc {
- compatible = "amlogic, sm1-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = <&clkaudio CLKID_AUDIO_GATE_EARCRX
- &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV5
- &clkc CLKID_FCLK_DIV3
- >;
- clock-names = "rx_gate",
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 88 IRQ_TYPE_EDGE_RISING
- GIC_SPI 87 IRQ_TYPE_EDGE_RISING
- >;
- interrupt-names = "rx_cmdc", "rx_dmac";
-
- status = "okay";
- };
-
asrca: resample@0 {
compatible = "amlogic, sm1-resample";
clocks = <&clkc CLKID_MPLL3
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
tdmout_a: tdmout_a {
mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */
status = "okay";
};
- earc:earc {
- compatible = "amlogic, sm1-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = <&clkaudio CLKID_AUDIO_GATE_EARCRX
- &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV5
- &clkc CLKID_FCLK_DIV3
- >;
- clock-names = "rx_gate",
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 88 IRQ_TYPE_EDGE_RISING
- GIC_SPI 87 IRQ_TYPE_EDGE_RISING
- >;
- interrupt-names = "rx_cmdc", "rx_dmac";
-
- status = "okay";
- };
-
asrca: resample@0 {
compatible = "amlogic, sm1-resample";
clocks = <&clkc CLKID_MPLL3
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
tdmout_a: tdmout_a {
mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */
#sound-dai-cells = <0>;
dai-tdm-lane-slot-mask-in = <1 0 0 0>;
- dai-tdm-lane-slot-mask-out = <1 0 0 0>;
+ dai-tdm-lane-slot-mask-out = <0 1 0 0>;
dai-tdm-clk-sel = <1>;
clocks = <&clkaudio CLKID_AUDIO_MCLK_B
status = "okay";
};
- earc:earc {
- compatible = "amlogic, tm2-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = < &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV4
- &clkc CLKID_FCLK_DIV4
- &clkaudio CLKID_EARCTX_CMDC
- &clkaudio CLKID_EARCTX_DMAC
- &clkc CLKID_FCLK_DIV5
- &clkc CLKID_FCLK_DIV3
- >;
- clock-names =
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll",
- "tx_cmdc",
- "tx_dmac",
- "tx_cmdc_srcpll",
- "tx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH
- >;
- interrupt-names = "earc_rx", "earc_tx";
-
- status = "okay";
- };
-
aed:effect {
compatible = "amlogic, snd-effect-v3";
#sound-dai-cells = <0>;
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
/* audio pin mux */
status = "okay";
};
- earc:earc {
- compatible = "amlogic, tm2-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = < &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV4
- &clkc CLKID_FCLK_DIV4
- &clkaudio CLKID_EARCTX_CMDC
- &clkaudio CLKID_EARCTX_DMAC
- &clkc CLKID_FCLK_DIV5
- &clkc CLKID_FCLK_DIV3
- >;
- clock-names =
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll",
- "tx_cmdc",
- "tx_dmac",
- "tx_cmdc_srcpll",
- "tx_dmac_srcpll";
- interrupts = <
- GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH
- >;
- interrupt-names = "earc_rx", "earc_tx";
-
- status = "okay";
- };
-
aed:effect {
compatible = "amlogic, snd-effect-v3";
#sound-dai-cells = <0>;
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
/* audio pin mux */
status = "okay";
};
- earc:earc {
- compatible = "amlogic, tm2-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = < &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV4
- &clkc CLKID_FCLK_DIV4
- &clkaudio CLKID_EARCTX_CMDC
- &clkaudio CLKID_EARCTX_DMAC
- &clkc CLKID_FCLK_DIV5
- &clkc CLKID_FCLK_DIV3
- >;
- clock-names =
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll",
- "tx_cmdc",
- "tx_dmac",
- "tx_cmdc_srcpll",
- "tx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH
- >;
- interrupt-names = "earc_rx", "earc_tx";
-
- status = "okay";
- };
-
aed:effect {
compatible = "amlogic, snd-effect-v3";
#sound-dai-cells = <0>;
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
/* audio pin mux */
compatible = "amlogic, snd-extn";
#sound-dai-cells = <0>;
-
interrupts =
<GIC_SPI 158 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "irq_frhdmirx";
status = "okay";
};
- earc:earc {
- compatible = "amlogic, tm2-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = < &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV4
- &clkc CLKID_FCLK_DIV4
- &clkaudio CLKID_EARCTX_CMDC
- &clkaudio CLKID_EARCTX_DMAC
- &clkc CLKID_FCLK_DIV5
- &clkc CLKID_FCLK_DIV3
- >;
- clock-names =
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll",
- "tx_cmdc",
- "tx_dmac",
- "tx_cmdc_srcpll",
- "tx_dmac_srcpll";
- interrupts = <
- GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH
- >;
- interrupt-names = "earc_rx", "earc_tx";
-
- status = "okay";
- };
-
aed:effect {
compatible = "amlogic, snd-effect-v3";
#sound-dai-cells = <0>;
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
/* audio pin mux */
status = "okay";
};
- earc:earc {
- compatible = "amlogic, tm2-snd-earc";
- #sound-dai-cells = <0>;
-
- clocks = < &clkaudio CLKID_EARCRX_CMDC
- &clkaudio CLKID_EARCRX_DMAC
- &clkc CLKID_FCLK_DIV4
- &clkc CLKID_FCLK_DIV4
- &clkaudio CLKID_EARCTX_CMDC
- &clkaudio CLKID_EARCTX_DMAC
- &clkc CLKID_FCLK_DIV5
- &clkc CLKID_FCLK_DIV3
- >;
- clock-names =
- "rx_cmdc",
- "rx_dmac",
- "rx_cmdc_srcpll",
- "rx_dmac_srcpll",
- "tx_cmdc",
- "tx_dmac",
- "tx_cmdc_srcpll",
- "tx_dmac_srcpll";
-
- interrupts = <
- GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH
- >;
- interrupt-names = "earc_rx", "earc_tx";
-
- status = "okay";
- };
-
aed:effect {
compatible = "amlogic, snd-effect-v3";
#sound-dai-cells = <0>;
};
}; /* end of audiobus */
+&earc {
+ status = "okay";
+};
+
&pinctrl_periphs {
/* audio pin mux */
.id = EXTCON_EARCRX_ATNDTYP_EARC,
.name = "EARCRX-EARC",
},
+ [EXTCON_EARCTX_ATNDTYP_ARC] = {
+ .type = EXTCON_TYPE_MISC,
+ .id = EXTCON_EARCTX_ATNDTYP_ARC,
+ .name = "EARCTX-ARC",
+ },
+ [EXTCON_EARCTX_ATNDTYP_EARC] = {
+ .type = EXTCON_TYPE_MISC,
+ .id = EXTCON_EARCTX_ATNDTYP_EARC,
+ .name = "EARCTX-EARC",
+ },
#endif
/* Display external connector */
[EXTCON_DISP_HDMI] = {
--- /dev/null
+/*
+ * include/linux/amlogic/media/sound/iomapres.h
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+#ifndef __IOMAPRES_H__
+#define __IOMAPRES_H__
+
+#include <linux/regmap.h>
+
+struct regmap *regmap_resource(struct device *dev, char *name);
+
+unsigned int mmio_read(struct regmap *map, unsigned int reg_ofs);
+
+int mmio_write(struct regmap *map, unsigned int reg_ofs, unsigned int value);
+
+int mmio_update_bits(struct regmap *map,
+ unsigned int reg_ofs,
+ unsigned int mask,
+ unsigned int value);
+
+#endif
unsigned short chstat1_r;
};
+bool spdifout_is_raw(void);
+
extern bool spdif_is_4x_clk(void);
extern void spdif_get_channel_status_info(struct iec958_chsts *chsts,
#ifdef CONFIG_AMLOGIC_SND_SOC_AUGE
#define EXTCON_SPDIFIN_SAMPLERATE 28 /* spdif in sample rate changed */
#define EXTCON_SPDIFIN_AUDIOTYPE 29 /* spdif in PcPd detect */
-#define EXTCON_EARCRX_ATNDTYP_ARC 30 /* attended type, ARC */
-#define EXTCON_EARCRX_ATNDTYP_EARC 31 /* attended type, eARC */
+#define EXTCON_EARCRX_ATNDTYP_ARC 30 /* attended type, RX ARC */
+#define EXTCON_EARCRX_ATNDTYP_EARC 31 /* attended type, RX eARC */
+#define EXTCON_EARCTX_ATNDTYP_ARC 32 /* attended type, TX ARC */
+#define EXTCON_EARCTX_ATNDTYP_EARC 33 /* attended type, TX eARC */
#endif
/* Display external connector */
#define EXTCON_DISP_HDMI 40 /* High-Definition Multimedia Interface */
return ret;
}
+ pr_info("%s done\n", __func__);
+
return 0;
}
#include <linux/regmap.h>
#include <linux/clk-provider.h>
+#include <linux/amlogic/media/sound/iomapres.h>
+
#include "audio_io.h"
#include "regs.h"
#include "audio_aed_reg_list.h"
unsigned int reg)
{
struct regmap *regmap = actrlr->regmap;
- unsigned int val;
-
- regmap_read(regmap, (reg << 2), &val);
- return val;
+ return mmio_read(regmap, reg);
}
static int aml_audio_mmio_write(struct aml_audio_controller *actrlr,
unsigned int reg, unsigned int value)
{
struct regmap *regmap = actrlr->regmap;
+
pr_debug("audio top reg:[%s] addr: [%#x] val: [%#x]\n",
top_register_table[reg].name,
top_register_table[reg].addr,
value);
- return regmap_write(regmap, (reg << 2), value);
+
+ return mmio_write(regmap, reg, value);
}
static int aml_audio_mmio_update_bits(struct aml_audio_controller *actrlr,
unsigned int reg, unsigned int mask, unsigned int value)
{
struct regmap *regmap = actrlr->regmap;
+
pr_debug("audio top reg:[%s] addr: [%#x] mask: [%#x] val: [%#x]\n",
top_register_table[reg].name,
top_register_table[reg].addr,
mask, value);
- return regmap_update_bits(regmap, (reg << 2), mask, value);
+
+ return mmio_update_bits(regmap, reg, mask, value);
}
struct aml_audio_ctrl_ops aml_actrl_mmio_ops = {
static int frddr_src_idx = -1;
static const char *const frddr_src_sel_texts[] = {
- "TDMOUT_A", "TDMOUT_B", "TDMOUT_C", "SPDIFOUT_A", "SPDIFOUT_B"
+ "TDMOUT_A", "TDMOUT_B", "TDMOUT_C",
+ "SPDIFOUT_A", "SPDIFOUT_B", "EARCTX_DMAC"
};
static const struct soc_enum frddr_output_source_enum =
const char *frddr_src_get_str(int idx)
{
- if (idx < 0 || idx > 4)
+ if (idx < 0 || idx >= FRDDR_MAX)
return NULL;
return frddr_src_sel_texts[idx];
TDMOUT_C,
SPDIFOUT_A,
SPDIFOUT_B,
+ EARCTX_DMAC,
+ FRDDR_MAX
};
enum status_sel {
* Audio External Input/Out drirver
* such as fratv, frhdmirx
*/
+#define DEBUG
#include <linux/module.h>
#include <linux/moduleparam.h>
struct clk *clk_tx_cmdc_srcpll;
struct clk *clk_tx_dmac_srcpll;
+ struct regmap *tx_cmdc_map;
+ struct regmap *tx_dmac_map;
+ struct regmap *tx_top_map;
+ struct regmap *rx_cmdc_map;
+ struct regmap *rx_dmac_map;
+ struct regmap *rx_top_map;
+
struct toddr *tddr;
struct frddr *fddr;
/* external connect */
struct extcon_dev *rx_edev;
+ struct extcon_dev *tx_edev;
- bool rx_cmdc_clk_on;
+ bool tx_dmac_clk_on;
bool rx_dmac_clk_on;
};
-void earc_hdmirx_hpdst(int earc_port, bool st)
-{
-};
+static struct earc *s_earc;
#define PREALLOC_BUFFER_MAX (256 * 1024)
}
static void earcrx_update_attend_event(struct earc *p_earc,
- bool is_earc, bool state)
+ bool is_earc, bool state)
{
if (state) {
if (is_earc) {
static irqreturn_t earc_rx_isr(int irq, void *data)
{
struct earc *p_earc = (struct earc *)data;
+ unsigned int status0 = earcrx_cdmc_get_irqs(p_earc->rx_top_map);
- if (p_earc->rx_cmdc_clk_on) {
- unsigned int status0 = earcrx_cdmc_get_irqs();
-
- if (status0 & INT_EARCRX_CMDC_IDLE2) {
- earcrx_update_attend_event(p_earc,
- false, true);
-
- pr_info("%s EARCRX_CMDC_IDLE2\n", __func__);
- }
- if (status0 & INT_EARCRX_CMDC_IDLE1) {
- earcrx_update_attend_event(p_earc,
- false, false);
+ if (status0 & INT_EARCRX_CMDC_IDLE2) {
+ earcrx_update_attend_event(p_earc,
+ false, true);
- pr_info("%s EARCRX_CMDC_IDLE1\n", __func__);
- }
- if (status0 & INT_EARCRX_CMDC_DISC2)
- pr_info("%s EARCRX_CMDC_DISC2\n", __func__);
- if (status0 & INT_EARCRX_CMDC_DISC1)
- pr_info("%s EARCRX_CMDC_DISC1\n", __func__);
- if (status0 & INT_EARCRX_CMDC_EARC) {
- earcrx_update_attend_event(p_earc,
- true, true);
-
- pr_info("%s EARCRX_CMDC_EARC\n", __func__);
- }
- if (status0 & INT_EARCRX_CMDC_HB_STATUS)
- pr_debug("%s EARCRX_CMDC_HB_STATUS\n", __func__);
- if (status0 & INT_EARCRX_CMDC_LOSTHB)
- pr_info("%s EARCRX_CMDC_LOSTHB\n", __func__);
- if (status0 & INT_EARCRX_CMDC_TIMEOUT) {
- earcrx_update_attend_event(p_earc,
- false, true);
-
- pr_info("%s EARCRX_CMDC_TIMEOUT\n", __func__);
- }
+ pr_debug("%s EARCRX_CMDC_IDLE2\n", __func__);
+ }
+ if (status0 & INT_EARCRX_CMDC_IDLE1) {
+ earcrx_update_attend_event(p_earc,
+ false, false);
- if (status0)
- earcrx_cdmc_clr_irqs(status0);
+ pr_debug("%s EARCRX_CMDC_IDLE1\n", __func__);
+ }
+ if (status0 & INT_EARCRX_CMDC_DISC2)
+ pr_debug("%s EARCRX_CMDC_DISC2\n", __func__);
+ if (status0 & INT_EARCRX_CMDC_DISC1)
+ pr_debug("%s EARCRX_CMDC_DISC1\n", __func__);
+ if (status0 & INT_EARCRX_CMDC_EARC) {
+ earcrx_update_attend_event(p_earc,
+ true, true);
+
+ pr_info("%s EARCRX_CMDC_EARC\n", __func__);
}
+ if (status0 & INT_EARCRX_CMDC_HB_STATUS)
+ pr_debug("%s EARCRX_CMDC_HB_STATUS\n", __func__);
+ if (status0 & INT_EARCRX_CMDC_LOSTHB)
+ pr_debug("%s EARCRX_CMDC_LOSTHB\n", __func__);
+ if (status0 & INT_EARCRX_CMDC_TIMEOUT) {
+ earcrx_update_attend_event(p_earc,
+ false, false);
+
+ pr_debug("%s EARCRX_CMDC_TIMEOUT\n", __func__);
+ }
+
+ if (status0)
+ earcrx_cdmc_clr_irqs(p_earc->rx_top_map, status0);
if (p_earc->rx_dmac_clk_on) {
- unsigned int status1 = earcrx_dmac_get_irqs();
+ unsigned int status1 = earcrx_dmac_get_irqs(p_earc->rx_top_map);
if (status1 & INT_ARCRX_BIPHASE_DECODE_C_FIND_PAPB)
pr_debug("%s ARCRX_C_FIND_PAPB\n", __func__);
pr_debug("%s ARCRX_R_PARITY_ERR\n", __func__);
if (status1)
- earcrx_dmac_clr_irqs(status1);
+ earcrx_dmac_clr_irqs(p_earc->rx_top_map, status1);
}
return IRQ_HANDLED;
}
+static void earctx_update_attend_event(struct earc *p_earc,
+ bool is_earc, bool state)
+{
+ if (state) {
+ if (is_earc) {
+ extcon_set_state_sync(p_earc->rx_edev,
+ EXTCON_EARCTX_ATNDTYP_ARC,
+ false);
+ extcon_set_state_sync(p_earc->rx_edev,
+ EXTCON_EARCTX_ATNDTYP_EARC,
+ state);
+ } else {
+ extcon_set_state_sync(p_earc->rx_edev,
+ EXTCON_EARCTX_ATNDTYP_ARC,
+ state);
+ extcon_set_state_sync(p_earc->rx_edev,
+ EXTCON_EARCTX_ATNDTYP_EARC,
+ false);
+ }
+ } else {
+ extcon_set_state_sync(p_earc->rx_edev,
+ EXTCON_EARCTX_ATNDTYP_ARC,
+ state);
+ extcon_set_state_sync(p_earc->rx_edev,
+ EXTCON_EARCTX_ATNDTYP_EARC,
+ state);
+ }
+}
+
static irqreturn_t earc_tx_isr(int irq, void *data)
{
+ struct earc *p_earc = (struct earc *)data;
+ unsigned int status0 = earctx_cdmc_get_irqs(p_earc->tx_top_map);
+
+ if (status0 & INT_EARCTX_CMDC_IDLE2) {
+ earctx_update_attend_event(p_earc,
+ false, true);
+
+ pr_debug("%s EARCTX_CMDC_IDLE2\n", __func__);
+ }
+ if (status0 & INT_EARCTX_CMDC_IDLE1) {
+ earctx_update_attend_event(p_earc,
+ false, false);
+
+ pr_debug("%s EARCTX_CMDC_IDLE1\n", __func__);
+ }
+ if (status0 & INT_EARCTX_CMDC_DISC2)
+ pr_debug("%s EARCTX_CMDC_DISC2\n", __func__);
+ if (status0 & INT_EARCTX_CMDC_DISC1)
+ pr_debug("%s EARCTX_CMDC_DISC1\n", __func__);
+ if (status0 & INT_EARCTX_CMDC_EARC) {
+ earctx_update_attend_event(p_earc,
+ true, true);
+
+ pr_info("%s EARCTX_CMDC_EARC\n", __func__);
+ }
+ if (status0 & INT_EARCTX_CMDC_HB_STATUS)
+ pr_debug("%s EARCTX_CMDC_HB_STATUS\n", __func__);
+ if (status0 & INT_EARCTX_CMDC_LOSTHB)
+ pr_debug("%s EARCTX_CMDC_LOSTHB\n", __func__);
+ if (status0 & INT_EARCTX_CMDC_TIMEOUT) {
+ earctx_update_attend_event(p_earc,
+ false, false);
+
+ pr_debug("%s EARCTX_CMDC_TIMEOUT\n", __func__);
+ }
+ if (status0 & INT_EARCTX_CMDC_STATUS_CH)
+ pr_debug("%s EARCTX_CMDC_STATUS_CH\n", __func__);
+ if (status0 & INT_EARCTX_CMDC_RECV_NACK)
+ pr_debug("%s EARCTX_CMDC_RECV_NACK\n", __func__);
+ if (status0 & INT_EARCTX_CMDC_RECV_NORSP)
+ pr_debug("%s EARCTX_CMDC_RECV_NORSP\n", __func__);
+ if (status0 & INT_EARCTX_CMDC_RECV_UNEXP)
+ pr_debug("%s EARCTX_CMDC_RECV_UNEXP\n", __func__);
+
+ if (status0)
+ earctx_cdmc_clr_irqs(p_earc->tx_top_map, status0);
+
+ if (p_earc->tx_dmac_clk_on) {
+ unsigned int status1 = earctx_dmac_get_irqs(p_earc->tx_top_map);
+
+ if (status1 & INT_EARCTX_FEM_C_HOLD_CLR)
+ pr_debug("%s EARCTX_FEM_C_HOLD_CLR\n", __func__);
+ if (status1 & INT_EARCTX_FEM_C_HOLD_START)
+ pr_debug("%s EARCTX_FEM_C_HOLD_START\n", __func__);
+ if (status1 & INT_EARCTX_ERRCORR_C_FIFO_THD_LESS_PASS)
+ pr_debug("%s EARCTX_ERRCORR_C_FIFO_THD_LESS_PASS\n",
+ __func__);
+ if (status1 & INT_EARCTX_ERRCORR_C_FIFO_OVERFLOW)
+ pr_debug("%s EARCTX_ERRCORR_C_FIFO_OVERFLOW\n",
+ __func__);
+ if (status1 & INT_EARCTX_ERRCORR_C_FIFO_EMPTY)
+ pr_debug("%s EARCTX_ERRCORR_C_FIFO_EMPTY\n", __func__);
+
+ if (status1)
+ earctx_dmac_clr_irqs(p_earc->tx_top_map, status1);
+ }
+
return IRQ_HANDLED;
}
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct device *dev = rtd->platform->dev;
struct earc *p_earc;
- int ret = 0;
- pr_info("asoc debug: %s-%d\n", __func__, __LINE__);
+ pr_info("asoc debug: %s\n", __func__);
p_earc = (struct earc *)dev_get_drvdata(dev);
dev_err(dev, "failed to claim from ddr\n");
return -ENXIO;
}
- if (p_earc->irq_earc_tx > 0) {
- ret = request_irq(p_earc->irq_earc_tx,
- earc_tx_isr, 0, "earc_tx",
- p_earc);
- if (ret) {
- dev_err(p_earc->dev, "failed to claim irq_earc_tx %u\n",
- p_earc->irq_earc_tx);
- return ret;
- }
- }
} else {
p_earc->tddr = aml_audio_register_toddr(dev,
p_earc->actrl,
struct snd_pcm_runtime *runtime = substream->runtime;
struct earc *p_earc = runtime->private_data;
- pr_info("asoc debug: %s-%d\n", __func__, __LINE__);
+ pr_info("asoc debug: %s\n", __func__);
- if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
aml_audio_unregister_frddr(p_earc->dev, substream);
-
- if (p_earc->irq_earc_tx > 0)
- free_irq(p_earc->irq_earc_tx, p_earc);
- } else {
+ else
aml_audio_unregister_toddr(p_earc->dev, substream);
- }
+
runtime->private_data = NULL;
return 0;
static int earc_dai_probe(struct snd_soc_dai *cpu_dai)
{
- pr_info("asoc debug: %s-%d\n", __func__, __LINE__);
+ pr_info("asoc debug: %s\n", __func__);
return 0;
}
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
struct frddr *fr = p_earc->fddr;
- enum frddr_dest dst = frddr_src_get();
+ enum frddr_dest dst = EARCTX_DMAC;
+ unsigned int fifo_id, frddr_type = 0;
+ struct iec958_chsts chsts;
pr_info("%s Expected frddr dst:%s\n",
__func__,
frddr_src_get_str(dst));
+ switch (bit_depth) {
+ case 8:
+ frddr_type = 0;
+ break;
+ case 16:
+ frddr_type = 1;
+ break;
+ case 24:
+ frddr_type = 4;
+ break;
+ case 32:
+ frddr_type = 3;
+ break;
+ default:
+ pr_err("runtime format invalid bitwidth: %d\n",
+ bit_depth);
+ break;
+ }
+ fifo_id = aml_frddr_get_fifo_id(fr);
+
+ pr_info("%s, frddr_index:%d, bit_depth:%d, frddr_type:%d\n",
+ __func__,
+ fr->fifo_id, bit_depth, frddr_type);
+
+ aml_frddr_set_format(fr,
+ runtime->channels,
+ bit_depth - 1,
+ frddr_type);
aml_frddr_select_dst(fr, dst);
aml_frddr_set_fifos(fr, 0x40, 0x20);
+
+ earctx_dmac_init(p_earc->tx_top_map, p_earc->tx_dmac_map);
+ earctx_dmac_set_format(p_earc->tx_dmac_map,
+ fr->fifo_id,
+ bit_depth - 1,
+ frddr_type);
+
+ /* check and set channel status info */
+ spdif_get_channel_status_info(&chsts, runtime->rate);
+ earctx_set_channel_status_info(p_earc->tx_dmac_map, &chsts);
} else {
struct toddr *to = p_earc->tddr;
unsigned int msb = 0, lsb = 0, toddr_type = 0;
unsigned int src = EARCRX_DMAC;
struct toddr_fmt fmt;
- enum attend_type type = earcrx_cmdc_get_attended_type();
+ enum attend_type type =
+ earcrx_cmdc_get_attended_type(p_earc->rx_cmdc_map);
if (type == ATNDTYP_DISCNCT) {
dev_err(p_earc->dev, "Neither eARC or ARC is attended!\n");
aml_toddr_set_format(to, &fmt);
aml_toddr_set_fifos(to, 0x40);
- earcrx_dmac_init();
- earcrx_arc_init();
+ earcrx_dmac_init(p_earc->rx_top_map, p_earc->rx_dmac_map);
+ earcrx_arc_init(p_earc->rx_dmac_map);
}
return 0;
dev_info(substream->pcm->card->dev, "eARC/ARC TX enable\n");
aml_frddr_enable(p_earc->fddr, true);
+ earctx_enable(p_earc->tx_top_map,
+ p_earc->tx_cmdc_map,
+ p_earc->tx_dmac_map,
+ true);
} else {
dev_info(substream->pcm->card->dev, "eARC/ARC RX enable\n");
aml_toddr_enable(p_earc->tddr, true);
-
- earcrx_enable(true);
+ earcrx_enable(p_earc->rx_cmdc_map,
+ p_earc->rx_dmac_map,
+ true);
}
break;
case SNDRV_PCM_TRIGGER_STOP:
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
dev_info(substream->pcm->card->dev, "eARC/ARC TX disable\n");
+ earctx_enable(p_earc->tx_top_map,
+ p_earc->tx_cmdc_map,
+ p_earc->tx_dmac_map,
+ false);
aml_frddr_enable(p_earc->fddr, false);
} else {
dev_info(substream->pcm->card->dev, "eARC/ARC RX disable\n");
- earcrx_enable(false);
-
+ earcrx_enable(p_earc->rx_cmdc_map,
+ p_earc->rx_dmac_map,
+ false);
aml_toddr_enable(p_earc->tddr, false);
}
break;
unsigned int rate = params_rate(params);
int ret = 0;
- pr_info("%s:rate:%d, tddr:%p\n",
- __func__,
- rate,
- p_earc->tddr);
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ int freq = rate * 128 * 5;
+
+ if (spdif_is_4x_clk()) {
+ pr_debug("set 4x audio clk for 958\n");
+ freq *= 4;
+ } else {
+ pr_debug("set normal 512 fs /4 fs\n");
+ }
+
+ clk_set_rate(p_earc->clk_tx_dmac_srcpll, freq * 4);
+ clk_set_rate(p_earc->clk_tx_dmac, freq);
+
+ pr_info("%s, tx dmac clk, set freq: %d, get freq:%lu\n",
+ __func__,
+ freq,
+ clk_get_rate(p_earc->clk_tx_dmac));
+ }
return ret;
}
struct earc *p_earc = snd_soc_dai_get_drvdata(cpu_dai);
pr_info("%s, %d, %d, %d\n",
- __func__, clk_id, freq, dir);
+ __func__, clk_id, freq, dir);
- clk_set_rate(p_earc->clk_rx_dmac, 500000000);
+ if (clk_id == 1) {
+ clk_set_rate(p_earc->clk_rx_dmac, 500000000);
- pr_info("earc rx cmdc clk:%lu rx dmac clk:%lu\n",
- clk_get_rate(p_earc->clk_rx_cmdc),
- clk_get_rate(p_earc->clk_rx_dmac));
+ pr_info("earc rx cmdc clk:%lu rx dmac clk:%lu\n",
+ clk_get_rate(p_earc->clk_rx_cmdc),
+ clk_get_rate(p_earc->clk_rx_dmac));
+ }
return 0;
}
pr_info("%s\n", __func__);
- /* rx dmac clk */
- if (!IS_ERR(p_earc->clk_rx_dmac)) {
- ret = clk_prepare_enable(p_earc->clk_rx_dmac);
- if (ret) {
- pr_err("Can't enable earc clk_rx_dmac: %d\n", ret);
- goto err;
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ /* tx dmac clk */
+ if (!IS_ERR(p_earc->clk_tx_dmac)) {
+ ret = clk_prepare_enable(p_earc->clk_tx_dmac);
+ if (ret) {
+ dev_err(p_earc->dev,
+ "Can't enable earc clk_tx_dmac: %d\n",
+ ret);
+ goto err;
+ }
+ p_earc->tx_dmac_clk_on = true;
}
- p_earc->rx_dmac_clk_on = true;
- }
-
- if (!IS_ERR(p_earc->clk_tx_cmdc)) {
- ret = clk_prepare_enable(p_earc->clk_tx_cmdc);
- if (ret) {
- pr_err("Can't enable earc clk_tx_cmdc: %d\n", ret);
- goto err;
+ if (!IS_ERR(p_earc->clk_tx_dmac_srcpll)) {
+ ret = clk_prepare_enable(p_earc->clk_tx_dmac_srcpll);
+ if (ret) {
+ dev_err(p_earc->dev,
+ "Can't enable earc clk_tx_dmac_srcpll:%d\n",
+ ret);
+ goto err;
+ }
+ }
+ } else {
+ /* rx dmac clk */
+ if (!IS_ERR(p_earc->clk_rx_dmac)) {
+ ret = clk_prepare_enable(p_earc->clk_rx_dmac);
+ if (ret) {
+ dev_err(p_earc->dev,
+ "Can't enable earc clk_rx_dmac: %d\n",
+ ret);
+ goto err;
+ }
+ p_earc->rx_dmac_clk_on = true;
}
- }
- /* tx dmac clk */
- if (!IS_ERR(p_earc->clk_tx_dmac)) {
- ret = clk_prepare_enable(p_earc->clk_tx_dmac);
- if (ret) {
- pr_err("Can't enable earc clk_tx_dmac: %d\n", ret);
- goto err;
+ if (!IS_ERR(p_earc->clk_rx_dmac_srcpll)) {
+ ret = clk_prepare_enable(p_earc->clk_rx_dmac_srcpll);
+ if (ret) {
+ dev_err(p_earc->dev,
+ "Can't enable earc clk_rx_dmac_srcpll: %d\n",
+ ret);
+ goto err;
+ }
}
}
{
struct earc *p_earc = snd_soc_dai_get_drvdata(cpu_dai);
- if (!IS_ERR(p_earc->clk_rx_dmac)) {
- clk_disable_unprepare(p_earc->clk_rx_dmac);
- p_earc->rx_dmac_clk_on = false;
- }
+ pr_info("%s\n", __func__);
- if (!IS_ERR(p_earc->clk_tx_cmdc))
- clk_disable_unprepare(p_earc->clk_tx_cmdc);
- if (!IS_ERR(p_earc->clk_tx_dmac))
- clk_disable_unprepare(p_earc->clk_tx_dmac);
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ if (!IS_ERR(p_earc->clk_tx_dmac)) {
+ clk_disable_unprepare(p_earc->clk_tx_dmac);
+ p_earc->tx_dmac_clk_on = false;
+ }
+ if (!IS_ERR(p_earc->clk_tx_dmac_srcpll))
+ clk_disable_unprepare(p_earc->clk_tx_dmac_srcpll);
+ } else {
+ if (!IS_ERR(p_earc->clk_rx_dmac)) {
+ clk_disable_unprepare(p_earc->clk_rx_dmac);
+ p_earc->rx_dmac_clk_on = false;
+ }
+ if (!IS_ERR(p_earc->clk_rx_dmac_srcpll))
+ clk_disable_unprepare(p_earc->clk_rx_dmac_srcpll);
+ }
}
static struct snd_soc_dai_ops earc_dai_ops = {
attended_type);
int earcrx_get_attend_type(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
+ struct snd_ctl_elem_value *ucontrol)
{
- ucontrol->value.integer.value[0] = earcrx_cmdc_get_attended_type();
+ struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
+ struct earc *p_earc = dev_get_drvdata(component->dev);
+ enum attend_type type =
+ earcrx_cmdc_get_attended_type(p_earc->rx_cmdc_map);
+
+ ucontrol->value.integer.value[0] = type;
return 0;
}
int earcrx_set_attend_type(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
+ struct snd_ctl_elem_value *ucontrol)
{
- enum cmdc_st state = earcrx_cmdc_get_state();
+ struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
+ struct earc *p_earc = dev_get_drvdata(component->dev);
+ enum cmdc_st state = earcrx_cmdc_get_state(p_earc->rx_cmdc_map);
if (state != CMDC_ST_IDLE2)
return 0;
- //ucontrol->value.integer.value[0];
/* only support set cmdc from idle to ARC */
return 0;
}
static int earcrx_arc_get_enable(
- struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
+ struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
{
- enum attend_type type = earcrx_cmdc_get_attended_type();
+ struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
+ struct earc *p_earc = dev_get_drvdata(component->dev);
+ enum attend_type type =
+ earcrx_cmdc_get_attended_type(p_earc->rx_cmdc_map);
ucontrol->value.integer.value[0] = (bool)(type == ATNDTYP_ARC);
}
static int earcrx_arc_set_enable(
- struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
+ struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
{
- earcrx_cmdc_arc_connect((bool)ucontrol->value.integer.value[0]);
+ struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
+ struct earc *p_earc = dev_get_drvdata(component->dev);
+
+ earcrx_cmdc_arc_connect(
+ p_earc->rx_cmdc_map,
+ (bool)ucontrol->value.integer.value[0]);
return 0;
}
static const struct snd_kcontrol_new earc_controls[] = {
SOC_ENUM_EXT("eARC_RX attended type",
- attended_type_enum,
- earcrx_get_attend_type,
- earcrx_set_attend_type),
+ attended_type_enum,
+ earcrx_get_attend_type,
+ earcrx_set_attend_type),
SOC_SINGLE_BOOL_EXT("HDMI ARC Switch",
- 0,
- earcrx_arc_get_enable,
- earcrx_arc_set_enable),
+ 0,
+ earcrx_arc_get_enable,
+ earcrx_arc_set_enable),
};
static const struct snd_soc_component_driver earc_component = {
void earc_hdmitx_hpdst(bool st)
{
+ struct earc *p_earc = s_earc;
+
+ if (!p_earc)
+ return;
+
pr_info("%s, %s\n",
__func__,
st ? "plugin" : "plugout");
/* ensure clock gate */
audiobus_update_bits(EE_AUDIO_CLK_GATE_EN1, 0x1 << 6, 0x1 << 6);
- earcrx_cmdc_hpd_detect(st);
+ earcrx_cmdc_hpd_detect(p_earc->rx_cmdc_map, st);
}
static int earcrx_cmdc_setup(struct earc *p_earc)
/* set cmdc clk */
audiobus_update_bits(EE_AUDIO_CLK_GATE_EN1, 0x1 << 6, 0x1 << 6);
if (!IS_ERR(p_earc->clk_rx_cmdc)) {
+ clk_set_rate(p_earc->clk_rx_cmdc, 10000000);
+
ret = clk_prepare_enable(p_earc->clk_rx_cmdc);
if (ret) {
pr_err("Can't enable earc clk_rx_cmdc: %d\n", ret);
return ret;
}
}
- p_earc->rx_cmdc_clk_on = true;
- clk_set_rate(p_earc->clk_rx_cmdc, 10000000);
/* rx cmdc init */
- earcrx_cmdc_init();
+ earcrx_cmdc_init(p_earc->rx_top_map);
/* Default: arc arc_initiated */
- earcrx_cmdc_arc_connect(true);
+ earcrx_cmdc_arc_connect(p_earc->rx_cmdc_map, true);
+
+ ret = devm_request_threaded_irq(p_earc->dev,
+ p_earc->irq_earc_rx,
+ NULL,
+ earc_rx_isr,
+ IRQF_TRIGGER_HIGH |
+ IRQF_ONESHOT,
+ "earc_rx",
+ p_earc);
+ if (ret) {
+ dev_err(p_earc->dev, "failed to claim earc_rx %u\n",
+ p_earc->irq_earc_rx);
+ return ret;
+ }
+
+ return ret;
+}
+
+static const unsigned int earctx_extcon[] = {
+ EXTCON_EARCTX_ATNDTYP_ARC,
+ EXTCON_EARCTX_ATNDTYP_EARC,
+ EXTCON_NONE,
+};
+
+static int earctx_extcon_register(struct earc *p_earc)
+{
+ int ret = 0;
+
+ /* earc or arc connect */
+ p_earc->tx_edev = devm_extcon_dev_allocate(p_earc->dev, earcrx_extcon);
+ if (IS_ERR(p_earc->tx_edev)) {
+ pr_err("failed to allocate earc extcon!!!\n");
+ ret = -ENOMEM;
+ return ret;
+ }
+ p_earc->tx_edev->dev.parent = p_earc->dev;
+ p_earc->tx_edev->name = "earctx";
+
+ dev_set_name(&p_earc->tx_edev->dev, "earctx");
+ ret = extcon_dev_register(p_earc->tx_edev);
+ if (ret < 0) {
+ pr_err("earc extcon failed to register!!\n");
+ return ret;
+ }
+
+ return ret;
+}
+
+void earc_hdmirx_hpdst(int earc_port, bool st)
+{
+ struct earc *p_earc = s_earc;
- /* register irq */
- ret = request_irq(p_earc->irq_earc_rx,
- earc_rx_isr, 0, "earc_rx",
- p_earc);
+ if (!p_earc)
+ return;
+
+ pr_info("%s, earc_port:%d %s\n",
+ __func__,
+ earc_port,
+ st ? "plugin" : "plugout");
+
+ earctx_cmdc_int_mask(p_earc->tx_top_map);
+ earctx_cmdc_arc_connect(p_earc->tx_cmdc_map, st);
+ earctx_cmdc_hpd_detect(p_earc->tx_top_map,
+ p_earc->tx_cmdc_map,
+ earc_port, st);
+}
+
+static int earctx_cmdc_setup(struct earc *p_earc)
+{
+ int ret = 0;
+
+ /* set cmdc clk */
+ audiobus_update_bits(EE_AUDIO_CLK_GATE_EN1, 0x1 << 5, 0x1 << 5);
+ if (!IS_ERR(p_earc->clk_tx_cmdc)) {
+ clk_set_rate(p_earc->clk_tx_cmdc, 10000000);
+
+ ret = clk_prepare_enable(p_earc->clk_tx_cmdc);
+ if (ret) {
+ pr_err("Can't enable earc clk_tx_cmdc: %d\n", ret);
+ return ret;
+ }
+ }
+
+ ret = devm_request_threaded_irq(p_earc->dev,
+ p_earc->irq_earc_tx,
+ NULL,
+ earc_tx_isr,
+ IRQF_TRIGGER_HIGH |
+ IRQF_ONESHOT,
+ "earc_tx",
+ p_earc);
if (ret) {
- dev_err(p_earc->dev, "failed to claim rx_dmac %u\n",
- p_earc->irq_earc_rx);
+ dev_err(p_earc->dev, "failed to claim earc_tx %u\n",
+ p_earc->irq_earc_tx);
return ret;
}
+ /* tx cmdc init */
+ earctx_cmdc_init(p_earc->tx_top_map);
+ /* Default: arc arc_initiated */
+ earctx_cmdc_arc_connect(p_earc->tx_cmdc_map, true);
+
return ret;
}
platform_get_drvdata(pdev_parent);
p_earc->actrl = actrl;
+ p_earc->tx_cmdc_map = regmap_resource(dev, "tx_cmdc");
+ if (!p_earc->tx_cmdc_map) {
+ dev_err(dev,
+ "Can't get earctx_cmdc regmap!!\n");
+ }
+ p_earc->tx_dmac_map = regmap_resource(dev, "tx_dmac");
+ if (!p_earc->tx_dmac_map) {
+ dev_err(dev,
+ "Can't get earctx_dmac regmap!!\n");
+ }
+ p_earc->tx_top_map = regmap_resource(dev, "tx_top");
+ if (!p_earc->tx_top_map) {
+ dev_err(dev,
+ "Can't get earctx_top regmap!!\n");
+ }
+
+ p_earc->rx_cmdc_map = regmap_resource(dev, "rx_cmdc");
+ if (!p_earc->rx_cmdc_map) {
+ dev_err(dev,
+ "Can't get earcrx_cdmc regmap!!\n");
+ }
+ p_earc->rx_dmac_map = regmap_resource(dev, "rx_dmac");
+ if (!p_earc->rx_dmac_map) {
+ dev_err(dev,
+ "Can't get earcrx_dmac regmap!!\n");
+ }
+ p_earc->rx_top_map = regmap_resource(dev, "rx_top");
+ if (!p_earc->rx_top_map) {
+ dev_err(dev,
+ "Can't get earcrx_top regmap!!\n");
+ }
+
/* clock gate */
p_earc->clk_rx_gate = devm_clk_get(&pdev->dev, "rx_gate");
if (IS_ERR(p_earc->clk_rx_gate)) {
if (p_earc->irq_earc_tx < 0)
dev_err(dev, "platform get irq earc_tx failed, Check whether support eARC TX\n");
+ pr_info("%s, irq_earc_rx:%d, irq_earc_tx:%d\n",
+ __func__, p_earc->irq_earc_rx, p_earc->irq_earc_tx);
+
ret = snd_soc_register_component(&pdev->dev,
&earc_component,
earc_dai,
return ret;
}
- earcrx_extcon_register(p_earc);
- earcrx_cmdc_setup(p_earc);
+ s_earc = p_earc;
+
+ /* RX */
+ if (p_earc->irq_earc_rx > 0) {
+ earcrx_extcon_register(p_earc);
+ earcrx_cmdc_setup(p_earc);
+ }
+
+ /* TX */
+ if (p_earc->irq_earc_tx > 0) {
+ earctx_extcon_register(p_earc);
+ earctx_cmdc_setup(p_earc);
+ }
pr_info("%s, register soc platform\n", __func__);
#include <linux/types.h>
#include <linux/kernel.h>
+#include <linux/amlogic/media/sound/spdif_info.h>
#include "earc_hw.h"
-
-void earcrx_cmdc_init(void)
+void earcrx_cmdc_init(struct regmap *top_map)
{
/* set irq mask */
- earcrx_top_write(EARCRX_CMDC_INT_MASK,
- (1 << 15) | /* idle2_int */
- (1 << 14) | /* idle1_int */
- (1 << 13) | /* disc2_int */
- (1 << 12) | /* disc1_int */
- (1 << 11) | /* earc_int */
- (1 << 10) | /* hb_status_int */
- (1 << 9) | /* losthb_int */
- (1 << 8) | /* timeout_int */
- (0 << 7) | /* status_ch_int */
- (0 << 6) | /* int_rec_invalid_id */
- (0 << 5) | /* int_rec_invalid_offset */
- (0 << 4) | /* int_rec_unexp */
- (0 << 3) | /* int_rec_ecc_err */
- (0 << 2) | /* int_rec_parity_err */
- (0 << 1) | /* int_recv_packet */
- (0 << 0) /* int_rec_time_out */
- );
-
- earcrx_top_write(EARCRX_ANA_CTRL0,
- 0x1 << 31 | /* earcrx_en_d2a */
- 0x10 << 24 | /* earcrx_cmdcrx_reftrim */
- 0x8 << 20 | /* earcrx_idr_trim */
- 0x10 << 15 | /* earcrx_rterm_trim */
- 0x4 << 12 | /* earcrx_cmdctx_ack_hystrim */
- 0x10 << 7 | /* earcrx_cmdctx_ack_reftrim */
- 0x1 << 4 | /* earcrx_cmdcrx_rcfilter_sel */
- 0x4 << 0 /* earcrx_cmdcrx_hystrim */
- );
-
- earcrx_top_write(EARCRX_PLL_CTRL3,
- 0x2 << 20 | /* earcrx_pll_bias_adj */
- 0x4 << 16 | /* earcrx_pll_rou */
- 0x1 << 13 /* earcrx_pll_dco_sdm_e */
- );
-
- earcrx_top_write(EARCRX_PLL_CTRL0,
- 0x1 << 28 | /* earcrx_pll_en */
- 0x1 << 23 | /* earcrx_pll_dmacrx_sqout_rstn_sel */
- 0x1 << 10 /* earcrx_pll_n */
- );
+ mmio_write(top_map, EARCRX_CMDC_INT_MASK,
+ (1 << 15) | /* idle2_int */
+ (1 << 14) | /* idle1_int */
+ (1 << 13) | /* disc2_int */
+ (1 << 12) | /* disc1_int */
+ (1 << 11) | /* earc_int */
+ (1 << 10) | /* hb_status_int */
+ (1 << 9) | /* losthb_int */
+ (1 << 8) | /* timeout_int */
+ (0 << 7) | /* status_ch_int */
+ (0 << 6) | /* int_rec_invalid_id */
+ (0 << 5) | /* int_rec_invalid_offset */
+ (0 << 4) | /* int_rec_unexp */
+ (0 << 3) | /* int_rec_ecc_err */
+ (0 << 2) | /* int_rec_parity_err */
+ (0 << 1) | /* int_recv_packet */
+ (0 << 0) /* int_rec_time_out */
+ );
+
+ mmio_write(top_map, EARCRX_ANA_CTRL0,
+ 0x1 << 31 | /* earcrx_en_d2a */
+ 0x10 << 24 | /* earcrx_cmdcrx_reftrim */
+ 0x8 << 20 | /* earcrx_idr_trim */
+ 0x10 << 15 | /* earcrx_rterm_trim */
+ 0x4 << 12 | /* earcrx_cmdctx_ack_hystrim */
+ 0x10 << 7 | /* earcrx_cmdctx_ack_reftrim */
+ 0x1 << 4 | /* earcrx_cmdcrx_rcfilter_sel */
+ 0x4 << 0 /* earcrx_cmdcrx_hystrim */
+ );
+
+ mmio_write(top_map, EARCRX_PLL_CTRL3,
+ 0x2 << 20 | /* earcrx_pll_bias_adj */
+ 0x4 << 16 | /* earcrx_pll_rou */
+ 0x1 << 13 /* earcrx_pll_dco_sdm_e */
+ );
+
+ mmio_write(top_map, EARCRX_PLL_CTRL0,
+ 0x1 << 28 | /* earcrx_pll_en */
+ 0x1 << 23 | /* earcrx_pll_dmacrx_sqout_rstn_sel */
+ 0x1 << 10 /* earcrx_pll_n */
+ );
}
-void earcrx_cmdc_arc_connect(bool init)
+void earcrx_cmdc_arc_connect(struct regmap *cmdc_map, bool init)
{
if (init)
- earcrx_cmdc_update_bits(
- EARC_RX_CMDC_VSM_CTRL0,
- 0x7 << 25,
- 0x1 << 27 | /* arc_initiated */
- 0x0 << 26 | /* arc_terminated */
- 0x1 << 25 /* arc_enable */
- );
+ mmio_update_bits(cmdc_map,
+ EARC_RX_CMDC_VSM_CTRL0,
+ 0x7 << 25,
+ 0x1 << 27 | /* arc_initiated */
+ 0x0 << 26 | /* arc_terminated */
+ 0x1 << 25 /* arc_enable */
+ );
else
- earcrx_cmdc_update_bits(
- EARC_RX_CMDC_VSM_CTRL0,
- 0x7 << 25,
- 0x0 << 27 | /* arc_initiated */
- 0x1 << 26 | /* arc_terminated */
- 0x0 << 25 /* arc_enable */
- );
+ mmio_update_bits(cmdc_map,
+ EARC_RX_CMDC_VSM_CTRL0,
+ 0x7 << 25,
+ 0x0 << 27 | /* arc_initiated */
+ 0x1 << 26 | /* arc_terminated */
+ 0x0 << 25 /* arc_enable */
+ );
}
-void earcrx_cmdc_hpd_detect(bool st)
+void earcrx_cmdc_hpd_detect(struct regmap *cmdc_map, bool st)
{
if (st) {
- earcrx_cmdc_update_bits(
- EARC_RX_CMDC_VSM_CTRL0,
- 0x1 << 19,
- 0x1 << 19 /* comma_cnt_rst */
- );
-
- earcrx_cmdc_update_bits(
- EARC_RX_CMDC_VSM_CTRL0,
- 0x1 << 19 | 0xff << 0,
- 0x1 << 19 | /* comma_cnt_rst */
- 0xff << 0
- );
+ mmio_update_bits(cmdc_map,
+ EARC_RX_CMDC_VSM_CTRL0,
+ 0x1 << 19,
+ 0x1 << 19 /* comma_cnt_rst */
+ );
+
+ mmio_update_bits(cmdc_map,
+ EARC_RX_CMDC_VSM_CTRL0,
+ 0x1 << 19 | 0xff << 0,
+ 0x1 << 19 | /* comma_cnt_rst */
+ 0xff << 0
+ );
} else {
/* soft reset */
- earcrx_cmdc_update_bits(
- EARC_RX_CMDC_TOP_CTRL1,
- 0xf << 1,
- 0xf << 1);
- earcrx_cmdc_update_bits(
- EARC_RX_CMDC_TOP_CTRL1,
- 0xf << 1,
- 0x0 << 1);
+ mmio_update_bits(cmdc_map,
+ EARC_RX_CMDC_TOP_CTRL1,
+ 0xf << 0,
+ 0xf << 0);
+ mmio_update_bits(cmdc_map,
+ EARC_RX_CMDC_TOP_CTRL1,
+ 0xf << 0,
+ 0x0 << 0);
}
}
-void earcrx_dmac_init(void)
+void earcrx_dmac_init(struct regmap *top_map, struct regmap *dmac_map)
{
- earcrx_top_write(EARCRX_DMAC_INT_MASK,
- (0x0 << 17) | /* earcrx_ana_rst c_new_format_set */
- (0x0 << 16) | /* earcrx_ana_rst c_earcrx_div2_hold_set */
- (0x0 << 15) | /* earcrx_err_correct c_bcherr_int_set */
- (0x0 << 14) | /* earcrx_err_correct r_afifo_overflow_set */
- (0x0 << 13) | /* earcrx_err_correct r_fifo_overflow_set */
- (0x0 << 12) | /* earcrx_user_bit_check r_fifo_overflow */
- (0x0 << 11) | /* earcrx_user_bit_check c_fifo_thd_pass */
- (0x0 << 10) | /* earcrx_user_bit_check c_u_pk_lost_int_set */
- (0x0 << 9) | /* arcrx_user_bit_check c_iu_pk_end */
- (0x0 << 8) | /* arcrx_biphase_decode c_chst_mute_clr */
- (0x1 << 7) | /* arcrx_biphase_decode c_find_papb */
- (0x1 << 6) | /* arcrx_biphase_decode c_valid_change */
- (0x1 << 5) | /* arcrx_biphase_decode c_find_nonpcm2pcm */
- (0x1 << 4) | /* arcrx_biphase_decode c_pcpd_change */
- (0x1 << 3) | /* arcrx_biphase_decode c_ch_status_change */
- (0x1 << 2) | /* arcrx_biphase_decode sample_mod_change */
- (0x1 << 1) | /* arcrx_biphase_decode r_parity_err */
- (0x0 << 0) /* arcrx_dmac_sync afifo_overflow */
- );
-
- earcrx_dmac_write(EARCRX_DMAC_SYNC_CTRL0,
- (1 << 16) | /* reg_ana_buf_data_sel_en */
- (3 << 12) | /* reg_ana_buf_data_sel */
- (7 << 8) | /* reg_ana_clr_cnt */
- (7 << 4) /* reg_ana_set_cnt */
- );
- earcrx_dmac_write(EARCRX_DMAC_UBIT_CTRL0,
- (47 << 16) | /* reg_fifo_thd */
- (1 << 12) | /* reg_user_lr */
- (29 << 0) /* reg_data_bit */
- );
- earcrx_dmac_write(EARCRX_ANA_RST_CTRL0, 1 << 31);
+ mmio_write(top_map, EARCRX_DMAC_INT_MASK,
+ (0x0 << 17) | /* earcrx_ana_rst c_new_format_set */
+ (0x0 << 16) | /* earcrx_ana_rst c_earcrx_div2_hold_set */
+ (0x0 << 15) | /* earcrx_err_correct c_bcherr_int_set */
+ (0x0 << 14) | /* earcrx_err_correct r_afifo_overflow_set */
+ (0x0 << 13) | /* earcrx_err_correct r_fifo_overflow_set */
+ (0x0 << 12) | /* earcrx_user_bit_check r_fifo_overflow */
+ (0x0 << 11) | /* earcrx_user_bit_check c_fifo_thd_pass */
+ (0x0 << 10) | /* earcrx_user_bit_check c_u_pk_lost_int_set */
+ (0x0 << 9) | /* arcrx_user_bit_check c_iu_pk_end */
+ (0x0 << 8) | /* arcrx_biphase_decode c_chst_mute_clr */
+ (0x1 << 7) | /* arcrx_biphase_decode c_find_papb */
+ (0x1 << 6) | /* arcrx_biphase_decode c_valid_change */
+ (0x1 << 5) | /* arcrx_biphase_decode c_find_nonpcm2pcm */
+ (0x1 << 4) | /* arcrx_biphase_decode c_pcpd_change */
+ (0x1 << 3) | /* arcrx_biphase_decode c_ch_status_change */
+ (0x1 << 2) | /* arcrx_biphase_decode sample_mod_change */
+ (0x1 << 1) | /* arcrx_biphase_decode r_parity_err */
+ (0x0 << 0) /* arcrx_dmac_sync afifo_overflow */
+ );
+
+ mmio_write(dmac_map, EARCRX_DMAC_SYNC_CTRL0,
+ (1 << 16) | /* reg_ana_buf_data_sel_en */
+ (3 << 12) | /* reg_ana_buf_data_sel */
+ (7 << 8) | /* reg_ana_clr_cnt */
+ (7 << 4) /* reg_ana_set_cnt */
+ );
+ mmio_write(dmac_map, EARCRX_DMAC_UBIT_CTRL0,
+ (47 << 16) | /* reg_fifo_thd */
+ (1 << 12) | /* reg_user_lr */
+ (29 << 0) /* reg_data_bit */
+ );
+ mmio_write(dmac_map, EARCRX_ANA_RST_CTRL0, 1 << 31);
}
-void earcrx_arc_init(void)
+void earcrx_arc_init(struct regmap *dmac_map)
{
unsigned int spdifin_clk = 500000000;
unsigned int mode5_timer = (counter_176k >> 1);
unsigned int mode6_timer = (counter_192k >> 1);
- earcrx_dmac_write(
- EARCRX_SPDIFIN_SAMPLE_CTRL0,
- 0x0 << 28 | /* detect by max_width */
- (spdifin_clk / 10000) << 0 /* base timer */
- );
-
- earcrx_dmac_write(
- EARCRX_SPDIFIN_SAMPLE_CTRL1,
- mode0_th << 20 |
- mode1_th << 10 |
- mode2_th << 0);
-
- earcrx_dmac_write(
- EARCRX_SPDIFIN_SAMPLE_CTRL2,
- mode3_th << 20 |
- mode4_th << 10 |
- mode5_th << 0);
-
- earcrx_dmac_write(
- EARCRX_SPDIFIN_SAMPLE_CTRL3,
- (mode0_timer << 24) |
- (mode1_timer << 16) |
- (mode2_timer << 8) |
- (mode3_timer << 0)
- );
-
- earcrx_dmac_write(
- EARCRX_SPDIFIN_SAMPLE_CTRL4,
- (mode4_timer << 24) |
- (mode5_timer << 16) |
- (mode6_timer << 8)
- );
-
-
- earcrx_dmac_write(EARCRX_SPDIFIN_CTRL0,
- 0x1 << 31 | /* reg_work_en */
- 0x1 << 30 | /* reg_chnum_sel */
- 0x1 << 25 | /* reg_findpapb_en */
- 0x1 << 24 | /* nonpcm2pcm_th enable */
- 0xFFF<<12 /* reg_nonpcm2pcm_th */
- );
- earcrx_dmac_write(EARCRX_SPDIFIN_CTRL2,
- (1 << 14) | /* reg_earc_auto */
- (1 << 13) /* reg_earcin_papb_lr */
- );
- earcrx_dmac_write(EARCRX_SPDIFIN_CTRL3,
- (0xEC37<<16) | /* reg_earc_pa_value */
- (0x5A5A<<0) /* reg_earc_pb_value */
- );
+ mmio_write(dmac_map,
+ EARCRX_SPDIFIN_SAMPLE_CTRL0,
+ 0x0 << 28 | /* detect by max_width */
+ (spdifin_clk / 10000) << 0 /* base timer */
+ );
+
+ mmio_write(dmac_map,
+ EARCRX_SPDIFIN_SAMPLE_CTRL1,
+ mode0_th << 20 |
+ mode1_th << 10 |
+ mode2_th << 0);
+
+ mmio_write(dmac_map,
+ EARCRX_SPDIFIN_SAMPLE_CTRL2,
+ mode3_th << 20 |
+ mode4_th << 10 |
+ mode5_th << 0);
+
+ mmio_write(dmac_map,
+ EARCRX_SPDIFIN_SAMPLE_CTRL3,
+ (mode0_timer << 24) |
+ (mode1_timer << 16) |
+ (mode2_timer << 8) |
+ (mode3_timer << 0)
+ );
+
+ mmio_write(dmac_map,
+ EARCRX_SPDIFIN_SAMPLE_CTRL4,
+ (mode4_timer << 24) |
+ (mode5_timer << 16) |
+ (mode6_timer << 8)
+ );
+
+ mmio_write(dmac_map,
+ EARCRX_SPDIFIN_CTRL0,
+ 0x1 << 31 | /* reg_work_en */
+ 0x1 << 30 | /* reg_chnum_sel */
+ 0x1 << 25 | /* reg_findpapb_en */
+ 0x1 << 24 | /* nonpcm2pcm_th enable */
+ 0xFFF << 12 /* reg_nonpcm2pcm_th */
+ );
+ mmio_write(dmac_map,
+ EARCRX_SPDIFIN_CTRL2,
+ (1 << 14) | /* reg_earc_auto */
+ (1 << 13) /* reg_earcin_papb_lr */
+ );
+ mmio_write(dmac_map,
+ EARCRX_SPDIFIN_CTRL3,
+ (0xEC37 << 16) | /* reg_earc_pa_value */
+ (0x5A5A << 0) /* reg_earc_pb_value */
+ );
}
-enum cmdc_st earcrx_cmdc_get_state(void)
+enum cmdc_st earcrx_cmdc_get_state(struct regmap *cmdc_map)
{
- int val = earcrx_cmdc_read(EARC_RX_CMDC_STATUS0);
+ int val = mmio_read(cmdc_map, EARC_RX_CMDC_STATUS0);
enum cmdc_st state = (enum cmdc_st)(val & 0x7);
return state;
}
-enum attend_type earcrx_cmdc_get_attended_type(void)
+enum attend_type earcrx_cmdc_get_attended_type(struct regmap *cmdc_map)
{
- int val = earcrx_cmdc_read(EARC_RX_CMDC_STATUS0);
+ int val = mmio_read(cmdc_map, EARC_RX_CMDC_STATUS0);
enum cmdc_st state = (enum cmdc_st)(val & 0x7);
enum attend_type type = ATNDTYP_DISCNCT;
if ((val & (1 << 0x3)) && (state == CMDC_ST_ARC))
type = ATNDTYP_ARC;
else if ((val & (1 << 0x4)) && (state == CMDC_ST_EARC))
- type = ATNDTYP_eARC;
+ type = ATNDTYP_EARC;
return type;
}
-void earcrx_cdmc_clr_irqs(int clr)
+void earcrx_cdmc_clr_irqs(struct regmap *top_map, int clr)
{
- earcrx_top_write(EARCRX_CMDC_INT_PENDING, clr);
+ mmio_write(top_map, EARCRX_CMDC_INT_PENDING, clr);
}
-int earcrx_cdmc_get_irqs(void)
+int earcrx_cdmc_get_irqs(struct regmap *top_map)
{
- return earcrx_top_read(EARCRX_CMDC_INT_PENDING);
+ return mmio_read(top_map, EARCRX_CMDC_INT_PENDING);
}
-void earcrx_dmac_clr_irqs(int clr)
+void earcrx_dmac_clr_irqs(struct regmap *top_map, int clr)
{
- earcrx_top_write(EARCRX_DMAC_INT_PENDING, clr);
+ mmio_write(top_map, EARCRX_DMAC_INT_PENDING, clr);
}
-int earcrx_dmac_get_irqs(void)
+int earcrx_dmac_get_irqs(struct regmap *top_map)
{
- return earcrx_top_read(EARCRX_DMAC_INT_PENDING);
+ return mmio_read(top_map, EARCRX_DMAC_INT_PENDING);
}
-void earcrx_enable(bool enable)
+void earcrx_enable(struct regmap *cmdc_map,
+ struct regmap *dmac_map, bool enable)
{
- enum attend_type type = earcrx_cmdc_get_attended_type();
+ enum attend_type type = earcrx_cmdc_get_attended_type(cmdc_map);
if (enable) {
- earcrx_dmac_update_bits(EARCRX_DMAC_SYNC_CTRL0,
- 1 << 30, /* reg_rst_afifo_out_n */
- 1 << 30);
-
- earcrx_dmac_update_bits(EARCRX_DMAC_SYNC_CTRL0,
- 1 << 29, /* reg_rst_afifo_in_n */
- 0x1 << 29);
-
- earcrx_dmac_update_bits(EARCRX_ERR_CORRECT_CTRL0,
- 1 << 29, /* reg_rst_afifo_out_n */
- 1 << 29
- );
- earcrx_dmac_update_bits(EARCRX_ERR_CORRECT_CTRL0,
- 1 << 28, /* reg_rst_afifo_in_n */
- 1 << 28 /* reg_rst_afifo_in_n */
- );
+ mmio_update_bits(dmac_map, EARCRX_DMAC_SYNC_CTRL0,
+ 1 << 30, /* reg_rst_afifo_out_n */
+ 1 << 30);
+
+ mmio_update_bits(dmac_map, EARCRX_DMAC_SYNC_CTRL0,
+ 1 << 29, /* reg_rst_afifo_in_n */
+ 0x1 << 29);
+
+ mmio_update_bits(dmac_map, EARCRX_ERR_CORRECT_CTRL0,
+ 1 << 29, /* reg_rst_afifo_out_n */
+ 1 << 29
+ );
+ mmio_update_bits(dmac_map, EARCRX_ERR_CORRECT_CTRL0,
+ 1 << 28, /* reg_rst_afifo_in_n */
+ 1 << 28 /* reg_rst_afifo_in_n */
+ );
} else {
- earcrx_dmac_update_bits(EARCRX_DMAC_SYNC_CTRL0,
- 0x3 << 29,
- 0x0 << 29);
+ mmio_update_bits(dmac_map, EARCRX_DMAC_SYNC_CTRL0,
+ 0x3 << 29,
+ 0x0 << 29);
- earcrx_dmac_update_bits(EARCRX_ERR_CORRECT_CTRL0,
- 0x3 << 28, 0x0 << 28);
+ mmio_update_bits(dmac_map, EARCRX_ERR_CORRECT_CTRL0,
+ 0x3 << 28, 0x0 << 28);
}
- if (type == ATNDTYP_eARC)
- earcrx_dmac_update_bits(EARCRX_DMAC_SYNC_CTRL0,
- 1 << 31, /* reg_work_en */
- enable << 31);
+ if (type == ATNDTYP_EARC)
+ mmio_update_bits(dmac_map, EARCRX_DMAC_SYNC_CTRL0,
+ 1 << 31, /* reg_work_en */
+ enable << 31);
else if (type == ATNDTYP_ARC) {
- earcrx_dmac_update_bits(
- EARCRX_SPDIFIN_SAMPLE_CTRL0,
- 0x1 << 31, /* reg_work_enable */
- enable << 31);
+ mmio_update_bits(dmac_map,
+ EARCRX_SPDIFIN_SAMPLE_CTRL0,
+ 0x1 << 31, /* reg_work_enable */
+ enable << 31);
+
+ mmio_write(dmac_map, EARCRX_DMAC_SYNC_CTRL0, 0x0);
+ }
+
+ mmio_update_bits(dmac_map, EARCRX_DMAC_UBIT_CTRL0,
+ 1 << 31, /* reg_work_enable */
+ enable << 31);
+
+ mmio_update_bits(dmac_map, EARCRX_ERR_CORRECT_CTRL0,
+ 1 << 31,
+ enable << 31); /* reg_work_en */
+
+ mmio_update_bits(dmac_map, EARCRX_DMAC_TOP_CTRL0,
+ 1 << 31,
+ enable << 31); /* reg_top_work_en */
+}
+
+void earctx_cmdc_int_mask(struct regmap *top_map)
+{
+ mmio_write(top_map, EARCTX_CMDC_INT_MASK,
+ (0x0 << 17) | /* hpd_high_int */
+ (0x0 << 16) | /* hpd_low_int */
+ (0x1 << 15) | /* idle2_int */
+ (0x1 << 14) | /* idle1_int */
+ (0x1 << 13) | /* disc2_int */
+ (0x1 << 12) | /* disc1_int */
+ (0x1 << 11) | /* earc_int */
+ (0x0 << 10) | /* hb_status_int */
+ (0x1 << 9) | /* losthb_int */
+ (0x1 << 8) | /* timeout_int */
+ (0x0 << 7) | /* status_ch_int */
+ (0x0 << 6) | /* int_recv_finished */
+ (0x0 << 5) | /* int_recv_nack */
+ (0x0 << 4) | /* int_recv_norsp */
+ (0x0 << 3) | /* int_recv_unexp */
+ (0x0 << 2) | /* int_recv_data */
+ (0x0 << 1) | /* int_recv_ack */
+ (0x0 << 0) /* int_recv_ecc_err */
+ );
+}
+
+void earctx_cmdc_init(struct regmap *top_map)
+{
+ /* ana */
+ mmio_write(top_map, EARCTX_ANA_CTRL0,
+ 0x1 << 31 | /* earctx_en_d2a */
+ 0x1 << 28 | /* earctx_cmdcrx_rcfilter_sel */
+ 0x4 << 26 | /* earctx_cmdcrx_hystrim */
+ 0x8 << 20 | /* earctx_idr_trim */
+ 0x10 << 12 | /* earctx_rterm_trim */
+ 0x4 << 8 | /* earctx_dmac_slew_con */
+ 0x4 << 5 | /* earctx_cmdctx_ack_hystrim */
+ 0x10 << 0 /* earctx_cmdctx_ack_reftrim */
+ );
+}
+
+void earctx_cmdc_arc_connect(struct regmap *cmdc_map, bool init)
+{
+ if (init)
+ mmio_update_bits(cmdc_map,
+ EARC_TX_CMDC_VSM_CTRL0,
+ 0x7 << 25,
+ 0x1 << 27 | /* arc_initiated */
+ 0x0 << 26 | /* arc_terminated */
+ 0x1 << 25 /* arc_enable */
+ );
+ else
+ mmio_update_bits(cmdc_map,
+ EARC_TX_CMDC_VSM_CTRL0,
+ 0x7 << 25,
+ 0x0 << 27 | /* arc_initiated */
+ 0x1 << 26 | /* arc_terminated */
+ 0x0 << 25 /* arc_enable */
+ );
+}
- earcrx_dmac_write(EARCRX_DMAC_SYNC_CTRL0, 0x0);
+void earctx_cmdc_hpd_detect(struct regmap *top_map,
+ struct regmap *cmdc_map,
+ int earc_port, bool st)
+{
+ /* select hdmirx_hpd */
+ mmio_update_bits(cmdc_map,
+ EARC_TX_CMDC_VSM_CTRL1,
+ 0x1 << 8, /* cntl_hpd_sel */
+ 0x1 << 8);
+
+ /* select hdmi_hpd mux */
+ mmio_update_bits(top_map, EARCTX_TOP_CTRL0,
+ 0xf << 8,
+ 0x1 << 11 | /* hdmi_hpd invent */
+ earc_port << 8 /* hdmi_hpd mux, port 0/1/2 */
+ );
+
+ if (st) {
+ mmio_update_bits(cmdc_map,
+ EARC_TX_CMDC_VSM_CTRL0,
+ 0x1 << 19,
+ 0x1 << 19 /* comma_cnt_rst */
+ );
+
+ mmio_update_bits(cmdc_map,
+ EARC_TX_CMDC_VSM_CTRL0,
+ 0x1 << 19 | 0xf << 20,
+ 0x0 << 19 | /* comma_cnt_rst */
+ 0x3 << 20 | 0x3 << 22
+ );
+
+ /* no timeout */
+ mmio_update_bits(cmdc_map,
+ EARC_TX_CMDC_VSM_CTRL5,
+ 0x3 << 0,
+ 0x1 << 1
+ );
+
+ mmio_update_bits(cmdc_map,
+ EARC_TX_CMDC_VSM_CTRL1,
+ 0xff << 0,
+ 0xa << 0 /* comma_cnt_th */
+ );
+ } else {
+ /* soft reset */
+ mmio_update_bits(cmdc_map,
+ EARC_TX_CMDC_TOP_CTRL1,
+ 0xf << 0,
+ 0xf << 0);
+ mmio_update_bits(cmdc_map,
+ EARC_TX_CMDC_TOP_CTRL1,
+ 0xf << 0,
+ 0x0 << 0);
}
+}
+
+void earctx_dmac_init(struct regmap *top_map, struct regmap *dmac_map)
+{
+ mmio_update_bits(dmac_map, EARCTX_SPDIFOUT_CTRL0,
+ 0x3 << 28,
+ 0x0 << 28);
+ mmio_update_bits(dmac_map, EARCTX_SPDIFOUT_CTRL0,
+ 0x1 << 29, /* afifo out reset */
+ 0x1 << 29);
+ mmio_update_bits(dmac_map, EARCTX_SPDIFOUT_CTRL0,
+ 0x1 << 28 | /* afifo in reset */
+ 0x1 << 26 | /* user Bit select */
+ 0x1 << 24 | /* chdata select*/
+ 0x1 << 20 | /* reg_data_sel, 1: data from 27bit */
+ 0x1 << 19 | /* 0: lsb first */
+ 0x1 << 18 | /* biphase encode valid Bit value sel */
+ 0xff << 4, /* lane mask */
+ 0x1 << 28 |
+ 0x1 << 26 |
+ 0x1 << 24 |
+ 0x1 << 20 |
+ 0x0 << 19 |
+ 0x1 << 18 |
+ 0x3 << 4 // ODO: lane 0 now
+ );
+
+ mmio_update_bits(dmac_map, EARCTX_ERR_CORRT_CTRL0,
+ 0x1 << 16 | /* reg_ubit_fifo_init_n */
+ 0x7 << 8 | /* r channel select */
+ 0x7 << 4, /* l channel select */
+ 0x1 << 16 |
+ 0x1 << 8 |
+ 0x0 << 4);
+
+ mmio_update_bits(dmac_map, EARCTX_ERR_CORRT_CTRL4,
+ 0xf << 17,
+ 0x1 << 19 | /* userBit sel, 1: reg_value */
+ 0x1 << 18 | /* validBit sel, 1: reg_value */
+ 0x1 << 17 /* reg_chst_sel, 1: reg_value */
+ );
+}
+
+void earctx_dmac_set_format(struct regmap *dmac_map,
+ int frddr_idx, int msb, int frddr_type)
+{
+ mmio_update_bits(dmac_map, EARCTX_SPDIFOUT_CTRL1,
+ 0x7 << 24 | /* frddr src */
+ 0xff << 16 | /* waiting count after enabled */
+ 0x1f << 8 | /* msb position */
+ 0x7 << 4, /* frddr type */
+ frddr_idx << 24 |
+ 0x40 << 16 |
+ msb << 8 |
+ frddr_type << 4);
+
+ mmio_update_bits(dmac_map, EARCTX_ERR_CORRT_CTRL4,
+ 0x1f << 25,
+ 0x1f << 25 /* msb */
+ );
+
+ /* for raw data */
+ mmio_update_bits(dmac_map, EARCTX_ERR_CORRT_CTRL3,
+ 0x1f << 24,
+ 0x17 << 24
+ );
+}
+
+void earctx_set_channel_status_info(struct regmap *dmac_map,
+ struct iec958_chsts *chsts)
+{
+ /* ch status = reg_chsts0~B */
+
+ /* L Channel */
+ mmio_write(dmac_map, EARCTX_SPDIFOUT_CHSTS0,
+ ((chsts->chstat1_l >> 8) & 0xf) << 24 | chsts->chstat0_l);
+
+ /* R Channel */
+ mmio_write(dmac_map, EARCTX_SPDIFOUT_CHSTS6,
+ ((chsts->chstat1_r >> 8) & 0xf) << 24 | chsts->chstat0_r);
+}
+
+enum attend_type earctx_cmdc_get_attended_type(struct regmap *cmdc_map)
+{
+ int val = mmio_read(cmdc_map, EARC_TX_CMDC_STATUS0);
+ enum cmdc_st state = (enum cmdc_st)(val & 0x7);
+ enum attend_type tx_type = ATNDTYP_DISCNCT;
- earcrx_dmac_update_bits(EARCRX_DMAC_UBIT_CTRL0,
- 1 << 31, /* reg_work_enable */
- enable << 31);
+ if ((val & (1 << 0x3)) && (state == CMDC_ST_ARC))
+ tx_type = ATNDTYP_ARC;
+ else if ((val & (1 << 0x4)) && (state == CMDC_ST_EARC))
+ tx_type = ATNDTYP_EARC;
+
+ return tx_type;
+}
+
+void earctx_cdmc_clr_irqs(struct regmap *top_map, int clr)
+{
+ mmio_write(top_map, EARCTX_CMDC_INT_PENDING, clr);
+}
+
+int earctx_cdmc_get_irqs(struct regmap *top_map)
+{
+ return mmio_read(top_map, EARCTX_CMDC_INT_PENDING);
+}
- earcrx_dmac_update_bits(EARCRX_ERR_CORRECT_CTRL0,
- 1 << 31,
- enable << 31); /* reg_work_en */
+void earctx_dmac_clr_irqs(struct regmap *top_map, int clr)
+{
+ mmio_write(top_map, EARCTX_DMAC_INT_PENDING, clr);
+}
- earcrx_dmac_update_bits(EARCRX_DMAC_TOP_CTRL0,
- 1 << 31,
- enable << 31); /* reg_top_work_en */
+int earctx_dmac_get_irqs(struct regmap *top_map)
+{
+ return mmio_read(top_map, EARCTX_DMAC_INT_PENDING);
+}
+
+void earctx_enable(struct regmap *top_map,
+ struct regmap *cmdc_map,
+ struct regmap *dmac_map,
+ bool enable)
+{
+ mmio_update_bits(dmac_map, EARCTX_SPDIFOUT_CTRL0,
+ 0x1 << 31,
+ enable << 31);
+
+ mmio_update_bits(dmac_map, EARC_RX_CMDC_BIPHASE_CTRL1,
+ 0x1 << 30,
+ enable << 30);
+
+ if (enable)
+ mmio_write(top_map, EARCTX_DMAC_INT_MASK,
+ (0x1 << 4) | /* fe_modulation c_hold_clr */
+ (0x1 << 3) | /* fe_modulation c_hold_start */
+ (0x1 << 2) | /* err_correct c_fifo_thd_less_pass */
+ (0x1 << 1) | /* err_correct r_fifo_overflow_set */
+ (0x1 << 0) /* err_correct c_fifo_empty_set */
+ );
+ else
+ mmio_write(top_map, EARCTX_DMAC_INT_MASK,
+ 0x0
+ );
+
+ if (earctx_cmdc_get_attended_type(cmdc_map) == ATNDTYP_EARC) {
+ if (spdifout_is_raw()) {
+ mmio_update_bits(dmac_map, EARCTX_ERR_CORRT_CTRL3,
+ 0x1 << 29,
+ enable << 29);
+ }
+ mmio_update_bits(dmac_map, EARCTX_FE_CTRL0,
+ 0x1 << 30,
+ enable << 30);
+ }
}
#include "regs.h"
#include "iomap.h"
+#include <linux/amlogic/media/sound/iomapres.h>
+#include <linux/amlogic/media/sound/spdif_info.h>
#define INT_EARCRX_CMDC_IDLE2 (0x1 << 15)
#define INT_EARCRX_CMDC_IDLE1 (0x1 << 14)
#define INT_ARCRX_BIPHASE_DECODE_R_PARITY_ERR (0x1 << 1)
#define INT_ARCRX_DMAC_SYNC_AFIFO_OVERFLOW (0x1 << 0)
+#define INT_EARCTX_CMDC_HPD_H (0x1 << 17)
+#define INT_EARCTX_CMDC_HPD_L (0x1 << 16)
+#define INT_EARCTX_CMDC_IDLE2 (0x1 << 15)
+#define INT_EARCTX_CMDC_IDLE1 (0x1 << 14)
+#define INT_EARCTX_CMDC_DISC2 (0x1 << 13)
+#define INT_EARCTX_CMDC_DISC1 (0x1 << 12)
+#define INT_EARCTX_CMDC_EARC (0x1 << 11)
+#define INT_EARCTX_CMDC_HB_STATUS (0x1 << 10)
+#define INT_EARCTX_CMDC_LOSTHB (0x1 << 9)
+#define INT_EARCTX_CMDC_TIMEOUT (0x1 << 8)
+#define INT_EARCTX_CMDC_STATUS_CH (0x1 << 7)
+#define INT_EARCTX_CMDC_RECV_FINISHED (0x1 << 6)
+#define INT_EARCTX_CMDC_RECV_NACK (0x1 << 5)
+#define INT_EARCTX_CMDC_RECV_NORSP (0x1 << 4)
+#define INT_EARCTX_CMDC_RECV_UNEXP (0x1 << 3)
+#define INT_EARCTX_CMDC_RECV_DATA (0x1 << 2)
+#define INT_EARCTX_CMDC_RECV_ACK (0x1 << 1)
+#define INT_EARCTX_CMDC_RECV_ECC_ERR (0x1 << 0)
+
+#define INT_EARCTX_FEM_C_HOLD_CLR (0x1 << 4)
+#define INT_EARCTX_FEM_C_HOLD_START (0x1 << 3)
+#define INT_EARCTX_ERRCORR_C_FIFO_THD_LESS_PASS (0x1 << 2)
+#define INT_EARCTX_ERRCORR_C_FIFO_OVERFLOW (0x1 << 1)
+#define INT_EARCTX_ERRCORR_C_FIFO_EMPTY (0x1 << 0)
+
/* cmdc discovery and disconnect state */
enum cmdc_st {
CMDC_ST_OFF,
enum attend_type {
ATNDTYP_DISCNCT,
ATNDTYP_ARC,
- ATNDTYP_eARC
+ ATNDTYP_EARC
+};
+
+enum tx_hd_hdp_mux {
+ GPIOW_1,
+ GPIOW_9,
+ GPIOW_5
};
-extern void earcrx_cmdc_init(void);
-void earcrx_cmdc_arc_connect(bool init);
-void earcrx_cmdc_hpd_detect(bool st);
-extern void earcrx_dmac_init(void);
-extern void earcrx_arc_init(void);
-enum cmdc_st earcrx_cmdc_get_state(void);
-enum attend_type earcrx_cmdc_get_attended_type(void);
-extern void earcrx_cdmc_clr_irqs(int clr);
-extern int earcrx_cdmc_get_irqs(void);
-extern void earcrx_dmac_clr_irqs(int clr);
-extern int earcrx_dmac_get_irqs(void);
-extern void earcrx_enable(bool enable);
+void earcrx_cmdc_init(struct regmap *top_map);
+void earcrx_cmdc_arc_connect(struct regmap *cmdc_map, bool init);
+void earcrx_cmdc_hpd_detect(struct regmap *cmdc_map, bool st);
+void earcrx_dmac_init(struct regmap *top_map, struct regmap *dmac_map);
+void earcrx_arc_init(struct regmap *dmac_map);
+enum cmdc_st earcrx_cmdc_get_state(struct regmap *cmdc_map);
+enum attend_type earcrx_cmdc_get_attended_type(struct regmap *cmdc_map);
+void earcrx_cdmc_clr_irqs(struct regmap *top_map, int clr);
+int earcrx_cdmc_get_irqs(struct regmap *top_map);
+void earcrx_dmac_clr_irqs(struct regmap *top_map, int clr);
+int earcrx_dmac_get_irqs(struct regmap *top_map);
+void earcrx_enable(struct regmap *cmdc_map,
+ struct regmap *dmac_map, bool enable);
+void earctx_cmdc_int_mask(struct regmap *top_map);
+
+void earctx_cmdc_init(struct regmap *top_map);
+void earctx_cmdc_arc_connect(struct regmap *cmdc_map, bool init);
+void earctx_cmdc_hpd_detect(struct regmap *top_map,
+ struct regmap *cmdc_map,
+ int earc_port, bool st);
+void earctx_dmac_init(struct regmap *top_map, struct regmap *dmac_map);
+void earctx_dmac_set_format(struct regmap *dmac_map,
+ int frddr_idx, int msb, int frddr_type);
+void earctx_set_channel_status_info(struct regmap *dmac_map,
+ struct iec958_chsts *chsts);
+void earctx_cdmc_clr_irqs(struct regmap *top_map, int clr);
+int earctx_cdmc_get_irqs(struct regmap *top_map);
+void earctx_dmac_clr_irqs(struct regmap *top_map, int clr);
+int earctx_dmac_get_irqs(struct regmap *top_map);
+void earctx_enable(struct regmap *top_map,
+ struct regmap *cmdc_map,
+ struct regmap *dmac_map,
+ bool enable);
+
#endif
}
EXPORT_SYMBOL(vad_update_bits);
-int earcrx_cmdc_read(unsigned int reg)
-{
- int ret, val = 0;
-
- ret = aml_snd_read(IO_EARCRX_CMDC, reg, &val);
-
- if (ret) {
- pr_err("read audio reg %x error %d\n", reg, ret);
- return -1;
- }
- return val;
-}
-EXPORT_SYMBOL(earcrx_cmdc_read);
-
-void earcrx_cmdc_write(unsigned int reg, unsigned int val)
-{
- aml_snd_write(IO_EARCRX_CMDC, reg, val);
-}
-EXPORT_SYMBOL(earcrx_cmdc_write);
-
-void earcrx_cmdc_update_bits(unsigned int reg,
- unsigned int mask, unsigned int val)
-{
- aml_snd_update_bits(IO_EARCRX_CMDC, reg, mask, val);
-}
-EXPORT_SYMBOL(earcrx_cmdc_update_bits);
-
-int earcrx_dmac_read(unsigned int reg)
-{
- int ret, val = 0;
-
- ret = aml_snd_read(IO_EARCRX_DMAC, reg, &val);
-
- if (ret) {
- pr_err("read audio reg %x error %d\n", reg, ret);
- return -1;
- }
- return val;
-}
-EXPORT_SYMBOL(earcrx_dmac_read);
-
-void earcrx_dmac_write(unsigned int reg, unsigned int val)
-{
- aml_snd_write(IO_EARCRX_DMAC, reg, val);
-}
-EXPORT_SYMBOL(earcrx_dmac_write);
-
-void earcrx_dmac_update_bits(unsigned int reg,
- unsigned int mask, unsigned int val)
-{
- aml_snd_update_bits(IO_EARCRX_DMAC, reg, mask, val);
-}
-EXPORT_SYMBOL(earcrx_dmac_update_bits);
-
-int earcrx_top_read(unsigned int reg)
-{
- int ret, val = 0;
-
- ret = aml_snd_read(IO_EARCRX_TOP, reg, &val);
-
- if (ret) {
- pr_err("read audio reg %x error %d\n", reg, ret);
- return -1;
- }
- return val;
-}
-EXPORT_SYMBOL(earcrx_top_read);
-
-void earcrx_top_write(unsigned int reg, unsigned int val)
-{
- aml_snd_write(IO_EARCRX_TOP, reg, val);
-}
-EXPORT_SYMBOL(earcrx_top_write);
-
-void earcrx_top_update_bits(unsigned int reg,
- unsigned int mask, unsigned int val)
-{
- aml_snd_update_bits(IO_EARCRX_TOP, reg, mask, val);
-}
-EXPORT_SYMBOL(earcrx_top_update_bits);
-
static int snd_iomap_probe(struct platform_device *pdev)
{
struct resource res;
IO_EQDRC_BUS,
IO_RESET,
IO_VAD,
- IO_EARCRX_CMDC,
- IO_EARCRX_DMAC,
- IO_EARCRX_TOP,
IO_MAX,
};
extern void vad_write(unsigned int reg, unsigned int val);
extern void vad_update_bits(unsigned int reg,
unsigned int mask, unsigned int val);
-
-extern int earcrx_cmdc_read(unsigned int reg);
-extern void earcrx_cmdc_write(unsigned int reg, unsigned int val);
-extern void earcrx_cmdc_update_bits(unsigned int reg,
- unsigned int mask, unsigned int val);
-extern int earcrx_dmac_read(unsigned int reg);
-extern void earcrx_dmac_write(unsigned int reg, unsigned int val);
-extern void earcrx_dmac_update_bits(unsigned int reg,
- unsigned int mask, unsigned int val);
-extern int earcrx_top_read(unsigned int reg);
-extern void earcrx_top_write(unsigned int reg, unsigned int val);
-extern void earcrx_top_update_bits(unsigned int reg,
- unsigned int mask, unsigned int val);
#endif
obj-y += notify.o \
spdif_info.o \
- misc.o
+ misc.o \
+ iomapres.o
--- /dev/null
+/*
+ * sound/soc/amlogic/common/iomapres.c
+ *
+ * Copyright (C) 2019 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/device.h>
+
+#include <linux/amlogic/media/sound/iomapres.h>
+
+struct regmap *regmap_resource(struct device *dev, char *name)
+{
+ struct resource res;
+ void __iomem *base;
+ struct device_node *node = dev->of_node;
+ static struct regmap_config aud_regmap_config = {
+ .reg_bits = 32,
+ .val_bits = 32,
+ .reg_stride = 4,
+ };
+ int i;
+
+ i = of_property_match_string(node, "reg-names", name);
+ if (of_address_to_resource(node, i, &res))
+ return ERR_PTR(-ENOENT);
+
+ base = devm_ioremap_resource(dev, &res);
+ if (IS_ERR(base))
+ return ERR_CAST(base);
+
+ pr_info("%s, %s, start:%#x, size:%#x\n",
+ __func__, name, (u32)res.start, (u32)resource_size(&res));
+
+ aud_regmap_config.max_register = resource_size(&res) - 4;
+ aud_regmap_config.name =
+ devm_kasprintf(dev, GFP_KERNEL, "%s-%s", node->name, name);
+ if (!aud_regmap_config.name)
+ return ERR_PTR(-ENOMEM);
+
+ return devm_regmap_init_mmio(dev, base, &aud_regmap_config);
+}
+
+unsigned int mmio_read(struct regmap *map, unsigned int reg_ofs)
+{
+ unsigned int val;
+
+ regmap_read(map, (reg_ofs << 2), &val);
+
+ return val;
+}
+
+int mmio_write(struct regmap *map, unsigned int reg_ofs, unsigned int value)
+{
+ return regmap_write(map, (reg_ofs << 2), value);
+}
+
+int mmio_update_bits(struct regmap *map,
+ unsigned int reg_ofs,
+ unsigned int mask,
+ unsigned int value)
+{
+ return regmap_update_bits(map, (reg_ofs << 2), mask, value);
+}
unsigned int IEC958_mode_codec;
EXPORT_SYMBOL(IEC958_mode_codec);
+bool spdifout_is_raw(void)
+{
+ return (IEC958_mode_codec && IEC958_mode_codec != 9);
+}
+
bool spdif_is_4x_clk(void)
{
bool is_4x = false;
projects / platform / kernel / linux-amlogic.git / commitdiff