def rb : AVX512FMA3S<opc, MRMSrcReg, (outs _.FRC:$dst),
(ins _.FRC:$src1, _.FRC:$src2, _.FRC:$src3, AVX512RC:$rc),
!strconcat(OpcodeStr,
- "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
+ "\t{$rc, $src3, $src2, $dst|$dst, $src2, $src3, $rc}"),
!if(MaskOnlyReg, [], [RHS_b])>, EVEX_B, EVEX_RC,
Sched<[SchedWriteFMA.Scl]>;
}// isCodeGenOnly = 1
; X86: # %bb.0: # %entry
; X86-NEXT: vmovss (%eax), %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xfa,0x10,0x00]
; X86-NEXT: # xmm0 = mem[0],zero,zero,zero
-; X86-NEXT: vfmsub213ss %xmm0, %xmm0, %xmm0 # encoding: [0x62,0xf2,0x7d,0x38,0xab,0xc0]
+; X86-NEXT: vfmsub213ss {rd-sae}, %xmm0, %xmm0, %xmm0 # encoding: [0x62,0xf2,0x7d,0x38,0xab,0xc0]
; X86-NEXT: retl # encoding: [0xc3]
;
; X64-LABEL: foo:
; X64: # %bb.0: # %entry
; X64-NEXT: vmovss (%rax), %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xfa,0x10,0x00]
; X64-NEXT: # xmm0 = mem[0],zero,zero,zero
-; X64-NEXT: vfmsub213ss %xmm0, %xmm0, %xmm0 # encoding: [0x62,0xf2,0x7d,0x38,0xab,0xc0]
+; X64-NEXT: vfmsub213ss {rd-sae}, %xmm0, %xmm0, %xmm0 # encoding: [0x62,0xf2,0x7d,0x38,0xab,0xc0]
; X64-NEXT: retq # encoding: [0xc3]
entry:
%0 = load <4 x float>, <4 x float>* undef, align 16
; X86: # %bb.0: # %entry
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: vxorpd {{\.LCPI.*}}, %xmm2, %xmm3
-; X86-NEXT: vfmadd213sd %xmm3, %xmm0, %xmm1
+; X86-NEXT: vfmadd213sd {rn-sae}, %xmm3, %xmm0, %xmm1
; X86-NEXT: kmovw %eax, %k1
; X86-NEXT: vmovsd %xmm1, %xmm2, %xmm2 {%k1}
; X86-NEXT: vmovapd %xmm2, %xmm0
; X64-LABEL: test_mm_mask3_fmsub_round_sd:
; X64: # %bb.0: # %entry
; X64-NEXT: vxorpd {{.*}}(%rip), %xmm2, %xmm3
-; X64-NEXT: vfmadd213sd %xmm3, %xmm0, %xmm1
+; X64-NEXT: vfmadd213sd {rn-sae}, %xmm3, %xmm0, %xmm1
; X64-NEXT: kmovw %edi, %k1
; X64-NEXT: vmovsd %xmm1, %xmm2, %xmm2 {%k1}
; X64-NEXT: vmovapd %xmm2, %xmm0