irqchip/gic: Drop support for board files
authorMarc Zyngier <maz@kernel.org>
Wed, 15 Mar 2023 13:02:18 +0000 (13:02 +0000)
committerMarc Zyngier <maz@kernel.org>
Sat, 8 Apr 2023 09:50:04 +0000 (10:50 +0100)
With the last non-OF, non-ACPI user of the GIC being removed in
e73307b9ebc4 ("ARM: cns3xxx: remove entire platform"), we can finally
drop the entry point and do some minor cleanup.

We also make the driver depend on CONFIG_OF, which is required
even when CONFIG_ACPI is selected.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20230315130218.3212033-1-maz@kernel.org
drivers/irqchip/Kconfig
drivers/irqchip/irq-gic.c
include/linux/irqchip/arm-gic.h

index 7dc990e..b744fd9 100644 (file)
@@ -7,6 +7,7 @@ config IRQCHIP
 
 config ARM_GIC
        bool
+       depends on OF
        select IRQ_DOMAIN_HIERARCHY
        select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
 
index 95e3d2a..412196a 100644 (file)
@@ -1081,10 +1081,6 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq,
        return 0;
 }
 
-static void gic_irq_domain_unmap(struct irq_domain *d, unsigned int irq)
-{
-}
-
 static int gic_irq_domain_translate(struct irq_domain *d,
                                    struct irq_fwspec *fwspec,
                                    unsigned long *hwirq,
@@ -1167,11 +1163,6 @@ static const struct irq_domain_ops gic_irq_domain_hierarchy_ops = {
        .free = irq_domain_free_irqs_top,
 };
 
-static const struct irq_domain_ops gic_irq_domain_ops = {
-       .map = gic_irq_domain_map,
-       .unmap = gic_irq_domain_unmap,
-};
-
 static int gic_init_bases(struct gic_chip_data *gic,
                          struct fwnode_handle *handle)
 {
@@ -1219,30 +1210,9 @@ static int gic_init_bases(struct gic_chip_data *gic,
                gic_irqs = 1020;
        gic->gic_irqs = gic_irqs;
 
-       if (handle) {           /* DT/ACPI */
-               gic->domain = irq_domain_create_linear(handle, gic_irqs,
-                                                      &gic_irq_domain_hierarchy_ops,
-                                                      gic);
-       } else {                /* Legacy support */
-               /*
-                * For primary GICs, skip over SGIs.
-                * No secondary GIC support whatsoever.
-                */
-               int irq_base;
-
-               gic_irqs -= 16; /* calculate # of irqs to allocate */
-
-               irq_base = irq_alloc_descs(16, 16, gic_irqs,
-                                          numa_node_id());
-               if (irq_base < 0) {
-                       WARN(1, "Cannot allocate irq_descs @ IRQ16, assuming pre-allocated\n");
-                       irq_base = 16;
-               }
-
-               gic->domain = irq_domain_add_legacy(NULL, gic_irqs, irq_base,
-                                                   16, &gic_irq_domain_ops, gic);
-       }
-
+       gic->domain = irq_domain_create_linear(handle, gic_irqs,
+                                              &gic_irq_domain_hierarchy_ops,
+                                              gic);
        if (WARN_ON(!gic->domain)) {
                ret = -ENODEV;
                goto error;
@@ -1297,23 +1267,6 @@ static int __init __gic_init_bases(struct gic_chip_data *gic,
        return ret;
 }
 
-void __init gic_init(void __iomem *dist_base, void __iomem *cpu_base)
-{
-       struct gic_chip_data *gic;
-
-       /*
-        * Non-DT/ACPI systems won't run a hypervisor, so let's not
-        * bother with these...
-        */
-       static_branch_disable(&supports_deactivate_key);
-
-       gic = &gic_data[0];
-       gic->raw_dist_base = dist_base;
-       gic->raw_cpu_base = cpu_base;
-
-       __gic_init_bases(gic, NULL);
-}
-
 static void gic_teardown(struct gic_chip_data *gic)
 {
        if (WARN_ON(!gic))
@@ -1325,7 +1278,6 @@ static void gic_teardown(struct gic_chip_data *gic)
                iounmap(gic->raw_cpu_base);
 }
 
-#ifdef CONFIG_OF
 static int gic_cnt __initdata;
 static bool gicv2_force_probe;
 
@@ -1570,12 +1522,6 @@ IRQCHIP_DECLARE(cortex_a7_gic, "arm,cortex-a7-gic", gic_of_init);
 IRQCHIP_DECLARE(msm_8660_qgic, "qcom,msm-8660-qgic", gic_of_init);
 IRQCHIP_DECLARE(msm_qgic2, "qcom,msm-qgic2", gic_of_init);
 IRQCHIP_DECLARE(pl390, "arm,pl390", gic_of_init);
-#else
-int gic_of_init_child(struct device *dev, struct gic_chip_data **gic, int irq)
-{
-       return -ENOTSUPP;
-}
-#endif
 
 #ifdef CONFIG_ACPI
 static struct
index 5686711..2223f95 100644 (file)
@@ -151,12 +151,6 @@ int gic_of_init(struct device_node *node, struct device_node *parent);
  */
 int gic_of_init_child(struct device *dev, struct gic_chip_data **gic, int irq);
 
-/*
- * Legacy platforms not converted to DT yet must use this to init
- * their GIC
- */
-void gic_init(void __iomem *dist , void __iomem *cpu);
-
 void gic_send_sgi(unsigned int cpu_id, unsigned int irq);
 int gic_get_cpu_id(unsigned int cpu);
 void gic_migrate_target(unsigned int new_cpu_id);