ARM: dts: keystone: update reset node to work with reset driver
authorIvan Khoronzhuk <ivan.khoronzhuk@ti.com>
Fri, 23 May 2014 20:34:55 +0000 (16:34 -0400)
committerSantosh Shilimkar <santosh.shilimkar@ti.com>
Tue, 27 May 2014 13:48:52 +0000 (09:48 -0400)
The pll controller register set and device state control registers
include sets of registers with different purposes, so it's logically
to add syscon entry to be able to access them from appropriate places.

So added pll controller and device state control syscon entries.

The keystone driver requires the next additional properties:

"ti,syscon-pll" - phandle/offset pair. The phandle to syscon used to
  access pll controller registers and the offset to use
  reset control registers.

"ti,syscon-dev" - phandle/offset pair. The phandle to syscon used to
  access device state control registers and the offset
  in order to use mux block registers for all watchdogs.

"ti,wdt-list" - option to declare what watchdogs are used to reboot
  the SoC, so set "0" WDT as default.

Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
arch/arm/boot/dts/keystone.dtsi

index 90823eb..a8052fd 100644 (file)
                interrupt-parent = <&gic>;
                ranges = <0x0 0x0 0x0 0xc0000000>;
 
+               pllctrl: pll-controller@02310000 {
+                       compatible = "ti,keystone-pllctrl", "syscon";
+                       reg = <0x02310000 0x200>;
+               };
+
+               devctrl: device-state-control@02620000 {
+                       compatible = "ti,keystone-devctrl", "syscon";
+                       reg = <0x02620000 0x1000>;
+               };
+
                rstctrl: reset-controller {
                        compatible = "ti,keystone-reset";
-                       reg = <0x023100e8 4>;   /* pll reset control reg */
+                       ti,syscon-pll = <&pllctrl 0xe4>;
+                       ti,syscon-dev = <&devctrl 0x328>;
+                       ti,wdt-list = <0>;
                };
 
                /include/ "keystone-clocks.dtsi"