drm/i915: fix reassignment of variable "intel_dp->DP"

In intel_dp_mode_set we OR in the exact same bits twice at the same
spot. Kill one of the redundant assignments.

This little regression was introduced by:
commit 417e822deee1d2bcd8a8a60660c40a0903713f2b
Author: Keith Packard <keithp@keithp.com>
Date:   Tue Nov 1 19:54:11 2011 -0700

    drm/i915: Treat PCH eDP like DP in most places

	PCH eDP has many of the same needs as regular PCH DP connections,
	including the DP_CTl bit settings, the TRANS_DP_CTL register.

The reachable tag for this commit is: v3.1-5461-g417e822

Signed-off-by: Anhua Xu <anhua.xu@intel.com>
[danvet: Improved the commit message somewhat and ensured the diff is
clearer.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 977d9d2..1ab371b 100644 (file)
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -850,10 +850,8 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
         * supposed to be read-only.
         */
        intel_dp->DP = I915_READ(intel_dp->output_reg) & DP_DETECTED;
-       intel_dp->DP |=  DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0;
 
        /* Handle DP bits in common between all three register formats */
-
        intel_dp->DP |= DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0;
 
        switch (intel_dp->lane_count) {