[AMDGPU] Add encoding tests for SALU_CYCLE_2/3
authorPiotr Sobczak <Piotr.Sobczak@amd.com>
Tue, 22 Nov 2022 09:35:07 +0000 (10:35 +0100)
committerPiotr Sobczak <Piotr.Sobczak@amd.com>
Tue, 22 Nov 2022 10:41:59 +0000 (11:41 +0100)
Add missing assembler/disassembler tests for INSTID_SALU_CYCLE_2
and INSTID_SALU_CYCLE_3 which are possible arguments in S_DELAY_ALU.

Differential Revision: https://reviews.llvm.org/D138482

llvm/test/MC/AMDGPU/gfx11_asm_sopp.s
llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sopp.txt

index 8ef7f33..a5573a0 100644 (file)
@@ -111,6 +111,12 @@ s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
 // GFX11: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) ; encoding: [0x91,0x01,0x87,0xbf]
 
+s_delay_alu instid1(SALU_CYCLE_2)
+// GFX11: s_delay_alu instid1(SALU_CYCLE_2) ; encoding: [0x00,0x05,0x87,0xbf]
+
+s_delay_alu instid1(SALU_CYCLE_3)
+// GFX11: s_delay_alu instid1(SALU_CYCLE_3) ; encoding: [0x80,0x05,0x87,0xbf]
+
 //===----------------------------------------------------------------------===//
 // s_waitcnt_depctr
 //===----------------------------------------------------------------------===//
index 093d8b3..259a491 100644 (file)
 # GFX11: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) ; encoding: [0x91,0x01,0x87,0xbf]
 0x91,0x01,0x87,0xbf
 
+# GFX11: s_delay_alu instid1(SALU_CYCLE_2)       ; encoding: [0x00,0x05,0x87,0xbf]
+0x00,0x05,0x87,0xbf
+
+# GFX11: s_delay_alu instid1(SALU_CYCLE_3)       ; encoding: [0x80,0x05,0x87,0xbf]
+0x80,0x05,0x87,0xbf
+
 # GFX11: s_delay_alu instid0(/* invalid instid value */) | instskip(/* invalid instskip value */) | instid1(/* invalid instid value */) ; encoding: [0xff,0x07,0x87,0xbf]
 0xff,0x07,0x87,0xbf