drm/mgag200: Fix LUT programming for 16bpp

Since there are only 32 (64) distinct color values for each color
in 16bpp Matrox hardware expects those in a 'dense' manner, ie in
the first 32 (64) entries of the respective color.

Signed-off-by: Egbert Eich <eich@suse.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>

diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c
index c8983f9..503a414 100644 (file)
--- a/drivers/gpu/drm/mgag200/mgag200_mode.c
+++ b/drivers/gpu/drm/mgag200/mgag200_mode.c
@@ -29,6 +29,7 @@ static void mga_crtc_load_lut(struct drm_crtc *crtc)
        struct mga_crtc *mga_crtc = to_mga_crtc(crtc);
        struct drm_device *dev = crtc->dev;
        struct mga_device *mdev = dev->dev_private;
+       struct drm_framebuffer *fb = crtc->fb;
        int i;
 
        if (!crtc->enabled)
@@ -36,6 +37,28 @@ static void mga_crtc_load_lut(struct drm_crtc *crtc)
 
        WREG8(DAC_INDEX + MGA1064_INDEX, 0);
 
+       if (fb && fb->bits_per_pixel == 16) {
+               int inc = (fb->depth == 15) ? 8 : 4;
+               u8 r, b;
+               for (i = 0; i < MGAG200_LUT_SIZE; i += inc) {
+                       if (fb->depth == 16) {
+                               if (i > (MGAG200_LUT_SIZE >> 1)) {
+                                       r = b = 0;
+                               } else {
+                                       r = mga_crtc->lut_r[i << 1];
+                                       b = mga_crtc->lut_b[i << 1];
+                               }
+                       } else {
+                               r = mga_crtc->lut_r[i];
+                               b = mga_crtc->lut_b[i];
+                       }
+                       /* VGA registers */
+                       WREG8(DAC_INDEX + MGA1064_COL_PAL, r);
+                       WREG8(DAC_INDEX + MGA1064_COL_PAL, mga_crtc->lut_g[i]);
+                       WREG8(DAC_INDEX + MGA1064_COL_PAL, b);
+               }
+               return;
+       }
        for (i = 0; i < MGAG200_LUT_SIZE; i++) {
                /* VGA registers */
                WREG8(DAC_INDEX + MGA1064_COL_PAL, mga_crtc->lut_r[i]);