[crossgen2][arm] Fix assertion repro237932.cs (#37588)
authort-mustafin <66252296+t-mustafin@users.noreply.github.com>
Mon, 8 Jun 2020 13:55:06 +0000 (16:55 +0300)
committerGitHub <noreply@github.com>
Mon, 8 Jun 2020 13:55:06 +0000 (06:55 -0700)
Fix assertion on crossgen2 Debug on ni-compile of 237932/repro237932.cs
test for arm architecture.

Signed-off-by: Timur <t.mustafin@partner.samsung.com>
src/coreclr/src/tools/crossgen2/ILCompiler.ReadyToRun/Compiler/DependencyAnalysis/ReadyToRun/Target_ARM/ImportThunk.cs

index 1557692..2741f44 100644 (file)
@@ -34,11 +34,15 @@ namespace ILCompiler.DependencyAnalysis.ReadyToRun
                     // r4 contains indirection cell
                     // push r4
                     instructionEncoder.EmitPUSH(Register.R4);
-                    int index = _instanceCell.Table.IndexFromBeginningOfArray;
-                    // mov r4, #index
-                    instructionEncoder.EmitMOV(Register.R4, index);
-                    // push r4
-                    instructionEncoder.EmitPUSH(Register.R4);
+
+                    if (!relocsOnly)
+                    {
+                        int index = _instanceCell.Table.IndexFromBeginningOfArray;
+                        // mov r4, #index
+                        instructionEncoder.EmitMOV(Register.R4, index);
+                        // push r4
+                        instructionEncoder.EmitPUSH(Register.R4);
+                    }
 
                     // mov r4, [module]
                     instructionEncoder.EmitMOV(Register.R4, _moduleImport);