net: hns3: only support tc 0 for VF

When the VF shares the same TC config as PF, the business
running on PF and VF must have samiliar module.

For simplicity, we are not considering VF sharing the same tc
configuration as PF use case, so this patch removes the support
of TC configuration from VF and forcing VF to just use single
TC.

Signed-off-by: Yunsheng Lin <linyunsheng@huawei.com>
Signed-off-by: Peng Li <lipeng321@huawei.com>
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c
index 961aedb0e20f8258118c4cf9c4f06f5627be0687..1161361a973b56a174a7be93724fa4f2d8a31350 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c
@@ -93,13 +93,11 @@ static int hclge_dcb_common_validate(struct hclge_dev *hdev, u8 num_tc,
                }
        }
 
-       for (i = 0; i < hdev->num_alloc_vport; i++) {
-               if (num_tc > hdev->vport[i].alloc_tqps) {
-                       dev_err(&hdev->pdev->dev,
-                               "allocated tqp(%u) checking failed, %u > tqp(%u)\n",
-                               i, num_tc, hdev->vport[i].alloc_tqps);
-                       return -EINVAL;
-               }
+       if (num_tc > hdev->vport[0].alloc_tqps) {
+               dev_err(&hdev->pdev->dev,
+                       "allocated tqp checking failed, %u > tqp(%u)\n",
+                       num_tc, hdev->vport[0].alloc_tqps);
+               return -EINVAL;
        }
 
        return 0;

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c
index 3603034aa45c7ecb09aa2695af62b837dc2ad65e..6afb0a4b73f7b9c91c54d48e7a1f64f096c90332 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c
@@ -319,10 +319,14 @@ static int hclge_get_vf_tcinfo(struct hclge_vport *vport,
                               struct hclge_mbx_vf_to_pf_cmd *mbx_req,
                               bool gen_resp)
 {
-       struct hclge_dev *hdev = vport->back;
-       int ret;
+       struct hnae3_knic_private_info *kinfo = &vport->nic.kinfo;
+       u8 vf_tc_map = 0;
+       int i, ret;
+
+       for (i = 0; i < kinfo->num_tc; i++)
+               vf_tc_map |= BIT(i);
 
-       ret = hclge_gen_resp_to_vf(vport, mbx_req, 0, &hdev->hw_tc_map,
+       ret = hclge_gen_resp_to_vf(vport, mbx_req, 0, &vf_tc_map,
                                   sizeof(u8));
 
        return ret;

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
index 9f4069fb786be5aed3af67348b680526fb5bf4e3..aafc69f4bfdd6f5d2afce29a7b3affb80b2f036c 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
@@ -520,8 +520,14 @@ static void hclge_tm_vport_tc_info_update(struct hclge_vport *vport)
        u16 max_rss_size;
        u8 i;
 
-       vport->bw_limit = hdev->tm_info.pg_info[0].bw_limit;
-       kinfo->num_tc = min_t(u16, vport->alloc_tqps, hdev->tm_info.num_tc);
+       /* TC configuration is shared by PF/VF in one port, only allow
+        * one tc for VF for simplicity. VF's vport_id is non zero.
+        */
+       kinfo->num_tc = vport->vport_id ? 1 :
+                       min_t(u16, vport->alloc_tqps, hdev->tm_info.num_tc);
+       vport->qs_offset = (vport->vport_id ? hdev->tm_info.num_tc : 0) +
+                               (vport->vport_id ? (vport->vport_id - 1) : 0);
+
        max_rss_size = min_t(u16, hdev->rss_size_max,
                             vport->alloc_tqps / kinfo->num_tc);
 
@@ -538,12 +544,12 @@ static void hclge_tm_vport_tc_info_update(struct hclge_vport *vport)
        }
 
        kinfo->num_tqps = kinfo->num_tc * kinfo->rss_size;
-       vport->qs_offset = hdev->tm_info.num_tc * vport->vport_id;
        vport->dwrr = 100;  /* 100 percent as init */
        vport->alloc_rss_size = kinfo->rss_size;
+       vport->bw_limit = hdev->tm_info.pg_info[0].bw_limit;
 
        for (i = 0; i < HNAE3_MAX_TC; i++) {
-               if (hdev->hw_tc_map & BIT(i)) {
+               if (hdev->hw_tc_map & BIT(i) && i < kinfo->num_tc) {
                        kinfo->tc_info[i].enable = true;
                        kinfo->tc_info[i].tqp_offset = i * kinfo->rss_size;
                        kinfo->tc_info[i].tqp_count = kinfo->rss_size;
@@ -766,13 +772,17 @@ static int hclge_tm_pri_q_qs_cfg(struct hclge_dev *hdev)
 
        if (hdev->tx_sch_mode == HCLGE_FLAG_TC_BASE_SCH_MODE) {
                /* Cfg qs -> pri mapping, one by one mapping */
-               for (k = 0; k < hdev->num_alloc_vport; k++)
-                       for (i = 0; i < hdev->tm_info.num_tc; i++) {
+               for (k = 0; k < hdev->num_alloc_vport; k++) {
+                       struct hnae3_knic_private_info *kinfo =
+                               &vport[k].nic.kinfo;
+
+                       for (i = 0; i < kinfo->num_tc; i++) {
                                ret = hclge_tm_qs_to_pri_map_cfg(
                                        hdev, vport[k].qs_offset + i, i);
                                if (ret)
                                        return ret;
                        }
+               }
        } else if (hdev->tx_sch_mode == HCLGE_FLAG_VNET_BASE_SCH_MODE) {
                /* Cfg qs -> pri mapping,  qs = tc, pri = vf, 8 qs -> 1 pri */
                for (k = 0; k < hdev->num_alloc_vport; k++)