drm/i915/psr: Set PSR CRC verification bit in sink inside PSR1 block

As we have a else block for the 'if (dev_priv->psr.psr2_enabled) {'
and this bit is only set for PSR1 move it to that block to make it
more easy to read.

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181204003403.23361-3-jose.souza@intel.com

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 90759f7..8342c33 100644 (file)
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -398,10 +398,11 @@ static void intel_psr_enable_sink(struct intel_dp *intel_dp)
        } else {
                if (dev_priv->psr.link_standby)
                        dpcd_val |= DP_PSR_MAIN_LINK_ACTIVE;
+
+               if (INTEL_GEN(dev_priv) >= 8)
+                       dpcd_val |= DP_PSR_CRC_VERIFICATION;
        }
 
-       if (!dev_priv->psr.psr2_enabled && INTEL_GEN(dev_priv) >= 8)
-               dpcd_val |= DP_PSR_CRC_VERIFICATION;
        drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, dpcd_val);
 
        drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, DP_SET_POWER_D0);