xilinx: zynqmp: fix incorrect map not align with IPI HW

Current IPI module register description is not align with IPI HW. The
registers with the wrong offset are not used so it does not cause real
issues. This patch aligns the register description.

Additionally comments added to explain why recv function does not check
any flag prior copying rx data.

Fixes: 660b0c77d816 ("mailbox: zynqmp: ipi mailbox driver")
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/drivers/mailbox/zynqmp-ipi.c b/drivers/mailbox/zynqmp-ipi.c
index f206a27..746377e 100644 (file)
--- a/drivers/mailbox/zynqmp-ipi.c
+++ b/drivers/mailbox/zynqmp-ipi.c
@@ -24,10 +24,12 @@
 struct ipi_int_regs {
        u32 trig; /* 0x0  */
        u32 obs;  /* 0x4  */
-       u32 ist;  /* 0x8  */
-       u32 imr;  /* 0xC  */
-       u32 ier;  /* 0x10 */
-       u32 idr;  /* 0x14 */
+       u32 dummy0;
+       u32 dummy1;
+       u32 isr;  /* 0x10  */
+       u32 imr;  /* 0x14  */
+       u32 ier;  /* 0x18 */
+       u32 idr;  /* 0x1C */
 };
 
 #define ipi_int_apu ((struct ipi_int_regs *)IPI_INT_REG_BASE_APU)
@@ -66,6 +68,10 @@ static int zynqmp_ipi_recv(struct mbox_chan *chan, void *data)
        struct zynqmp_ipi *zynqmp = dev_get_priv(chan->dev);
        u32 *mbx = (u32 *)zynqmp->local_res_regs;
 
+       /*
+        * PMU Firmware does not trigger IPI interrupt for API call responses so
+        * there is no need to check ISR flags
+        */
        for (size_t i = 0; i < msg->len; i++)
                msg->buf[i] = readl(&mbx[i]);