[X86] Vectorcall Calling Convention - Adding CodeGen Complete Support

Fixing build issues.

llvm-svn: 290244

diff --git a/llvm/lib/Target/X86/X86CallingConv.cpp b/llvm/lib/Target/X86/X86CallingConv.cpp
index ae3f5b5..c96e76b 100644 (file)
--- a/llvm/lib/Target/X86/X86CallingConv.cpp
+++ b/llvm/lib/Target/X86/X86CallingConv.cpp
@@ -62,23 +62,23 @@ static ArrayRef<MCPhysReg> CC_X86_VectorCallGetSSEs(const MVT &ValVT) {
   if (ValVT.is512BitVector()) {\r
     static const MCPhysReg RegListZMM[] = {X86::ZMM0, X86::ZMM1, X86::ZMM2,\r
                                            X86::ZMM3, X86::ZMM4, X86::ZMM5};\r
-    return RegListZMM;\r
+    return makeArrayRef(std::begin(RegListZMM), std::end(RegListZMM));\r
   }\r
 \r
   if (ValVT.is256BitVector()) {\r
     static const MCPhysReg RegListYMM[] = {X86::YMM0, X86::YMM1, X86::YMM2,\r
                                            X86::YMM3, X86::YMM4, X86::YMM5};\r
-    return RegListYMM;\r
+    return makeArrayRef(std::begin(RegListYMM), std::end(RegListYMM));\r
   }\r
 \r
   static const MCPhysReg RegListXMM[] = {X86::XMM0, X86::XMM1, X86::XMM2,\r
                                          X86::XMM3, X86::XMM4, X86::XMM5};\r
-  return RegListXMM;\r
+  return makeArrayRef(std::begin(RegListXMM), std::end(RegListXMM));\r
 }\r
 \r
 static ArrayRef<MCPhysReg> CC_X86_64_VectorCallGetGPRs() {\r
   static const MCPhysReg RegListGPR[] = {X86::RCX, X86::RDX, X86::R8, X86::R9};\r
-  return RegListGPR;\r
+  return makeArrayRef(std::begin(RegListGPR), std::end(RegListGPR));\r
 }\r
 \r
 static bool CC_X86_VectorCallAssignRegister(unsigned &ValNo, MVT &ValVT,\r