sparc64: Fix niagara2 perf IRQ bits.

Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c
index 04db9274389609e811ce2ba0b5a9e98cb3c57af1..fa5936e1c3b9e8d632c024d5dd6ea0ce8863eba1 100644 (file)
--- a/arch/sparc/kernel/perf_event.c
+++ b/arch/sparc/kernel/perf_event.c
@@ -437,7 +437,7 @@ static const struct sparc_pmu niagara2_pmu = {
        .lower_shift    = 6,
        .event_mask     = 0xfff,
        .hv_bit         = 0x8,
-       .irq_bit        = 0x03,
+       .irq_bit        = 0x30,
        .upper_nop      = 0x220,
        .lower_nop      = 0x220,
 };