ARM: sunxi: Restructure sunxi dts/dtsi files
authorStefan Roese <sr@denx.de>
Mon, 19 Nov 2012 11:09:40 +0000 (12:09 +0100)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Tue, 20 Nov 2012 14:36:00 +0000 (15:36 +0100)
For the new sun4i/Cubieboard (A10) support, lets re-strucure the
sun5i dts files to make it more generic. Those are the new
dts/dtsi files:

sunxi.dtsi - Devices common to all Allwinner sunXi SoC's
sun4i.dtsi - sun4i Devices, will include sunxi.dtsi
sun5i.dtsi - sun5i Devices, will include sunxi.dtsi
board.dts - will include either sun4i.dtsi or sun5i.dtsi

Additionally the "duart" label in the olinuxino.dts is changed to
"uart1".

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
arch/arm/boot/dts/sun5i-olinuxino.dts
arch/arm/boot/dts/sun5i.dtsi
arch/arm/boot/dts/sunxi.dtsi [new file with mode: 0644]

index 3b1cce3..d6ff889 100644 (file)
        model = "Olimex A13-Olinuxino";
        compatible = "olimex,a13-olinuxino", "allwinner,sun5i";
 
+       chosen {
+               bootargs = "earlyprintk console=ttyS0,115200";
+       };
+
        soc {
-               duart: uart@01c28400 {
+               uart1: uart@01c28400 {
                        status = "okay";
                };
        };
index 4bedf3e..59a2d26 100644 (file)
  * http://www.gnu.org/copyleft/gpl.html
  */
 
-/include/ "skeleton.dtsi"
+/include/ "sunxi.dtsi"
 
 / {
-       interrupt-parent = <&intc>;
-
-       cpus {
-               cpu@0 {
-                       compatible = "arm,cortex-a8";
-               };
-       };
-
-       chosen {
-               bootargs = "earlyprintk console=ttyS0,115200";
-       };
-
        memory {
                reg = <0x40000000 0x20000000>;
        };
-
-       clocks {
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               osc: oscillator {
-                       #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <24000000>;
-               };
-       };
-
-       soc {
-               compatible = "simple-bus";
-               #address-cells = <1>;
-               #size-cells = <1>;
-               reg = <0x01c20000 0x300000>;
-               ranges;
-
-               timer@01c20c00 {
-                       compatible = "allwinner,sunxi-timer";
-                       reg = <0x01c20c00 0x400>;
-                       interrupts = <22>;
-                       clocks = <&osc>;
-               };
-
-               intc: interrupt-controller@01c20400 {
-                       compatible = "allwinner,sunxi-ic";
-                       reg = <0x01c20400 0x400>;
-                       interrupt-controller;
-                       #interrupt-cells = <1>;
-               };
-
-               uart1: uart@01c28400 {
-                       compatible = "ns8250";
-                       reg = <0x01c28400 0x400>;
-                       interrupts = <2>;
-                       reg-shift = <2>;
-                       clock-frequency = <24000000>;
-                       status = "disabled";
-               };
-       };
 };
diff --git a/arch/arm/boot/dts/sunxi.dtsi b/arch/arm/boot/dts/sunxi.dtsi
new file mode 100644 (file)
index 0000000..9e476de
--- /dev/null
@@ -0,0 +1,66 @@
+/*
+ * Copyright 2012 Maxime Ripard
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+       interrupt-parent = <&intc>;
+
+       cpus {
+               cpu@0 {
+                       compatible = "arm,cortex-a8";
+               };
+       };
+
+       clocks {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               osc: oscillator {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <24000000>;
+               };
+       };
+
+       soc {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               reg = <0x01c20000 0x300000>;
+               ranges;
+
+               timer@01c20c00 {
+                       compatible = "allwinner,sunxi-timer";
+                       reg = <0x01c20c00 0x400>;
+                       interrupts = <22>;
+                       clocks = <&osc>;
+               };
+
+               intc: interrupt-controller@01c20400 {
+                       compatible = "allwinner,sunxi-ic";
+                       reg = <0x01c20400 0x400>;
+                       interrupt-controller;
+                       #interrupt-cells = <1>;
+               };
+
+               uart1: uart@01c28400 {
+                       compatible = "ns8250";
+                       reg = <0x01c28400 0x400>;
+                       interrupts = <2>;
+                       reg-shift = <2>;
+                       clock-frequency = <24000000>;
+                       status = "disabled";
+               };
+       };
+};