Adds a target hook canPredicatePredicatedInstr(const MachineInstr&) that
assumes an instruction is already predicated and returns true if it can
be predicated again, used by the early if-conversion pass in order to
iterate multiple times on architectures supporting predicate logic.
No test added since there is no upstream target that can take advantage.
Differential Revision: https://reviews.llvm.org/D139981
/// Returns true if the instruction is already predicated.
virtual bool isPredicated(const MachineInstr &MI) const { return false; }
+ /// Assumes the instruction is already predicated and returns true if the
+ /// instruction can be predicated again.
+ virtual bool canPredicatePredicatedInstr(const MachineInstr &MI) const {
+ assert(isPredicated(MI) && "Instruction is not predicated");
+ return false;
+ }
+
// Returns a MIRPrinter comment for this machine operand.
virtual std::string
createMIROperandComment(const MachineInstr &MI, const MachineOperand &Op,
return false;
}
- // Check that instruction is predicable and that it is not already
- // predicated.
- if (!TII->isPredicable(*I) || TII->isPredicated(*I)) {
+ // Check that instruction is predicable
+ if (!TII->isPredicable(*I)) {
+ LLVM_DEBUG(dbgs() << "Isn't predicable: " << *I);
+ return false;
+ }
+
+ // Check that instruction is not already predicated.
+ if (TII->isPredicated(*I) && !TII->canPredicatePredicatedInstr(*I)) {
+ LLVM_DEBUG(dbgs() << "Is already predicated: " << *I);
return false;
}