sh: sh7785 evt2irq migration.
authorPaul Mundt <lethal@linux-sh.org>
Fri, 18 May 2012 05:04:49 +0000 (14:04 +0900)
committerPaul Mundt <lethal@linux-sh.org>
Fri, 18 May 2012 05:04:49 +0000 (14:04 +0900)
Migrate SH7785 to evt2irq() backed hwirq lookups.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
arch/sh/kernel/cpu/sh4a/setup-sh7785.c

index 81588ef..0968ecb 100644 (file)
@@ -15,6 +15,7 @@
 #include <linux/mm.h>
 #include <linux/sh_dma.h>
 #include <linux/sh_timer.h>
+#include <linux/sh_intc.h>
 #include <asm/mmzone.h>
 #include <cpu/dma-register.h>
 
@@ -24,7 +25,7 @@ static struct plat_sci_port scif0_platform_data = {
        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
        .scbrr_algo_id  = SCBRR_ALGO_1,
        .type           = PORT_SCIF,
-       .irqs           = { 40, 40, 40, 40 },
+       .irqs           = SCIx_IRQ_MUXED(evt2irq(0x700)),
        .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 
@@ -42,7 +43,7 @@ static struct plat_sci_port scif1_platform_data = {
        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
        .scbrr_algo_id  = SCBRR_ALGO_1,
        .type           = PORT_SCIF,
-       .irqs           = { 44, 44, 44, 44 },
+       .irqs           = SCIx_IRQ_MUXED(evt2irq(0x780)),
        .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 
@@ -60,7 +61,7 @@ static struct plat_sci_port scif2_platform_data = {
        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
        .scbrr_algo_id  = SCBRR_ALGO_1,
        .type           = PORT_SCIF,
-       .irqs           = { 60, 60, 60, 60 },
+       .irqs           = SCIx_IRQ_MUXED(evt2irq(0x980)),
        .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 
@@ -78,7 +79,7 @@ static struct plat_sci_port scif3_platform_data = {
        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
        .scbrr_algo_id  = SCBRR_ALGO_1,
        .type           = PORT_SCIF,
-       .irqs           = { 61, 61, 61, 61 },
+       .irqs           = SCIx_IRQ_MUXED(evt2irq(0x9a0)),
        .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 
@@ -96,7 +97,7 @@ static struct plat_sci_port scif4_platform_data = {
        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
        .scbrr_algo_id  = SCBRR_ALGO_1,
        .type           = PORT_SCIF,
-       .irqs           = { 62, 62, 62, 62 },
+       .irqs           = SCIx_IRQ_MUXED(evt2irq(0x9c0)),
        .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 
@@ -114,7 +115,7 @@ static struct plat_sci_port scif5_platform_data = {
        .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
        .scbrr_algo_id  = SCBRR_ALGO_1,
        .type           = PORT_SCIF,
-       .irqs           = { 63, 63, 63, 63 },
+       .irqs           = SCIx_IRQ_MUXED(evt2irq(0x9e0)),
        .regtype        = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
 };
 
@@ -139,7 +140,7 @@ static struct resource tmu0_resources[] = {
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
-               .start  = 28,
+               .start  = evt2irq(0x580),
                .flags  = IORESOURCE_IRQ,
        },
 };
@@ -167,7 +168,7 @@ static struct resource tmu1_resources[] = {
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
-               .start  = 29,
+               .start  = evt2irq(0x5a0),
                .flags  = IORESOURCE_IRQ,
        },
 };
@@ -194,7 +195,7 @@ static struct resource tmu2_resources[] = {
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
-               .start  = 30,
+               .start  = evt2irq(0x5c0),
                .flags  = IORESOURCE_IRQ,
        },
 };
@@ -221,7 +222,7 @@ static struct resource tmu3_resources[] = {
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
-               .start  = 96,
+               .start  = evt2irq(0xe00),
                .flags  = IORESOURCE_IRQ,
        },
 };
@@ -248,7 +249,7 @@ static struct resource tmu4_resources[] = {
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
-               .start  = 97,
+               .start  = evt2irq(0xe20),
                .flags  = IORESOURCE_IRQ,
        },
 };
@@ -275,7 +276,7 @@ static struct resource tmu5_resources[] = {
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
-               .start  = 98,
+               .start  = evt2irq(0xe40),
                .flags  = IORESOURCE_IRQ,
        },
 };
@@ -375,10 +376,13 @@ static struct resource sh7785_dmae0_resources[] = {
                .flags  = IORESOURCE_MEM,
        },
        {
-               /* Real DMA error IRQ is 39, and channel IRQs are 33-38 */
+               /*
+                * Real DMA error vector is 0x6e0, and channel
+                * vectors are 0x620-0x6c0
+                */
                .name   = "error_irq",
-               .start  = 33,
-               .end    = 33,
+               .start  = evt2irq(0x620),
+               .end    = evt2irq(0x620),
                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
        },
 };
@@ -392,10 +396,13 @@ static struct resource sh7785_dmae1_resources[] = {
        },
        /* DMAC1 has no DMARS */
        {
-               /* Real DMA error IRQ is 58, and channel IRQs are 52-57 */
+               /*
+                * Real DMA error vector is 0x940, and channel
+                * vectors are 0x880-0x920
+                */
                .name   = "error_irq",
-               .start  = 52,
-               .end    = 52,
+               .start  = evt2irq(0x880),
+               .end    = evt2irq(0x880),
                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
        },
 };