Also use igt_skip a bit more to simplify some of the tests.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
gen3_render_mixed_blits \
gen3_render_tiledx_blits \
gen3_render_tiledy_blits \
- prime_udl \
pm_psr \
pm_rc6_residency \
pm_rps \
+ prime_udl \
$(NULL)
# IMPORTANT: The ZZ_ tests need to be run last!
/**
* Checks DRM_IOCTL_GET_CLIENT.
*/
-int main(int argc, char **argv)
+igt_simple_main
{
int fd, ret;
drm_client_t client;
igt_assert(ret == -1 && errno == EINVAL);
close(fd);
- return 0;
}
* I don't care too much about the actual contents, just that the kernel
* doesn't crash.
*/
-int main(int argc, char **argv)
+igt_simple_main
{
int fd, ret;
drm_stats_t stats;
igt_assert(ret == 0);
close(fd);
- return 0;
}
/**
* Checks DRM_IOCTL_GET_VERSION and libdrm's drmGetVersion() interface to it.
*/
-int main(int argc, char **argv)
+igt_simple_main
{
int fd;
drmVersionPtr v;
igt_assert(v->version_major >= 1);
drmFree(v);
close(fd);
- return 0;
}
#define BO_ARRAY_SIZE 35000
drm_intel_bo *bos[BO_ARRAY_SIZE];
-int main(int argc, char **argv)
+igt_simple_main
{
int fd;
int i;
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
-
- return 0;
}
/* we do both cpu and gtt maps, so only need half of 64k to exhaust */
-int main(int argc, char **argv)
+igt_simple_main
{
int fd;
int i;
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
-
- return 0;
}
#define BO_ARRAY_SIZE 68000
drm_intel_bo *bos[BO_ARRAY_SIZE];
-int main(int argc, char **argv)
+igt_simple_main
{
int fd;
int i;
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
-
- return 0;
}
#define BO_ARRAY_SIZE 68000
drm_intel_bo *bos[BO_ARRAY_SIZE];
-int main(int argc, char **argv)
+igt_simple_main
{
int fd;
int i;
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
-
- return 0;
}
}
#endif
-int main(int argc, char **argv)
+igt_simple_main
{
int fd;
//exec0(fd);
close(fd);
-
- return 0;
}
uint32_t *batch = gen6_batch;
uint32_t batch_size = sizeof(gen6_batch);
-int main(int argc, char **argv)
+igt_simple_main
{
const uint32_t hang[] = {-1, -1, -1, -1};
const uint32_t end[] = {MI_BATCH_BUFFER_END, 0};
}
aper_size = gem_mappable_aperture_size();
- if (intel_get_total_ram_mb() < aper_size / (1024*1024) * 2) {
- fprintf(stderr, "not enough mem to run test\n");
- return 77;
- }
+ igt_skip_on_f(intel_get_total_ram_mb() < aper_size / (1024*1024) * 2,
+ "not enough mem to run test\n");
count = aper_size / 4096 * 2;
if (igt_run_in_simulation())
printf("Test suceeded, cleanup up - this might take a while.\n");
close(fd);
-
- return 0;
}
igt_assert(ret == 0);
}
-int main(int argc, char **argv)
+igt_simple_main
{
uint32_t batch_end[4] = {MI_BATCH_BUFFER_END, 0, 0, 0};
int fd, i, ret;
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
-
- return 0;
}
}
}
-int main(int argc, char *argv[])
+igt_simple_main
{
struct local_drm_i915_context_destroy destroy;
uint32_t ctx_id;
handle_bad(ret, errno, ENOENT, "default destroy");
close(fd);
-
- igt_success();
}
{
int i;
+ igt_simple_init();
+
fd = drm_open_any_render();
devid = intel_get_drm_devid(fd);
free(threads);
close(fd);
- igt_success();
+ return 0;
}
#define CONTEXT_CREATE_IOCTL DRM_IOWR(DRM_COMMAND_BASE + 0x2d, struct local_drm_i915_gem_context_create)
-int main(int argc, char *argv[])
+igt_simple_main
{
int ret, fd;
struct local_drm_i915_gem_context_create create;
igt_assert(create.ctx_id != 0);
close(fd);
-
- igt_success();
}
}
}
-int main(int argc, char **argv)
+igt_simple_main
{
int fd;
int devid;
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
-
- return 0;
}
{
int i;
+ igt_simple_init();
+
igt_skip_on_simulation();
if (argc > 1) {
}
#define ELAPSED(a,b) (1e6*((b)->tv_sec - (a)->tv_sec) + ((b)->tv_usec - (a)->tv_usec))
-int main(int argc, char **argv)
+igt_simple_main
{
uint32_t batch[2] = {MI_BATCH_BUFFER_END};
int fd, n, m, count;
printf("\n");
}
}
-
- return 0;
}
return handle;
}
-int
-main(int argc, char **argv)
+igt_simple_main
{
int fd;
int i;
igt_assert(ptr[i] == i);
close(fd);
-
- return 0;
}
int loop, i, tiling;
int fd;
+ igt_simple_init();
+
igt_skip_on_simulation();
if (argc > 1)
uint32_t blob[2048*2048];
#define MAX_BLT_SIZE 128
-int main(int argc, char **argv)
+igt_simple_main
{
drm_intel_bo *bo = NULL;
uint32_t tiling_mode = I915_TILING_X;
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
-
- return 0;
}
/* kernel should clean this up for us */
}
-int main(int argc, char **argv)
+igt_simple_main
{
int fd;
fd = drm_open_any();
test_large_object(fd);
-
- return 0;
}
#define fail(x) ASSERT(_fail(x))
#define pass(x) ASSERT(!_fail(x))
-int main(int argc, char **argv)
+igt_simple_main
{
uint32_t batch[2] = {MI_BATCH_BUFFER_END};
uint32_t handle;
fail(many_exec(fd, handle, i+1, i, USE_LUT | BROKEN));
fail(many_exec(fd, handle, i+1, i+1, USE_LUT | BROKEN));
}
-
- return 0;
}
}
}
-int main(int argc, char **argv)
+igt_simple_main
{
data_t data = {0, };
struct intel_batchbuffer *batch = NULL;
media_fillfunc_t media_fill = NULL;
int i, j;
- igt_fixture {
- data.drm_fd = drm_open_any_render();
- data.devid = intel_get_drm_devid(data.drm_fd);
+ data.drm_fd = drm_open_any_render();
+ data.devid = intel_get_drm_devid(data.drm_fd);
- data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd, 4096);
- igt_assert(data.bufmgr);
+ data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd, 4096);
+ igt_assert(data.bufmgr);
- media_fill = get_media_fillfunc(data.devid);
+ media_fill = get_media_fillfunc(data.devid);
- igt_require_f(media_fill,
- "no media-fill function\n");
+ igt_require_f(media_fill,
+ "no media-fill function\n");
- batch = intel_batchbuffer_alloc(data.bufmgr, data.devid);
- igt_assert(batch);
- }
+ batch = intel_batchbuffer_alloc(data.bufmgr, data.devid);
+ igt_assert(batch);
scratch_buf_init(&data, &dst, WIDTH, HEIGHT, STRIDE, COLOR_C4);
gem_madvise(fd, handle, I915_MADV_DONTNEED);
}
-int main(int argc, char **argv)
+igt_simple_main
{
int fd, i;
create_and_map_bo(fd);
close(fd);
-
- return 0;
}
return pin.offset;
}
-int main(int argc, char **argv)
+igt_simple_main
{
const uint32_t batch[2] = {MI_BATCH_BUFFER_END};
struct timeval start, now;
gettimeofday(&now, NULL);
} while ((now.tv_sec - start.tv_sec)*1000 + (now.tv_usec - start.tv_usec) / 1000 < 10000);
igt_stop_signal_helper();
-
- return 0;
}
return reg_read.val;
}
-int main(int argc, char *argv[])
+igt_simple_main
{
struct local_drm_i915_reg_read reg_read;
int fd, ret;
EINVAL, "bad register");
close(fd);
- igt_success();
}
int opt_dump_png = false;
int opt_dump_aub = drmtest_dump_aub();
+ igt_simple_init();
+
while ((opt = getopt(argc, argv, "d")) != -1) {
switch (opt) {
case 'd':
uint32_t start = 0;
int i, j, fd, count;
+ igt_simple_init();
+
fd = drm_open_any();
render_copy = get_render_copyfunc(intel_get_drm_devid(fd));
uint32_t start = 0;
int i, j, fd, count;
+ igt_simple_init();
+
igt_skip_on_simulation();
fd = drm_open_any();
drm_intel_bo_unmap(target_buffer);
}
-int main(int argc, char **argv)
+igt_simple_main
{
int fd;
int devid;
fd = drm_open_any();
devid = intel_get_drm_devid(fd);
- if (!HAS_BLT_RING(devid)) {
- fprintf(stderr, "inter ring check needs gen6+\n");
- return 77;
- }
+ gem_require_ring(fd, I915_EXEC_BLT);
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
-
- return 0;
}
int wcount = 0;
int r = -1;
+ igt_simple_init();
+
parse_options(argc, argv);
card_index = drm_get_card();
* Testcase: Check set_tiling vs gtt mmap coherency
*/
-int main(int argc, char **argv)
+igt_simple_main
{
int fd;
uint32_t *ptr;
munmap(ptr, OBJECT_SIZE);
close(fd);
-
- return 0;
}
* Testcase: Check set_tiling vs pwrite coherency
*/
-int main(int argc, char **argv)
+igt_simple_main
{
int fd;
uint32_t *ptr;
munmap(ptr, OBJECT_SIZE);
close(fd);
-
- return 0;
}
drm_intel_bo_unmap(target_buffer);
}
-int main(int argc, char **argv)
+igt_simple_main
{
int fd;
int devid;
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
-
- return 0;
}
drm_intel_bo_unmap(target_buffer);
}
-int main(int argc, char **argv)
+igt_simple_main
{
int fd;
int devid;
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
-
- return 0;
}
drm_intel_bo_unmap(target_buffer);
}
-int main(int argc, char **argv)
+igt_simple_main
{
int fd;
int devid;
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
-
- return 0;
}
drm_intel_bo_unmap(target_buffer);
}
-int main(int argc, char **argv)
+igt_simple_main
{
int fd;
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
-
- return 0;
}
return 0;
}
-int main(int argc, char **argv)
+igt_simple_main
{
int fd;
drm_intel_bo *bo;
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
-
- return 0;
}
}
}
-int main(int argc, char **argv)
+igt_simple_main
{
drm_intel_bo *bo[4096];
uint32_t bo_start_val[4096];
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
-
- return 0;
}
return (base_y + tile_y) * WIDTH + base_x + tile_x;
}
-int
-main(int argc, char **argv)
+igt_simple_main
{
int fd;
int i, iter = 100;
}
close(fd);
-
- return 0;
}
return handle;
}
-int
-main(int argc, char **argv)
+igt_simple_main
{
int fd;
uint32_t *data;
}
close(fd);
-
- return 0;
}
uint32_t *bo_handles;
int *idx_arr;
-int
-main(int argc, char **argv)
+igt_simple_main
{
int fd;
uint32_t *data;
}
close(fd);
-
- return 0;
}
* Testcase: Check that max fence stride works
*/
-int main(int argc, char *argv[])
+igt_simple_main
{
int fd;
uint32_t *ptr;
munmap(ptr, size);
close(fd);
-
- return 0;
}
uint32_t data[TEST_SIZE/4];
-int main(int argc, char **argv)
+igt_simple_main
{
int i, ret, fd, num_fences;
drm_intel_bo *busy_bo, *test_bo;
}
}
intel_batchbuffer_flush(batch);
-
- return 0;
}
struct intel_batchbuffer *batch;
static drm_intel_bo *load_bo;
-int main(int argc, char **argv)
+igt_simple_main
{
int fd, i;
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
-
- return 0;
}
uint32_t start = 0;
int i, fd, count;
+ igt_simple_init();
+
igt_skip_on_simulation();
fd = drm_open_any();
ADVANCE_BATCH();
}
-int main(int argc, char **argv)
+igt_simple_main
{
drm_intel_bufmgr *bufmgr;
struct intel_batchbuffer *batch;
dst = drm_intel_bo_alloc(bufmgr, "dst", BUF_SIZE, 4096);
dst2 = drm_intel_bo_alloc(bufmgr, "dst2", BUF_SIZE, 4096);
- if (gem_bo_wait_timeout(fd, dst->handle, &timeout) == -EINVAL) {
- printf("kernel doesn't support wait_timeout, skipping test\n");
- return 77;
- }
+ igt_skip_on_f(gem_bo_wait_timeout(fd, dst->handle, &timeout) == -EINVAL,
+ "kernel doesn't support wait_timeout, skipping test\n");
timeout = ENOUGH_WORK_IN_SECONDS * NSEC_PER_SEC;
/* Figure out a rough number of fills required to consume 1 second of
drm_intel_bufmgr_destroy(bufmgr);
close(fd);
-
- return 0;
}
uint32_t start = 0;
int i, fd, count;
+ igt_simple_init();
+
fd = drm_open_any();
if (!IS_GEN3(intel_get_drm_devid(fd))) {
uint32_t start = 0;
int i, fd, count;
+ igt_simple_init();
+
fd = drm_open_any();
if (!IS_GEN3(intel_get_drm_devid(fd))) {
uint32_t start = 0;
int i, fd, count;
+ igt_simple_init();
+
fd = drm_open_any();
if (!IS_GEN3(intel_get_drm_devid(fd))) {
uint32_t start = 0;
int i, fd, count;
+ igt_simple_init();
+
fd = drm_open_any();
if (!IS_GEN3(intel_get_drm_devid(fd))) {
uint32_t start = 0;
int i, fd, count;
+ igt_simple_init();
+
fd = drm_open_any();
if (!IS_GEN3(intel_get_drm_devid(fd))) {
return perf;
}
-int main(int argc, char *argv[])
+igt_simple_main
{
int ret, perf1, perf2;
int device = drm_get_card();
fprintf(stderr, "Unable to enter PSR state again\n");
igt_fail(1);
}
-
- igt_success();
}
return ret;
}
-int main(int argc, char *argv[])
+igt_simple_main
{
const int device = drm_get_card();
char *path, *pathp, *pathpp;
"running and running no other tests)\n");
igt_fail(1);
}
-
- igt_success();
}
}
-int main(int argc, char *argv[])
+igt_simple_main
{
const int device = drm_get_card();
struct junk *junk = stuff;
igt_skip_on_simulation();
- if (argc > 1)
- verbose++;
-
/* Use drm_open_any to verify device existence */
fd = drm_open_any();
close(fd);
writeval(stuff[MIN].filp, origmin);
writeval(stuff[MAX].filp, origmax);
-
- igt_success();
}
return ret;
}
-int main(int argc, char **argv)
+igt_simple_main
{
- int ret;
-
igt_skip_on_simulation();
- ret = find_and_open_devices();
- if (ret < 0)
- return ret;
+ igt_assert(find_and_open_devices() >= 0);
- if (udl_fd == -1 || intel_fd == -1) {
- printf("failed to find intel and udl GPU\n");
- return 77;
- }
+ igt_skip_on(udl_fd == -1);
+ igt_skip_on(intel_fd == -1);
/* set up intel bufmgr */
bufmgr = drm_intel_bufmgr_gem_init(intel_fd, 4096);
intel_batch = intel_batchbuffer_alloc(bufmgr, devid);
/* create an object on the i915 */
- ret = test1();
- if (ret) {
- fprintf(stderr,"prime_test: failed test 1\n");
- return -1;
- }
+ igt_assert(test1() == 0);
- ret = test2();
- if (ret)
- fprintf(stderr,"prime_test: failed test 2 %d\n", ret);
+ igt_assert(test2() == 0);
intel_batchbuffer_free(intel_batch);
close(intel_fd);
close(udl_fd);
-
- return ret;
}
projects / platform / upstream / intel-gpu-tools.git / commitdiff