dv: fix osd color matrix when dv enabled [1/1]
authorYi Zhou <yi.zhou@amlogic.com>
Fri, 23 Nov 2018 06:37:32 +0000 (14:37 +0800)
committerLuan Yuan <luan.yuan@amlogic.com>
Tue, 27 Nov 2018 03:12:30 +0000 (11:12 +0800)
PD#SWPL-1804

Problem:
fix osd color matrix when dv enabled

Solution:
enable osd matrix when dv enabled

Verify:
verified on u212 dev board

Change-Id: I4b4206f4d8c447873f23a3a0066af0d0fa85e18c
Signed-off-by: Yi Zhou <yi.zhou@amlogic.com>
drivers/amlogic/media/enhancement/amdolby_vision/amdolby_vision.c
drivers/amlogic/media/enhancement/amvecm/arch/vpp_dolbyvision_regs.h

index f982410..56c7232 100644 (file)
@@ -2602,6 +2602,10 @@ void enable_dolby_vision(int enable)
                                                0, 3, 1);   /* bypass core3  */
                                VSYNC_WR_MPEG_REG(VPP_WRAP_OSD1_MATRIX_EN_CTRL,
                                        0x0);
+                               VSYNC_WR_MPEG_REG(VPP_WRAP_OSD2_MATRIX_EN_CTRL,
+                                       0x0);
+                               VSYNC_WR_MPEG_REG(VPP_WRAP_OSD3_MATRIX_EN_CTRL,
+                                       0x0);
                                if (dolby_vision_mask & 2)
                                        VSYNC_WR_MPEG_REG_BITS(
                                                DOLBY_PATH_CTRL,
@@ -2851,6 +2855,10 @@ void enable_dolby_vision(int enable)
                        } else if (is_meson_g12()) {
                                VSYNC_WR_MPEG_REG(VPP_WRAP_OSD1_MATRIX_EN_CTRL,
                                        0x1);
+                               VSYNC_WR_MPEG_REG(VPP_WRAP_OSD2_MATRIX_EN_CTRL,
+                                       0x1);
+                               VSYNC_WR_MPEG_REG(VPP_WRAP_OSD3_MATRIX_EN_CTRL,
+                                       0x1);
                                VSYNC_WR_MPEG_REG_BITS(
                                        DOLBY_PATH_CTRL,
                                        (1 << 2) |      /* core2 bypass */
index 9edbc21..0651c43 100644 (file)
@@ -66,6 +66,8 @@
 #define DOLBY_CORE3_INPUT_CSC_CRC      0x36fc
 #define DOLBY_CORE3_OUTPUT_CSC_CRC     0x36fd
 #define VPP_WRAP_OSD1_MATRIX_EN_CTRL 0x3d6d
+#define VPP_WRAP_OSD2_MATRIX_EN_CTRL 0x3d7d
+#define VPP_WRAP_OSD3_MATRIX_EN_CTRL 0x3dbd
 
 #define DOLBY_PATH_CTRL                        0x1a0c
 #define VIU_MISC_CTRL1                 0x1a07