}
#endif
+#ifdef CONFIG_SUPPORT_TOSHIBA_MIPI_LVDS_BRIDGE
+extern void vlcm_vadd_get(void);
+extern void vlcm_vadd_put(void);
+#endif
+
#endif /* DRIVERS_PCI_H */
DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1, asus_hides_smbus_lpc_ich6_resume);
DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1, asus_hides_smbus_lpc_ich6_resume_early);
+#if CONFIG_SUPPORT_TOSHIBA_MIPI_LVDS_BRIDGE
+static void tc35876x_lvds_panel_fixup_suspend(struct pci_dev *dev)
+{
+ vlcm_vadd_put();
+}
+DECLARE_PCI_FIXUP_SUSPEND(PCI_VENDOR_ID_INTEL,
+ 0x082E,
+ tc35876x_lvds_panel_fixup_suspend);
+
+static void tc35876x_lvds_panel_fixup_resume(struct pci_dev *dev)
+{
+ vlcm_vadd_get();
+}
+DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_INTEL,
+ 0x082E,
+ tc35876x_lvds_panel_fixup_resume);
+#endif
+
/*
* SiS 96x south bridge: BIOS typically hides SMBus device...
*/
#include "mdfld_dsi_lvds_bridge.h"
#include "psb_drv.h"
#include <asm/intel_scu_ipc.h>
+#include "psb_powermgmt.h"
#define CONFIG_LVDS_HARD_RESET
#ifdef CONFIG_SUPPORT_TOSHIBA_MIPI_LVDS_BRIDGE
-/*GPIO Pins */
-#define GPIO_MIPI_BRIDGE_RESET 115
-
-#define GPIO_MIPI_LCD_BL_EN 112 /* DV1.0 GP_CORE_016 (+96 = GPIO number), 6S6P_BL_EN */
-#define GPIO_MIPI_LCD_VADD 110
/* All these pins removed on DV1.0 */
#define GPIO_MIPI_LCD_BIAS_EN -1
#define GPIO_MIPI_PANEL_RESET -1
gpio_set_value_cansleep(GPIO_MIPI_LCD_BL_EN, 0);
mdelay(1);
- if (gpio_direction_output(GPIO_MIPI_LCD_VADD, 0))
- gpio_set_value_cansleep(GPIO_MIPI_LCD_VADD, 0);
+ /* try to turn vadd off */
+ vlcm_vadd_put();
}
/* ************************************************************************* *\
printk(KERN_INFO "[DISPLAY ] %s\n", __func__);
- if (gpio_direction_output(GPIO_MIPI_LCD_VADD, 1))
- gpio_set_value_cansleep(GPIO_MIPI_LCD_VADD, 1);
- msleep(260);
+ /* get vadd count, and make sure vadd is on */
+ vlcm_vadd_get();
if (cmi_lcd_i2c_client) {
int ret;
module_init(dsi_lvds_bridge_init);
module_exit(dsi_lvds_bridge_exit);
-
#endif
#ifndef __MDFLD_DSI_LVDS_BRIDGE_H__
#define __MDFLD_DSI_LVDS_BRIDGE_H__
+/*GPIO Pins */
+#define GPIO_MIPI_BRIDGE_RESET 115
+
+#define GPIO_MIPI_LCD_BL_EN 112
+#define GPIO_MIPI_LCD_VADD 110
+
#define GPIOPWMCTRL 0x38F
#define PWM0CLKDIV0 0x62 /* low byte */
#define PWM0CLKDIV1 0x61 /* high byte */
#include "psb_intel_hdmi.h"
#include "mdfld_ti_tpd.h"
#include "mdfld_dsi_dpi.h"
+#include "mdfld_dsi_lvds_bridge.h"
#ifdef CONFIG_GFX_RTPM
#include <linux/pm_runtime.h>
#endif
#include <linux/earlysuspend.h>
+#include <linux/atomic.h>
#undef OSPM_GFX_DPK
#define SCU_CMD_VPROG2 0xe3
else
return 0;
}
+
+#ifdef CONFIG_SUPPORT_TOSHIBA_MIPI_LVDS_BRIDGE
+DEFINE_MUTEX(vadd_mutex);
+static int i2c_access_count;
+
+/* use access count to mark status of i2c bus 2, and make sure avdd is turned on
+ * when accessing this i2c. when accaccess count reaches 1, then turn on lvds
+ * panel's avdd
+ */
+void vlcm_vadd_get()
+{
+ mutex_lock(&vadd_mutex);
+ ++i2c_access_count;
+ if (i2c_access_count == 1) {
+ if (gpio_direction_output(GPIO_MIPI_LCD_VADD, 1)) {
+ pr_err("%s: faild to pull high VADD\n", __func__);
+ goto unlock;
+ }
+ msleep(260);
+ }
+unlock:
+ mutex_unlock(&vadd_mutex);
+}
+
+/* decrease reference count, and turn vadd off when count reaches 0
+ */
+void vlcm_vadd_put()
+{
+ mutex_lock(&vadd_mutex);
+ if (i2c_access_count == 0) {
+ pr_warn("%s: i2c_access_count is 0\n", __func__);
+ goto unlock;
+ }
+
+ --i2c_access_count;
+ if (i2c_access_count > 0)
+ goto unlock;
+ /* i2c_access_count == 0 */
+ if (gpio_direction_output(GPIO_MIPI_LCD_VADD, 0)) {
+ pr_err("%s: faild to pull low VADD\n",
+ __func__);
+ }
+unlock:
+ mutex_unlock(&vadd_mutex);
+}
+#endif
void acquire_ospm_lock(void);
void release_ospm_lock(void);
+#ifdef CONFIG_SUPPORT_TOSHIBA_MIPI_LVDS_BRIDGE
+extern void vlcm_vadd_get(void);
+extern void vlcm_vadd_put(void);
+#endif
#endif /*_PSB_POWERMGMT_H_*/