ARM: dts: imx6q-dhcom: Add interrupt and compatible to the ethernet PHY

Enable the interrupt mode for the ethernet PHY by adding the
necessary property and a separate pinctrl for the PHY. Also
add the compatible property for it.

Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: kernel@dh-electronics.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/imx6q-dhcom-som.dtsi b/arch/arm/boot/dts/imx6q-dhcom-som.dtsi
index 921a695..0b318d4 100644 (file)
--- a/arch/arm/boot/dts/imx6q-dhcom-som.dtsi
+++ b/arch/arm/boot/dts/imx6q-dhcom-som.dtsi
@@ -124,8 +124,13 @@
                #size-cells = <0>;
 
                ethphy0: ethernet-phy@0 {       /* SMSC LAN8710Ai */
-                       reg = <0>;
+                       compatible = "ethernet-phy-ieee802.3-c22";
+                       interrupt-parent = <&gpio4>;
+                       interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
                        max-speed = <100>;
+                       pinctrl-0 = <&pinctrl_ethphy0>;
+                       pinctrl-names = "default";
+                       reg = <0>;
                        reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
                        reset-assert-us = <1000>;
                        reset-deassert-us = <1000>;
@@ -299,8 +304,6 @@
                        MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0     0x1b0b0
                        MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1     0x1b0b0
                        MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
-                       MX6QDL_PAD_EIM_WAIT__GPIO5_IO00         0x000b0
-                       MX6QDL_PAD_KEY_ROW4__GPIO4_IO15         0x000b1
                >;
        };
 
@@ -310,6 +313,13 @@
                >;
        };
 
+       pinctrl_ethphy0: ethphy0-grp {
+               fsl,pins = <
+                       MX6QDL_PAD_EIM_WAIT__GPIO5_IO00         0xb0 /* Reset */
+                       MX6QDL_PAD_KEY_ROW4__GPIO4_IO15         0xb1 /* Int */
+               >;
+       };
+
        pinctrl_flexcan1: flexcan1-grp {
                fsl,pins = <
                        MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX        0x1b0b0