*video_mode_type
*(0=sync_pulse,1=sync_event,2=burst)
*/
- 1 /*clk_lp_continuous(0=stop,1=continue)*/
- 0>; /*phy_stop_wait(0=auto,1=standard,2=slow)*/
+ 1 /*clk_always_hs(0=disable,1=enable)*/
+ 0>; /*phy_switch(0=auto,1=standard,2=slow)*/
/* dsi_init: data_type, num, data... */
dsi_init_on = <0x05 1 0x11
*video_mode_type
*(0=sync_pulse,1=sync_event,2=burst)
*/
- 1 /*clk_lp_continuous(0=stop,1=continue)*/
- 0>; /*phy_stop_wait(0=auto,1=standard,2=slow)*/
+ 0 /*clk_always_hs(0=disable,1=enable)*/
+ 0>; /*phy_switch(0=auto,1=standard,2=slow)*/
/* dsi_init: data_type, num, data... */
dsi_init_on = <
0xf0 3 0 1 30 /* reset high, delay 30ms */
0xf0 3 0 0 10 /* reset low, delay 10ms */
0xf0 3 0 1 30 /* reset high, delay 30ms */
- 0xff 100 /* delay */
0xff 0xff>; /* ending flag */
dsi_init_off = <0xff 0xff>; /* ending flag */
/* extern_init: 0xff for invalid */
};
lcd_2{
- model_name = "ST7701";
+ model_name = "P070ACB";
/*interface(ttl,lvds,mipi)*/
interface = "mipi";
- basic_setting = <480 854 /*h_active, v_active*/
- 570 929 /*h_period, v_period*/
+ basic_setting = <600 1024 /*h_active, v_active*/
+ 680 1194 /*h_period, v_period*/
8 /*lcd_bits*/
- 8 15>; /*screen_widht, screen_height*/
- lcd_timing = <30 30 0 /*hs_width,hs_bp,hs_pol*/
- 5 40 0>; /*vs_width,vs_bp,vs_pol*/
+ 3 5>; /*screen_widht, screen_height*/
+ lcd_timing = <24 36 0 /*hs_width,hs_bp,hs_pol*/
+ 10 80 0>; /*vs_width,vs_bp,vs_pol*/
clk_attr = <0 /*fr_adj_type(0=clock,1=htotal,2=vtotal)*/
0 /*clk_ss_level*/
1 /*clk_auto_generate*/
- 31771800>; /*pixel_clk(unit in Hz)*/
- mipi_attr = <2 /*lane_num*/
+ 48715200>; /*pixel_clk(unit in Hz)*/
+ mipi_attr = <4 /*lane_num*/
400 /*bit_rate_max(MHz)*/
0 /*factor(*100, default 0 for auto)*/
1 /*operation_mode_init(0=video, 1=command)*/
*video_mode_type
*(0=sync_pulse,1=sync_event,2=burst)
*/
- 1 /*clk_lp_continuous(0=stop,1=continue)*/
- 0>; /*phy_stop_wait(0=auto,1=standard,2=slow)*/
+ 0 /*clk_always_hs(0=disable,1=enable)*/
+ 0>; /*phy_switch(0=auto,1=standard,2=slow)*/
/* dsi_init: data_type, num, data... */
dsi_init_on = <0xff 0xff>; /* ending flag */
dsi_init_off = <0xff 0xff>; /* ending flag */
/* extern_init: 0xff for invalid */
- extern_init = <2>;
+ extern_init = <3>;
/* power step: type,index,value,delay(ms) */
power_on_step = <0 0 1 20
0 0 0 10
};
lcd_3{
- model_name = "P070ACB";
+ model_name = "ST7701";
/*interface(ttl,lvds,mipi)*/
interface = "mipi";
- basic_setting = <600 1024 /*h_active, v_active*/
- 680 1194 /*h_period, v_period*/
+ basic_setting = <480 854 /*h_active, v_active*/
+ 570 929 /*h_period, v_period*/
8 /*lcd_bits*/
- 3 5>; /*screen_widht, screen_height*/
- lcd_timing = <24 36 0 /*hs_width,hs_bp,hs_pol*/
- 10 80 0>; /*vs_width,vs_bp,vs_pol*/
+ 8 15>; /*screen_widht, screen_height*/
+ lcd_timing = <30 30 0 /*hs_width,hs_bp,hs_pol*/
+ 5 40 0>; /*vs_width,vs_bp,vs_pol*/
clk_attr = <0 /*fr_adj_type(0=clock,1=htotal,2=vtotal)*/
0 /*clk_ss_level*/
1 /*clk_auto_generate*/
- 48715200>; /*pixel_clk(unit in Hz)*/
- mipi_attr = <4 /*lane_num*/
- 300 /*bit_rate_max(MHz)*/
+ 31771800>; /*pixel_clk(unit in Hz)*/
+ mipi_attr = <2 /*lane_num*/
+ 400 /*bit_rate_max(MHz)*/
0 /*factor(*100, default 0 for auto)*/
1 /*operation_mode_init(0=video, 1=command)*/
0 /*operation_mode_display(0=video, 1=command)*/
*video_mode_type
*(0=sync_pulse,1=sync_event,2=burst)
*/
- 1 /*clk_lp_continuous(0=stop,1=continue)*/
- 0>; /*phy_stop_wait(0=auto,1=standard,2=slow)*/
+ 1 /*clk_always_hs(0=disable,1=enable)*/
+ 0>; /*phy_switch(0=auto,1=standard,2=slow)*/
/* dsi_init: data_type, num, data... */
dsi_init_on = <0xff 0xff>; /* ending flag */
dsi_init_off = <0xff 0xff>; /* ending flag */
/* extern_init: 0xff for invalid */
- extern_init = <3>;
+ extern_init = <2>;
/* power step: type,index,value,delay(ms) */
power_on_step = <0 0 1 20
0 0 0 10
*video_mode_type
*(0=sync_pulse,1=sync_event,2=burst)
*/
- 1 /*clk_lp_continuous(0=stop,1=continue)*/
- 0>; /*phy_stop_wait(0=auto,1=standard,2=slow)*/
+ 1 /*clk_always_hs(0=disable,1=enable)*/
+ 0>; /*phy_switch(0=auto,1=standard,2=slow)*/
/* dsi_init: data_type, num, data... */
dsi_init_on = <0x05 1 0x11
*video_mode_type
*(0=sync_pulse,1=sync_event,2=burst)
*/
- 1 /*clk_lp_continuous(0=stop,1=continue)*/
- 0>; /*phy_stop_wait(0=auto,1=standard,2=slow)*/
+ 0 /*clk_always_hs(0=disable,1=enable)*/
+ 0>; /*phy_switch(0=auto,1=standard,2=slow)*/
/* dsi_init: data_type, num, data... */
dsi_init_on = <
0xff 10
0xf0 3 0 0 10 /* reset low, delay 10ms */
0xf0 3 0 1 30 /* reset high, delay 30ms */
0xfc 2 0x04 3 /* check_reg, check_cnt */
- 0xff 100 /* delay */
0xff 0xff>; /* ending flag */
dsi_init_off = <0xff 0xff>; /* ending flag */
/* extern_init: 0xff for invalid */
*video_mode_type
*(0=sync_pulse,1=sync_event,2=burst)
*/
- 1 /*clk_lp_continuous(0=stop,1=continue)*/
- 0>; /*phy_stop_wait(0=auto,1=standard,2=slow)*/
+ 0 /*clk_always_hs(0=disable,1=enable)*/
+ 0>; /*phy_switch(0=auto,1=standard,2=slow)*/
/* dsi_init: data_type, num, data... */
dsi_init_on = <
0xff 10
*video_mode_type
*(0=sync_pulse,1=sync_event,2=burst)
*/
- 1 /*clk_lp_continuous(0=stop,1=continue)*/
- 0>; /*phy_stop_wait(0=auto,1=standard,2=slow)*/
+ 1 /*clk_always_hs(0=disable,1=enable)*/
+ 0>; /*phy_switch(0=auto,1=standard,2=slow)*/
/* dsi_init: data_type, num, data... */
dsi_init_on = <0xff 0xff>; /* ending flag */
dsi_init_off = <0xff 0xff>; /* ending flag */
*video_mode_type
*(0=sync_pulse,1=sync_event,2=burst)
*/
- 1 /*clk_lp_continuous(0=stop,1=continue)*/
- 0>; /*phy_stop_wait(0=auto,1=standard,2=slow)*/
+ 1 /*clk_always_hs(0=disable,1=enable)*/
+ 0>; /*phy_switch(0=auto,1=standard,2=slow)*/
/* dsi_init: data_type, num, data... */
dsi_init_on = <0x05 1 0x11
int n, len = 0;
n = lcd_debug_info_len(len + offset);
- len += snprintf((buf+len), n, "\nmipi_dsi_host regs:\n");
- reg = MIPI_DSI_DWC_PWR_UP_OS;
+ len += snprintf((buf+len), n, "\nmipi_dsi regs:\n");
+ n = lcd_debug_info_len(len + offset);
+ reg = MIPI_DSI_TOP_CNTL;
+ len += snprintf((buf+len), n,
+ "MIPI_DSI_TOP_CNTL [0x%04x] = 0x%08x\n",
+ reg, dsi_host_read(reg));
+ n = lcd_debug_info_len(len + offset);
+ reg = MIPI_DSI_TOP_CLK_CNTL;
+ len += snprintf((buf+len), n,
+ "MIPI_DSI_TOP_CLK_CNTL [0x%04x] = 0x%08x\n",
+ reg, dsi_host_read(reg));
n = lcd_debug_info_len(len + offset);
+ reg = MIPI_DSI_DWC_PWR_UP_OS;
len += snprintf((buf+len), n,
"MIPI_DSI_DWC_PWR_UP_OS [0x%04x] = 0x%08x\n",
reg, dsi_host_read(reg));
n = lcd_debug_info_len(len + offset);
- reg = MIPI_DSI_TOP_SW_RESET;
+ reg = MIPI_DSI_DWC_PCKHDL_CFG_OS;
len += snprintf((buf+len), n,
- "MIPI_DSI_TOP_SW_RESET [0x%04x] = 0x%08x\n",
+ "MIPI_DSI_DWC_PCKHDL_CFG_OS [0x%04x] = 0x%08x\n",
reg, dsi_host_read(reg));
n = lcd_debug_info_len(len + offset);
- reg = MIPI_DSI_TOP_CLK_CNTL;
+ reg = MIPI_DSI_DWC_LPCLK_CTRL_OS;
len += snprintf((buf+len), n,
- "MIPI_DSI_TOP_CLK_CNTL [0x%04x] = 0x%08x\n",
+ "MIPI_DSI_DWC_LPCLK_CTRL_OS [0x%04x] = 0x%08x\n",
reg, dsi_host_read(reg));
n = lcd_debug_info_len(len + offset);
- reg = MIPI_DSI_TOP_CNTL;
+ reg = MIPI_DSI_DWC_CMD_MODE_CFG_OS;
len += snprintf((buf+len), n,
- "MIPI_DSI_TOP_CNTL [0x%04x] = 0x%08x\n",
+ "MIPI_DSI_DWC_CMD_MODE_CFG_OS [0x%04x] = 0x%08x\n",
+ reg, dsi_host_read(reg));
+ n = lcd_debug_info_len(len + offset);
+ reg = MIPI_DSI_DWC_VID_MODE_CFG_OS;
+ len += snprintf((buf+len), n,
+ "MIPI_DSI_DWC_VID_MODE_CFG_OS [0x%04x] = 0x%08x\n",
+ reg, dsi_host_read(reg));
+ n = lcd_debug_info_len(len + offset);
+ reg = MIPI_DSI_DWC_MODE_CFG_OS;
+ len += snprintf((buf+len), n,
+ "MIPI_DSI_DWC_MODE_CFG_OS [0x%04x] = 0x%08x\n",
+ reg, dsi_host_read(reg));
+ n = lcd_debug_info_len(len + offset);
+ reg = MIPI_DSI_DWC_PHY_STATUS_OS;
+ len += snprintf((buf+len), n,
+ "MIPI_DSI_DWC_PHY_STATUS_OS [0x%04x] = 0x%08x\n",
+ reg, dsi_host_read(reg));
+ n = lcd_debug_info_len(len + offset);
+ reg = MIPI_DSI_DWC_INT_ST0_OS;
+ len += snprintf((buf+len), n,
+ "MIPI_DSI_DWC_INT_ST0_OS [0x%04x] = 0x%08x\n",
+ reg, dsi_host_read(reg));
+ n = lcd_debug_info_len(len + offset);
+ reg = MIPI_DSI_DWC_INT_ST1_OS;
+ len += snprintf((buf+len), n,
+ "MIPI_DSI_DWC_INT_ST1_OS [0x%04x] = 0x%08x\n",
reg, dsi_host_read(reg));
n = lcd_debug_info_len(len + offset);
reg = MIPI_DSI_TOP_STAT;
len += snprintf((buf+len), n,
"MIPI_DSI_TOP_MEM_PD [0x%04x] = 0x%08x\n",
reg, dsi_host_read(reg));
- //reg = HHI_LVDS_TX_PHY_CNTL0;
- //pr_info("VX1_PHY_CNTL0 [0x%04x] = 0x%08x\n",
- // reg, lcd_hiu_read(reg));
return len;
}
static const char *lcd_mipi_debug_usage_str = {
"Usage:\n"
-" echo <lane_num> <bit_rate_max> <factor> <op_mode_init> <op_mode_disp> <vid_mode_type> <clk_lp_continuous> <phy_stop_wait> > mipi ; set mpi config\n"
+" echo <lane_num> <bit_rate_max> <factor> <op_mode_init> <op_mode_disp> <vid_mode_type> <clk_always_hs> <phy_switch> > mipi ; set mpi config\n"
"data format:\n"
" <lane_num> : 1/2/3/4\n"
" <bit_rate_max> : unit in MHz\n"
" <op_mode_init> : operation mode for init (0=video mode, 1=command mode)\n"
" <op_mode_disp> : operation mode for display (0=video mode, 1=command mode)\n"
" <vid_mode_type> : video mode type (0=sync_pulse, 1=sync_event, 2=burst)\n"
-" <clk_lp_continuous> : 0=stop, 1=continue\n"
-" <phy_stop_wait> : 0=auto, 1=standard, 2=slow\n"
+" <clk_always_hs> : 0=disable, 1=enable\n"
+" <phy_switch> : 0=auto, 1=standard, 2=slow\n"
"\n"
};
dsi_conf->operation_mode_init = (unsigned char)val[3];
dsi_conf->operation_mode_display = (unsigned char)val[4];
dsi_conf->video_mode_type = (unsigned char)val[5];
- dsi_conf->clk_lp_continuous = (unsigned char)val[6];
- dsi_conf->phy_stop_wait = (unsigned char)val[7];
+ dsi_conf->clk_always_hs = (unsigned char)val[6];
+ dsi_conf->phy_switch = (unsigned char)val[7];
pr_info("set mipi_dsi config:\n"
"lane_num=%d, bit_rate_max=%dMhz, factor_numerator=%d\n"
"operation_mode_init=%d, operation_mode_display=%d\n"
"video_mode_type=%d\n"
- "clk_lp_continuous=%d, phy_stop_wait=%d\n\n",
+ "clk_always_hs=%d, phy_switch=%d\n\n",
dsi_conf->lane_num,
dsi_conf->bit_rate_max,
dsi_conf->factor_numerator,
dsi_conf->operation_mode_init,
dsi_conf->operation_mode_display,
dsi_conf->video_mode_type,
- dsi_conf->clk_lp_continuous,
- dsi_conf->phy_stop_wait);
+ dsi_conf->clk_always_hs,
+ dsi_conf->phy_switch);
lcd_debug_config_update();
} else {
pr_info("invalid data\n");
* special: data_type=0xff, num<0xff means delay ms, num=0xff means ending.
*/
static unsigned char mipi_init_on_table[] = {
+ 0xff, 100, /* delay */
+ 0x15, 2, 0x62, 0x01,
0x29, 5, 0xFF, 0xAA, 0x55, 0x25, 0x01,
0x23, 2, 0xFC, 0x08,
0xFF, 1, /* delay(ms) */
pconf->lcd_control.mipi_config->operation_mode_display);
LCDPR("video_mode_type = %d\n",
pconf->lcd_control.mipi_config->video_mode_type);
- LCDPR("clk_lp_continuous = %d\n",
- pconf->lcd_control.mipi_config->clk_lp_continuous);
- LCDPR("phy_stop_wait = %d\n",
- pconf->lcd_control.mipi_config->phy_stop_wait);
+ LCDPR("clk_always_hs = %d\n",
+ pconf->lcd_control.mipi_config->clk_always_hs);
+ LCDPR("phy_switch = %d\n",
+ pconf->lcd_control.mipi_config->phy_switch);
LCDPR("extern_init = %d\n",
pconf->lcd_control.mipi_config->extern_init);
}
= para[4];
pconf->lcd_control.mipi_config->video_mode_type
= para[5];
- pconf->lcd_control.mipi_config->clk_lp_continuous
+ pconf->lcd_control.mipi_config->clk_always_hs
= para[6];
- pconf->lcd_control.mipi_config->phy_stop_wait
+ pconf->lcd_control.mipi_config->phy_switch
= para[7];
}
"un-support type",
};
-static char *phy_stop_wait_table[] = {
+static char *phy_switch_table[] = {
"AUTO",
"STANDARD",
"SLOW",
for (j = 0; j < n; j++) {
if (j == 0) {
len += sprintf(str+len, "0x%02x,",
- dsi_table[i+j]);
+ dsi_table[i]);
} else {
len += sprintf(str+len, "%d,",
dsi_table[i+j]);
" init: %s(%d)\n"
" display: %s(%d)\n"
" video mode type: %s(%d)\n"
- " clk lp continuous: %d\n"
- " phy stop wait: %s(%d)\n"
+ " clk always hs: %d\n"
+ " phy switch: %s(%d)\n"
" data format: %s\n"
" lp escape clock: %d.%03dMHz\n",
dconf->lane_num, dconf->bit_rate_max,
dconf->operation_mode_display,
video_mode_type_table[dconf->video_mode_type],
dconf->video_mode_type,
- dconf->clk_lp_continuous,
- phy_stop_wait_table[dconf->phy_stop_wait],
- dconf->phy_stop_wait,
+ dconf->clk_always_hs,
+ phy_switch_table[dconf->phy_switch],
+ dconf->phy_switch,
video_data_type_table[dconf->dpi_data_format],
(esc_clk / 1000000), (esc_clk % 1000000) / 1000);
}
}
-static void dsi_phy_config_set(struct lcd_config_s *pconf)
+static void set_dsi_phy_config(struct lcd_config_s *pconf)
{
if (lcd_debug_print_flag)
LCDPR("%s\n", __func__);
dsi_phy_set_mask(MIPI_DSI_PHY_CTRL, (1 << 1));
/* Startup transfer */
- if (pconf->lcd_control.mipi_config->clk_lp_continuous) {
- dsi_host_write(MIPI_DSI_DWC_LPCLK_CTRL_OS,
+ dsi_host_write(MIPI_DSI_DWC_LPCLK_CTRL_OS,
+ (0x1 << BIT_AUTOCLKLANE_CTRL) |
(0x1 << BIT_TXREQUESTCLKHS));
- } else {
- dsi_host_write(MIPI_DSI_DWC_LPCLK_CTRL_OS,
- (0x1 << BIT_AUTOCLKLANE_CTRL) | (0x1 << BIT_TXREQUESTCLKHS));
- }
}
static void startup_mipi_dsi_host(void)
mdelay(10);
}
+static void set_mipi_dsi_lpclk_ctrl(struct dsi_config_s *dconf,
+ unsigned int operation_mode)
+{
+ unsigned int lpclk = 1;
+
+ if (operation_mode == OPERATION_VIDEO_MODE) {
+ if (dconf->clk_always_hs) /* clk always hs */
+ lpclk = 0;
+ else /* enable clk lp state */
+ lpclk = 1;
+ } else { /* enable clk lp state */
+ lpclk = 1;
+ }
+ dsi_host_setb(MIPI_DSI_DWC_LPCLK_CTRL_OS,
+ lpclk, BIT_AUTOCLKLANE_CTRL, 1);
+}
+
/* *************************************************************
* Function: set_mipi_dsi_host
* Parameters: vcid, // virtual id
mipi_dsi_video_config(pconf);
}
-static void mipi_dsi_host_init(struct lcd_config_s *pconf)
-{
- unsigned int op_mode_init;
-
- if (lcd_debug_print_flag)
- LCDPR("%s\n", __func__);
-
- op_mode_init = pconf->lcd_control.mipi_config->operation_mode_init;
- mipi_dcs_set(MIPI_DSI_CMD_TRANS_TYPE, /* 0: high speed, 1: low power */
- MIPI_DSI_DCS_ACK_TYPE, /* if need bta ack check */
- MIPI_DSI_TEAR_SWITCH); /* enable tear ack */
-
- set_mipi_dsi_host(MIPI_DSI_VIRTUAL_CHAN_ID, /* Virtual channel id */
- 0, /* Chroma sub sample, only for YUV 422 or 420, even or odd */
- op_mode_init, /* DSI operation mode, video or command */
- pconf);
-}
-
static void mipi_dsi_link_on(struct lcd_config_s *pconf)
{
unsigned int op_mode_init, op_mode_disp;
op_mode_init = dconf->operation_mode_init;
op_mode_disp = dconf->operation_mode_display;
+ set_mipi_dsi_lpclk_ctrl(dconf, op_mode_init);
+
if (dconf->dsi_init_on) {
dsi_write_cmd(dconf->dsi_init_on);
LCDPR("dsi init on\n");
*/
op_mode_disp, /* DSI operation mode, video or command */
pconf);
+ set_mipi_dsi_lpclk_ctrl(dconf, op_mode_disp);
}
}
void mipi_dsi_link_off(struct lcd_config_s *pconf)
{
+ unsigned int op_mode_init, op_mode_disp;
struct dsi_config_s *dconf;
#ifdef CONFIG_AMLOGIC_LCD_EXTERN
struct aml_lcd_extern_driver_s *lcd_ext;
LCDPR("%s\n", __func__);
dconf = pconf->lcd_control.mipi_config;
+ op_mode_init = dconf->operation_mode_init;
+ op_mode_disp = dconf->operation_mode_display;
+
+ if (op_mode_disp != op_mode_init) {
+ set_mipi_dsi_host(MIPI_DSI_VIRTUAL_CHAN_ID,
+ 0, /* Chroma sub sample, only for
+ * YUV 422 or 420, even or odd
+ */
+ op_mode_init, /* DSI operation mode, video or command */
+ pconf);
+ set_mipi_dsi_lpclk_ctrl(dconf, op_mode_init);
+ }
#ifdef CONFIG_AMLOGIC_LCD_EXTERN
if (dconf->extern_init < LCD_EXTERN_INDEX_INVALID) {
}
/* Venc resolution format */
- switch (dconf->phy_stop_wait) {
+ switch (dconf->phy_switch) {
case 1: /* standard */
dsi_phy_config.state_change = 1;
break;
static void mipi_dsi_host_on(struct lcd_config_s *pconf)
{
+ unsigned int op_mode_init;
+
+ if (lcd_debug_print_flag)
+ LCDPR("%s\n", __func__);
+
startup_mipi_dsi_host();
- mipi_dsi_host_init(pconf);
- dsi_phy_config_set(pconf);
+
+ op_mode_init = pconf->lcd_control.mipi_config->operation_mode_init;
+ mipi_dcs_set(MIPI_DSI_CMD_TRANS_TYPE, /* 0: high speed, 1: low power */
+ MIPI_DSI_DCS_ACK_TYPE, /* if need bta ack check */
+ MIPI_DSI_TEAR_SWITCH); /* enable tear ack */
+
+ set_mipi_dsi_host(MIPI_DSI_VIRTUAL_CHAN_ID, /* Virtual channel id */
+ 0, /* Chroma sub sample, only for YUV 422 or 420, even or odd */
+ op_mode_init, /* DSI operation mode, video or command */
+ pconf);
+ set_dsi_phy_config(pconf);
mipi_dsi_link_on(pconf);
.operation_mode_init = 1, /* 0=video mode, 1=command mode */
.operation_mode_display = 0, /* 0=video mode, 1=command mode */
.video_mode_type = 2, /* 0=sync_pulse, 1=sync_event, 2=burst */
- .clk_lp_continuous = 1, /* 0=stop, 1=continue */
- .phy_stop_wait = 0, /* 0=auto, 1=standard, 2=slow */
+ .clk_always_hs = 1, /* 0=disable, 1=enable */
+ .phy_switch = 0, /* 0=auto, 1=standard, 2=slow */
.dsi_init_on = &dsi_init_on_table[0],
.dsi_init_off = &dsi_init_off_table[0],
unsigned char operation_mode_init; /* 0=video mode, 1=command mode */
unsigned char operation_mode_display; /* 0=video mode, 1=command mode */
unsigned char video_mode_type; /* 0=sync_pulse, 1=sync_event, 2=burst */
- unsigned char clk_lp_continuous; /* 0=stop, 1=continue */
- unsigned char phy_stop_wait; /* 0=auto, 1=standard, 2=slow */
+ unsigned char clk_always_hs; /* 0=disable, 1=enable */
+ unsigned char phy_switch; /* 0=auto, 1=standard, 2=slow */
unsigned int venc_data_width;
unsigned int dpi_data_format;
projects / platform / kernel / linux-amlogic.git / commitdiff