Add support for the upcoming PITCHLOCK register. The FIFO register

is deprecated but support is retained so the driver works with
Workstation 5.5 and friends.

diff --git a/src/svga_reg.h b/src/svga_reg.h
index 04995b8..871a8ff 100644 (file)
--- a/src/svga_reg.h
+++ b/src/svga_reg.h
@@ -116,8 +116,9 @@ enum {
    SVGA_REG_HOST_BITS_PER_PIXEL = 28, /* Current bpp in the host */
    SVGA_REG_SCRATCH_SIZE = 29,     /* Number of scratch registers */
    SVGA_REG_MEM_REGS = 30,         /* Number of FIFO registers */
-
-   SVGA_REG_TOP = 31,             /* Must be 1 more than the last register */
+   SVGA_REG_NUM_DISPLAYS = 31,     /* Number of guest displays */
+   SVGA_REG_PITCHLOCK = 32,        /* Fixed pitch for all modes */
+   SVGA_REG_TOP = 33,             /* Must be 1 more than the last register */
 
    SVGA_PALETTE_BASE = 1024,      /* Base of SVGA color map */
    /* Next 768 (== 256*3) registers exist for colormap */
@@ -133,23 +134,25 @@ enum {
  *  Capabilities
  */
 
-#define        SVGA_CAP_NONE               0x0000
-#define        SVGA_CAP_RECT_FILL          0x0001
-#define        SVGA_CAP_RECT_COPY          0x0002
-#define        SVGA_CAP_RECT_PAT_FILL      0x0004
-#define        SVGA_CAP_LEGACY_OFFSCREEN   0x0008
-#define        SVGA_CAP_RASTER_OP          0x0010
-#define        SVGA_CAP_CURSOR             0x0020
-#define        SVGA_CAP_CURSOR_BYPASS      0x0040
-#define        SVGA_CAP_CURSOR_BYPASS_2    0x0080
-#define        SVGA_CAP_8BIT_EMULATION     0x0100
-#define SVGA_CAP_ALPHA_CURSOR       0x0200
-#define SVGA_CAP_GLYPH              0x0400
-#define SVGA_CAP_GLYPH_CLIPPING     0x0800
-#define SVGA_CAP_OFFSCREEN_1        0x1000
-#define SVGA_CAP_ALPHA_BLEND        0x2000
-#define SVGA_CAP_3D                 0x4000
-#define SVGA_CAP_EXTENDED_FIFO      0x8000
+#define        SVGA_CAP_NONE               0x00000
+#define        SVGA_CAP_RECT_FILL          0x00001
+#define        SVGA_CAP_RECT_COPY          0x00002
+#define        SVGA_CAP_RECT_PAT_FILL      0x00004
+#define        SVGA_CAP_LEGACY_OFFSCREEN   0x00008
+#define        SVGA_CAP_RASTER_OP          0x00010
+#define        SVGA_CAP_CURSOR             0x00020
+#define        SVGA_CAP_CURSOR_BYPASS      0x00040
+#define        SVGA_CAP_CURSOR_BYPASS_2    0x00080
+#define        SVGA_CAP_8BIT_EMULATION     0x00100
+#define SVGA_CAP_ALPHA_CURSOR       0x00200
+#define SVGA_CAP_GLYPH              0x00400
+#define SVGA_CAP_GLYPH_CLIPPING     0x00800
+#define SVGA_CAP_OFFSCREEN_1        0x01000
+#define SVGA_CAP_ALPHA_BLEND        0x02000
+#define SVGA_CAP_3D                 0x04000
+#define SVGA_CAP_EXTENDED_FIFO      0x08000
+#define SVGA_CAP_MULTIMON           0x10000
+#define SVGA_CAP_PITCHLOCK          0x20000
 
 /*
  *  Raster op codes (same encoding as X) used by FIFO drivers.

diff --git a/src/vmware.c b/src/vmware.c
index 50af954..e08bc38 100644 (file)
--- a/src/vmware.c
+++ b/src/vmware.c
@@ -277,12 +277,18 @@ vmwareSendSVGACmdUpdateFullScreen(VMWAREPtr pVMWARE)
 }
 
 static void
-vmwareSendSVGACmdPitchLock(VMWAREPtr pVMWARE, unsigned long fbPitch)
+vmwareSetPitchLock(VMWAREPtr pVMWARE, unsigned long fbPitch)
 {
    CARD32 *vmwareFIFO = pVMWARE->vmwareFIFO;
 
-   if (pVMWARE->canPitchLock && vmwareFIFO[SVGA_FIFO_MIN] >=
-                                (vmwareReadReg(pVMWARE, SVGA_REG_MEM_REGS) << 2)) {
+   VmwareLog(("Attempting to set pitchlock\n"));
+
+   if (pVMWARE->vmwareCapability & SVGA_CAP_PITCHLOCK) {
+      VmwareLog(("Using PitchLock register\n"));
+      vmwareWriteReg(pVMWARE, SVGA_REG_PITCHLOCK, fbPitch);
+   } else if (pVMWARE->hasPitchLockFIFOReg &&
+              vmwareFIFO[SVGA_FIFO_MIN] >= (vmwareReadReg(pVMWARE, SVGA_REG_MEM_REGS) << 2)) {
+      VmwareLog(("Using PitchLock FIFO register\n"));
       vmwareFIFO[SVGA_FIFO_PITCHLOCK] = fbPitch;
    }
 }
@@ -1019,7 +1025,7 @@ VMWAREInitFIFO(ScrnInfoPtr pScrn)
     vmwareFIFO[SVGA_FIFO_STOP] = min * sizeof(CARD32);
     vmwareWriteReg(pVMWARE, SVGA_REG_CONFIG_DONE, 1);
 
-    pVMWARE->canPitchLock =
+    pVMWARE->hasPitchLockFIFOReg =
         extendedFifo && (vmwareFIFO[SVGA_FIFO_CAPABILITIES] & SVGA_FIFO_CAP_PITCHLOCK);
 }
 
@@ -1052,7 +1058,7 @@ VMWARECloseScreen(int scrnIndex, ScreenPtr pScreen)
             vmwareXAACloseScreen(pScreen);
         }
 
-        vmwareSendSVGACmdPitchLock(pVMWARE, 0);
+        vmwareSetPitchLock(pVMWARE, 0);
 
         VMWARERestore(pScrn);
         VMWAREUnmapMem(pScrn);
@@ -1252,7 +1258,7 @@ VMWAREScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
     /* Initialise the first mode */
     VMWAREModeInit(pScrn, pScrn->currentMode);
 
-    vmwareSendSVGACmdPitchLock(pVMWARE, pVMWARE->fbPitch);
+    vmwareSetPitchLock(pVMWARE, pVMWARE->fbPitch);
 
     /* Set the viewport if supported */
     VMWAREAdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0);
@@ -1453,7 +1459,7 @@ VMWAREEnterVT(int scrnIndex, int flags)
         VMWAREInitFIFO(pScrn);
     }
 
-    vmwareSendSVGACmdPitchLock(pVMWARE, pVMWARE->fbPitch);
+    vmwareSetPitchLock(pVMWARE, pVMWARE->fbPitch);
 
     return VMWAREModeInit(pScrn, pScrn->currentMode);
 }
@@ -1464,7 +1470,7 @@ VMWARELeaveVT(int scrnIndex, int flags)
     ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
     VMWAREPtr pVMWARE = VMWAREPTR(pScrn);
 
-    vmwareSendSVGACmdPitchLock(pVMWARE, 0);
+    vmwareSetPitchLock(pVMWARE, 0);
 
     VMWARERestore(pScrn);
 }

diff --git a/src/vmware.h b/src/vmware.h
index 5865522..4b98ebb 100644 (file)
--- a/src/vmware.h
+++ b/src/vmware.h
@@ -103,7 +103,7 @@ typedef struct {
 
     unsigned char* mmioVirtBase;
     CARD32* vmwareFIFO;
-    Bool canPitchLock;
+    Bool hasPitchLockFIFOReg;
 
     xf86CursorInfoPtr CursorInfoRec;
     struct {