; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -relocation-model=pic -verify-machineinstrs < %s \
+; RUN: llc -relocation-model=pic -verify-machineinstrs -start-before=hardware-loops < %s \
; RUN: -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 | FileCheck %s
+
+; NOTE: this needs to run starting at HW loops to ensure that the original loop
+; does not end up producing a HW loop. If other passes are run prior, the loop
+; will be transformed.
+
%struct.e.0.12.28.44.104.108.112.188 = type { i32 }
%struct.t.1.13.29.45.105.109.113.189 = type { i64, i64 }
; CHECK-LABEL: _ZNK1q1rEv:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr 0
+; CHECK-NEXT: std 28, -32(1) # 8-byte Folded Spill
; CHECK-NEXT: std 29, -24(1) # 8-byte Folded Spill
; CHECK-NEXT: std 30, -16(1) # 8-byte Folded Spill
; CHECK-NEXT: stdu 1, -64(1)
; CHECK-NEXT: std 0, 80(1)
+; CHECK-NEXT: li 29, 0
; CHECK-NEXT: lwz 30, 0(3)
; CHECK-NEXT: addis 3, 2, .LC0@toc@ha
-; CHECK-NEXT: ld 29, .LC0@toc@l(3)
+; CHECK-NEXT: ld 28, .LC0@toc@l(3)
; CHECK-NEXT: addis 3, 2, aj@got@tlsgd@ha
; CHECK-NEXT: addi 3, 3, aj@got@tlsgd@l
; CHECK-NEXT: bl __tls_get_addr(aj@tlsgd)
; CHECK-NEXT: .p2align 5
; CHECK-NEXT: .LBB0_1: # %monotonic.i
; CHECK-NEXT: #
-; CHECK-NEXT: lwz 5, 0(29)
+; CHECK-NEXT: lwz 5, 0(28)
; CHECK-NEXT: andi. 5, 5, 255
; CHECK-NEXT: bne 0, .LBB0_4
; CHECK-NEXT: # %bb.2: # %for.cond.i
; CHECK-NEXT: #
-; CHECK-NEXT: addi 30, 30, -1
-; CHECK-NEXT: cmplwi 30, 0
+; CHECK-NEXT: addi 29, 29, 1
+; CHECK-NEXT: cmplw 29, 30
; CHECK-NEXT: bne 0, .LBB0_1
; CHECK-NEXT: # %bb.3:
; CHECK-NEXT: mr 4, 3
; CHECK-NEXT: ld 0, 16(1)
; CHECK-NEXT: ld 30, -16(1) # 8-byte Folded Reload
; CHECK-NEXT: ld 29, -24(1) # 8-byte Folded Reload
+; CHECK-NEXT: ld 28, -32(1) # 8-byte Folded Reload
; CHECK-NEXT: mtlr 0
; CHECK-NEXT: blr
entry: