mx51: add support for pwm
authorArnaud Patard (Rtp) <arnaud.patard@rtp-net.org>
Thu, 13 Jan 2011 11:26:40 +0000 (12:26 +0100)
committerSascha Hauer <s.hauer@pengutronix.de>
Thu, 13 Jan 2011 13:03:58 +0000 (14:03 +0100)
This patch is adding support for pwm1 and pwm2 devices found
on mx51.
[ this patch has been tested with pwm-backlight driver ]

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
arch/arm/mach-mx5/clock-mx51-mx53.c
arch/arm/plat-mxc/pwm.c

index f1f45b6..ce4ffd7 100644 (file)
@@ -1191,6 +1191,11 @@ DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET,
 DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG9_OFFSET,
        NULL,  NULL, &ipg_clk, &gpt_ipg_clk);
 
+DEFINE_CLOCK(pwm1_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG6_OFFSET,
+       NULL, NULL, &ipg_clk, NULL);
+DEFINE_CLOCK(pwm2_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG8_OFFSET,
+       NULL, NULL, &ipg_clk, NULL);
+
 /* I2C */
 DEFINE_CLOCK(i2c1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG9_OFFSET,
        NULL, NULL, &ipg_clk, NULL);
@@ -1283,6 +1288,8 @@ static struct clk_lookup mx51_lookups[] = {
        _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk)
        _REGISTER_CLOCK(NULL, "gpt", gpt_clk)
        _REGISTER_CLOCK("fec.0", NULL, fec_clk)
+       _REGISTER_CLOCK("mxc_pwm.0", "pwm", pwm1_clk)
+       _REGISTER_CLOCK("mxc_pwm.1", "pwm", pwm2_clk)
        _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk)
        _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk)
        _REGISTER_CLOCK("imx-i2c.2", NULL, hsi2c_clk)
index c36f263..7a61ef8 100644 (file)
@@ -57,7 +57,7 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
        if (pwm == NULL || period_ns == 0 || duty_ns > period_ns)
                return -EINVAL;
 
-       if (cpu_is_mx27() || cpu_is_mx3() || cpu_is_mx25()) {
+       if (cpu_is_mx27() || cpu_is_mx3() || cpu_is_mx25() || cpu_is_mx51()) {
                unsigned long long c;
                unsigned long period_cycles, duty_cycles, prescale;
                u32 cr;