[NVPTX] Correctly set regs for neg, abs intrinsics
authorJakub Chlanda <j.chlanda@gmail.com>
Fri, 4 Mar 2022 19:05:00 +0000 (11:05 -0800)
committerArtem Belevich <tra@google.com>
Fri, 4 Mar 2022 19:06:07 +0000 (11:06 -0800)
This patch fixes a bug introduced in D117887.

Reviewed By: tra

Differential Revision: https://reviews.llvm.org/D120991

llvm/lib/Target/NVPTX/NVPTXIntrinsics.td

index 9cf4153..176ba20 100644 (file)
@@ -855,13 +855,13 @@ def INT_NVVM_FABS_D : F_MATH_1<"abs.f64 \t$dst, $src0;", Float64Regs,
 // Abs, Neg bf16, bf16x2
 //
 
-def INT_NVVM_ABS_BF16 : F_MATH_1<"abs.bf16 \t$dst, $dst;", Int16Regs,
+def INT_NVVM_ABS_BF16 : F_MATH_1<"abs.bf16 \t$dst, $src0;", Int16Regs,
   Int16Regs, int_nvvm_abs_bf16, [hasPTX70, hasSM80]>;
-def INT_NVVM_ABS_BF16X2 : F_MATH_1<"abs.bf16x2 \t$dst, $dst;", Int32Regs,
+def INT_NVVM_ABS_BF16X2 : F_MATH_1<"abs.bf16x2 \t$dst, $src0;", Int32Regs,
   Int32Regs, int_nvvm_abs_bf16x2, [hasPTX70, hasSM80]>;
-def INT_NVVM_NEG_BF16 : F_MATH_1<"neg.bf16 \t$dst, $dst;", Int16Regs,
+def INT_NVVM_NEG_BF16 : F_MATH_1<"neg.bf16 \t$dst, $src0;", Int16Regs,
   Int16Regs, int_nvvm_neg_bf16, [hasPTX70, hasSM80]>;
-def INT_NVVM_NEG_BF16X2 : F_MATH_1<"neg.bf16x2 \t$dst, $dst;", Int32Regs,
+def INT_NVVM_NEG_BF16X2 : F_MATH_1<"neg.bf16x2 \t$dst, $src0;", Int32Regs,
   Int32Regs, int_nvvm_neg_bf16x2, [hasPTX70, hasSM80]>;
 
 //