[RISCV] Tighten type constraint for RISCVISD::FCLASS_VL.

diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td b/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
index 6ba45a2..ac333e6 100644 (file)
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
@@ -133,6 +133,7 @@ def riscv_fclass_vl : SDNode<"RISCVISD::FCLASS_VL",
                              SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisVec<0>,
                                                   SDTCisFP<1>, SDTCisVec<1>,
                                                   SDTCisSameSizeAs<0, 1>,
+                                                  SDTCisSameNumEltsAs<0, 1>,
                                                   SDTCVecEltisVT<2, i1>,
                                                   SDTCisSameNumEltsAs<0, 2>,
                                                   SDTCisVT<3, XLenVT>]>>;