drm/etnaviv: hack: use only pta id 0
authorIcenowy Zheng <uwu@icenowy.me>
Sun, 3 Dec 2023 07:49:18 +0000 (15:49 +0800)
committerJaehoon Chung <jh80.chung@samsung.com>
Wed, 13 Mar 2024 06:58:58 +0000 (15:58 +0900)
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
(cherry picked from commit afcdc418d4e64f6f0e62747b1959b6883e3711ee)
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
drivers/gpu/drm/etnaviv/etnaviv_buffer.c
drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c
drivers/gpu/drm/etnaviv/etnaviv_mmu.h

index 384df1659be60d00910161c3c3b07711dc265c38..74033e7870ac1319874f65541d0a92c33d6be4eb 100644 (file)
@@ -417,8 +417,11 @@ void etnaviv_buffer_queue(struct etnaviv_gpu *gpu, u32 exec_state,
 
                                if (switch_mmu_context &&
                                    gpu->sec_mode == ETNA_SEC_KERNEL) {
-                                       unsigned short id =
-                                               etnaviv_iommuv2_get_pta_id(gpu->mmu_context);
+                                       unsigned short id;
+
+                                       etnaviv_iommuv2_update_pta_entry(gpu->mmu_context);
+
+                                       id = etnaviv_iommuv2_get_pta_id(gpu->mmu_context);
                                        CMD_LOAD_STATE(buffer,
                                                VIVS_MMUv2_PTA_CONFIG,
                                                VIVS_MMUv2_PTA_CONFIG_INDEX(id));
index d664ae29ae2096996996bf2ed7c624a33396620a..33a28201c863c9e595e99c84cd951d519354e098 100644 (file)
@@ -186,6 +186,14 @@ static void etnaviv_iommuv2_restore_nonsec(struct etnaviv_gpu *gpu,
        gpu_write(gpu, VIVS_MMUv2_CONTROL, VIVS_MMUv2_CONTROL_ENABLE);
 }
 
+void etnaviv_iommuv2_update_pta_entry(struct etnaviv_iommu_context *context)
+{
+       struct etnaviv_iommuv2_context *v2_context = to_v2_context(context);
+
+       context->global->v2.pta_cpu[v2_context->id] = v2_context->mtlb_dma |
+                                       VIVS_MMUv2_CONFIGURATION_MODE_MODE4_K;
+}
+
 static void etnaviv_iommuv2_restore_sec(struct etnaviv_gpu *gpu,
        struct etnaviv_iommu_context *context)
 {
@@ -216,8 +224,7 @@ static void etnaviv_iommuv2_restore_sec(struct etnaviv_gpu *gpu,
                  VIVS_MMUv2_SAFE_ADDRESS_CONFIG_SEC_SAFE_ADDR_HIGH(
                  upper_32_bits(context->global->bad_page_dma)));
 
-       context->global->v2.pta_cpu[v2_context->id] = v2_context->mtlb_dma |
-                                        VIVS_MMUv2_CONFIGURATION_MODE_MODE4_K;
+       etnaviv_iommuv2_update_pta_entry(context);
 
        /* trigger a PTA load through the FE */
        prefetch = etnaviv_buffer_config_pta(gpu, v2_context->id);
@@ -241,6 +248,7 @@ unsigned short etnaviv_iommuv2_get_pta_id(struct etnaviv_iommu_context *context)
 
        return v2_context->id;
 }
+
 static void etnaviv_iommuv2_restore(struct etnaviv_gpu *gpu,
                                    struct etnaviv_iommu_context *context)
 {
@@ -276,6 +284,8 @@ etnaviv_iommuv2_context_alloc(struct etnaviv_iommu_global *global)
        if (!v2_context)
                return NULL;
 
+       v2_context->id = 0;
+#if 0
        mutex_lock(&global->lock);
        v2_context->id = find_first_zero_bit(global->v2.pta_alloc,
                                             ETNAVIV_PTA_ENTRIES);
@@ -286,6 +296,7 @@ etnaviv_iommuv2_context_alloc(struct etnaviv_iommu_global *global)
                goto out_free;
        }
        mutex_unlock(&global->lock);
+#endif
 
        v2_context->mtlb_cpu = dma_alloc_wc(global->dev, SZ_4K,
                                            &v2_context->mtlb_dma, GFP_KERNEL);
index c01a147f0dfddfbc2809b7d99ce85b23cd558983..195ef1bf828803e285aec13e73214d4e5ded5ff5 100644 (file)
@@ -124,4 +124,6 @@ etnaviv_iommuv2_context_alloc(struct etnaviv_iommu_global *global);
 u32 etnaviv_iommuv2_get_mtlb_addr(struct etnaviv_iommu_context *context);
 unsigned short etnaviv_iommuv2_get_pta_id(struct etnaviv_iommu_context *context);
 
+void etnaviv_iommuv2_update_pta_entry(struct etnaviv_iommu_context *context);
+
 #endif /* __ETNAVIV_MMU_H__ */