nv40: adapt to stencil ref changes
authorRoland Scheidegger <sroland@vmware.com>
Thu, 11 Feb 2010 21:48:31 +0000 (22:48 +0100)
committerRoland Scheidegger <sroland@vmware.com>
Thu, 11 Feb 2010 21:48:31 +0000 (22:48 +0100)
src/gallium/drivers/nv40/nv40_context.h
src/gallium/drivers/nv40/nv40_state.c
src/gallium/drivers/nv40/nv40_state_emit.c
src/gallium/drivers/nv40/nv40_state_zsa.c

index 958a48f..4861924 100644 (file)
@@ -61,7 +61,8 @@ enum nv40_state_index {
        NV40_STATE_VTXBUF = 31,
        NV40_STATE_VTXFMT = 32,
        NV40_STATE_VTXATTR = 33,
-       NV40_STATE_MAX = 34
+       NV40_STATE_SR = 34,
+       NV40_STATE_MAX = 35
 };
 
 #include "nv40_screen.h"
@@ -79,6 +80,7 @@ enum nv40_state_index {
 #define NV40_NEW_FRAGPROG      (1 << 10)
 #define NV40_NEW_ARRAYS                (1 << 11)
 #define NV40_NEW_UCP           (1 << 12)
+#define NV40_NEW_SR            (1 << 13)
 
 struct nv40_rasterizer_state {
        struct pipe_rasterizer_state pipe;
@@ -144,6 +146,7 @@ struct nv40_context {
        struct nv40_zsa_state *zsa;
        struct nv40_blend_state *blend;
        struct pipe_blend_color blend_colour;
+       struct pipe_stencil_ref stencil_ref;
        struct pipe_viewport_state viewport;
        struct pipe_framebuffer_state framebuffer;
        struct pipe_buffer *idxbuf;
@@ -215,6 +218,7 @@ extern struct nv40_state_entry nv40_state_framebuffer;
 extern struct nv40_state_entry nv40_state_fragtex;
 extern struct nv40_state_entry nv40_state_vbo;
 extern struct nv40_state_entry nv40_state_vtxfmt;
+extern struct nv40_state_entry nv40_state_sr;
 
 /* nv40_vbo.c */
 extern void nv40_draw_arrays(struct pipe_context *, unsigned mode,
index 51b40e5..d068be6 100644 (file)
@@ -445,7 +445,7 @@ nv40_depth_stencil_alpha_state_create(struct pipe_context *pipe,
 {
        struct nv40_context *nv40 = nv40_context(pipe);
        struct nv40_zsa_state *zsaso = CALLOC(1, sizeof(*zsaso));
-       struct nouveau_stateobj *so = so_new(4, 21, 0);
+       struct nouveau_stateobj *so = so_new(6, 20, 0);
        struct nouveau_grobj *curie = nv40->screen->curie;
 
        so_method(so, curie, NV40TCL_DEPTH_FUNC, 3);
@@ -459,11 +459,11 @@ nv40_depth_stencil_alpha_state_create(struct pipe_context *pipe,
        so_data  (so, float_to_ubyte(cso->alpha.ref_value));
 
        if (cso->stencil[0].enabled) {
-               so_method(so, curie, NV40TCL_STENCIL_FRONT_ENABLE, 8);
+               so_method(so, curie, NV40TCL_STENCIL_FRONT_ENABLE, 3);
                so_data  (so, cso->stencil[0].enabled ? 1 : 0);
                so_data  (so, cso->stencil[0].writemask);
                so_data  (so, nvgl_comparison_op(cso->stencil[0].func));
-               so_data  (so, cso->stencil[0].ref_value);
+               so_method(so, curie, NV40TCL_STENCIL_FRONT_FUNC_MASK, 4);
                so_data  (so, cso->stencil[0].valuemask);
                so_data  (so, nvgl_stencil_op(cso->stencil[0].fail_op));
                so_data  (so, nvgl_stencil_op(cso->stencil[0].zfail_op));
@@ -474,11 +474,11 @@ nv40_depth_stencil_alpha_state_create(struct pipe_context *pipe,
        }
 
        if (cso->stencil[1].enabled) {
-               so_method(so, curie, NV40TCL_STENCIL_BACK_ENABLE, 8);
+               so_method(so, curie, NV40TCL_STENCIL_BACK_ENABLE, 3);
                so_data  (so, cso->stencil[1].enabled ? 1 : 0);
                so_data  (so, cso->stencil[1].writemask);
                so_data  (so, nvgl_comparison_op(cso->stencil[1].func));
-               so_data  (so, cso->stencil[1].ref_value);
+               so_method(so, curie, NV40TCL_STENCIL_BACK_FUNC_MASK, 4);
                so_data  (so, cso->stencil[1].valuemask);
                so_data  (so, nvgl_stencil_op(cso->stencil[1].fail_op));
                so_data  (so, nvgl_stencil_op(cso->stencil[1].zfail_op));
@@ -592,6 +592,16 @@ nv40_set_blend_color(struct pipe_context *pipe,
        nv40->dirty |= NV40_NEW_BCOL;
 }
 
+ static void
+nv40_set_stencil_ref(struct pipe_context *pipe,
+                    const struct pipe_stencil_ref *sr)
+{
+       struct nv40_context *nv40 = nv40_context(pipe);
+
+       nv40->stencil_ref = *sr;
+       nv40->dirty |= NV40_NEW_SR;
+}
+
 static void
 nv40_set_clip_state(struct pipe_context *pipe,
                    const struct pipe_clip_state *clip)
@@ -719,6 +729,7 @@ nv40_init_state_functions(struct nv40_context *nv40)
        nv40->pipe.delete_fs_state = nv40_fp_state_delete;
 
        nv40->pipe.set_blend_color = nv40_set_blend_color;
+        nv40->pipe.set_stencil_ref = nv40_set_stencil_ref;
        nv40->pipe.set_clip_state = nv40_set_clip_state;
        nv40->pipe.set_constant_buffer = nv40_set_constant_buffer;
        nv40->pipe.set_framebuffer_state = nv40_set_framebuffer_state;
index 1c4007a..8990f30 100644 (file)
@@ -13,6 +13,7 @@ static struct nv40_state_entry *render_states[] = {
        &nv40_state_blend,
        &nv40_state_blend_colour,
        &nv40_state_zsa,
+       &nv40_state_sr,
        &nv40_state_viewport,
        &nv40_state_vbo,
        NULL
@@ -29,6 +30,7 @@ static struct nv40_state_entry *swtnl_states[] = {
        &nv40_state_blend,
        &nv40_state_blend_colour,
        &nv40_state_zsa,
+       &nv40_state_sr,
        &nv40_state_viewport,
        &nv40_state_vtxfmt,
        NULL
index fb76067..4c734f4 100644 (file)
@@ -15,3 +15,27 @@ struct nv40_state_entry nv40_state_zsa = {
                .hw = NV40_STATE_ZSA
        }
 };
+
+static boolean
+nv40_state_sr_validate(struct nv40_context *nv40)
+{
+       struct nouveau_stateobj *so = so_new(2, 2, 0);
+       struct pipe_stencil_ref *sr = &nv40->stencil_ref;
+
+       so_method(so, nv40->screen->rankine, NV40TCL_STENCIL_FRONT_FUNC_REF, 1);
+       so_data  (so, sr->ref_value[0];
+       so_method(so, nv40->screen->rankine, NV40TCL_STENCIL_BACK_FUNC_REF, 1);
+       so_data  (so, sr->ref_value[1];
+
+       so_ref(so, &nv40->state.hw[NV40_STATE_SR]);
+       so_ref(NULL, &so);
+       return TRUE;
+}
+
+struct nv40_state_entry nv40_state_sr = {
+       .validate = nv40_state_sr_validate,
+       .dirty = {
+               .pipe = NV40_NEW_SR,
+               .hw = NV40_STATE_SR
+       }
+};